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FEB_2272 07.11.24 10:11:57
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10:11:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:11:57:ST3_Shared:INFO: FEB-Microcable
10:11:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:11:57:febtest:INFO: Testing FEB with SN 2272
10:11:59:smx_tester:INFO: Scanning setup
10:11:59:elinks:INFO: Disabling clock on downlink 0
10:11:59:elinks:INFO: Disabling clock on downlink 1
10:11:59:elinks:INFO: Disabling clock on downlink 2
10:11:59:elinks:INFO: Disabling clock on downlink 3
10:11:59:elinks:INFO: Disabling clock on downlink 4
10:11:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:11:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:11:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:11:59:elinks:INFO: Disabling clock on downlink 0
10:11:59:elinks:INFO: Disabling clock on downlink 1
10:11:59:elinks:INFO: Disabling clock on downlink 2
10:11:59:elinks:INFO: Disabling clock on downlink 3
10:11:59:elinks:INFO: Disabling clock on downlink 4
10:11:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:11:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:11:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:11:59:elinks:INFO: Disabling clock on downlink 0
10:11:59:elinks:INFO: Disabling clock on downlink 1
10:11:59:elinks:INFO: Disabling clock on downlink 2
10:11:59:elinks:INFO: Disabling clock on downlink 3
10:11:59:elinks:INFO: Disabling clock on downlink 4
10:11:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:11:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:11:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:11:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:11:59:elinks:INFO: Disabling clock on downlink 0
10:11:59:elinks:INFO: Disabling clock on downlink 1
10:11:59:elinks:INFO: Disabling clock on downlink 2
10:11:59:elinks:INFO: Disabling clock on downlink 3
10:11:59:elinks:INFO: Disabling clock on downlink 4
10:11:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:11:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:11:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:11:59:elinks:INFO: Disabling clock on downlink 0
10:11:59:elinks:INFO: Disabling clock on downlink 1
10:11:59:elinks:INFO: Disabling clock on downlink 2
10:11:59:elinks:INFO: Disabling clock on downlink 3
10:11:59:elinks:INFO: Disabling clock on downlink 4
10:11:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:11:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:12:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:12:00:setup_element:INFO: Scanning clock phase
10:12:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:12:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:12:00:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:12:00:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:12:00:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:12:00:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:12:00:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:12:00:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:12:00:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:12:00:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:12:00:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:12:00:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:12:00:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:12:00:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:12:00:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:12:00:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
10:12:00:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
10:12:00:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:12:00:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:12:00:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
10:12:00:setup_element:INFO: Scanning data phases
10:12:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:12:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:12:05:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:12:05:setup_element:INFO: Eye window for uplink 16: XXX____________________________________X
Data delay found: 20
10:12:05:setup_element:INFO: Eye window for uplink 17: XX__________________________________XXXX
Data delay found: 18
10:12:06:setup_element:INFO: Eye window for uplink 18: __________________________________XXXXX_
Data delay found: 16
10:12:06:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXX___
Data delay found: 14
10:12:06:setup_element:INFO: Eye window for uplink 20: X____________________________________XXX
Data delay found: 18
10:12:06:setup_element:INFO: Eye window for uplink 21: X__________________________________XXXXX
Data delay found: 17
10:12:06:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
10:12:06:setup_element:INFO: Eye window for uplink 23: XXXXX_____________________________XXXXXX
Data delay found: 19
10:12:06:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
10:12:06:setup_element:INFO: Eye window for uplink 25: ___________XXXX_________________________
Data delay found: 32
10:12:06:setup_element:INFO: Eye window for uplink 26: ________XXXXXX__________________________
Data delay found: 30
10:12:06:setup_element:INFO: Eye window for uplink 27: ____________XXXXX_______________________
Data delay found: 34
10:12:06:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
10:12:06:setup_element:INFO: Eye window for uplink 29: ______________XXXXXX____________________
Data delay found: 36
10:12:06:setup_element:INFO: Eye window for uplink 30: _______________XXXXX____________________
Data delay found: 37
10:12:06:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
10:12:06:setup_element:INFO: Setting the data phase to 20 for uplink 16
10:12:06:setup_element:INFO: Setting the data phase to 18 for uplink 17
10:12:06:setup_element:INFO: Setting the data phase to 16 for uplink 18
10:12:06:setup_element:INFO: Setting the data phase to 14 for uplink 19
10:12:06:setup_element:INFO: Setting the data phase to 18 for uplink 20
10:12:06:setup_element:INFO: Setting the data phase to 17 for uplink 21
10:12:06:setup_element:INFO: Setting the data phase to 18 for uplink 22
10:12:06:setup_element:INFO: Setting the data phase to 19 for uplink 23
10:12:06:setup_element:INFO: Setting the data phase to 30 for uplink 24
10:12:06:setup_element:INFO: Setting the data phase to 32 for uplink 25
10:12:06:setup_element:INFO: Setting the data phase to 30 for uplink 26
10:12:06:setup_element:INFO: Setting the data phase to 34 for uplink 27
10:12:06:setup_element:INFO: Setting the data phase to 34 for uplink 28
10:12:06:setup_element:INFO: Setting the data phase to 36 for uplink 29
10:12:06:setup_element:INFO: Setting the data phase to 37 for uplink 30
10:12:06:setup_element:INFO: Setting the data phase to 38 for uplink 31
==============================================OOO==============================================
10:12:06:setup_element:INFO: Beginning SMX ASICs map scan
10:12:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:12:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:12:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:12:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:12:06:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:12:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:12:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:12:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:12:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:12:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:12:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:12:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:12:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:12:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:12:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:12:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:12:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:12:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:12:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:12:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:12:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:12:08:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXX___
Uplink 17: ______________________________________________________________________XXXXXXX___
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: _____________________________________________________________________XXXXXXXX___
Uplink 21: _____________________________________________________________________XXXXXXXX___
Uplink 22: _____________________________________________________________________XXXXXXXX___
Uplink 23: _____________________________________________________________________XXXXXXXX___
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: ________________________________________________________________________________
Uplink 29: ________________________________________________________________________________
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 36
Eye Window: XXX____________________________________X
Uplink 17:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 18:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 19:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 20:
Optimal Phase: 18
Window Length: 36
Eye Window: X____________________________________XXX
Uplink 21:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 22:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 23:
Optimal Phase: 19
Window Length: 29
Eye Window: XXXXX_____________________________XXXXXX
Uplink 24:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
Uplink 25:
Optimal Phase: 32
Window Length: 36
Eye Window: ___________XXXX_________________________
Uplink 26:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
Uplink 27:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 28:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 29:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 30:
Optimal Phase: 37
Window Length: 35
Eye Window: _______________XXXXX____________________
Uplink 31:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
==============================================OOO==============================================
10:12:08:setup_element:INFO: Performing Elink synchronization
10:12:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:12:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:12:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:12:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:12:08:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:12:08:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_23 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_0__upli_23
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
10:12:09:febtest:INFO: Init all SMX (CSA): 30
10:12:24:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:12:24:febtest:INFO: 23-00 | XA-000-09-004-012-011-007-02 | 28.2 | 1183.3
10:12:24:febtest:INFO: 30-01 | XA-000-09-004-012-009-003-01 | 34.6 | 1147.8
10:12:24:febtest:INFO: 21-02 | XA-000-09-004-012-010-010-15 | 28.2 | 1183.3
10:12:24:febtest:INFO: 28-03 | XA-000-09-004-012-008-003-12 | 44.1 | 1118.1
10:12:25:febtest:INFO: 19-04 | XA-000-09-004-012-010-009-15 | 31.4 | 1183.3
10:12:25:febtest:INFO: 26-05 | XA-000-09-004-012-010-008-15 | 40.9 | 1130.0
10:12:25:febtest:INFO: 17-06 | XA-000-09-004-012-012-007-10 | 34.6 | 1165.6
10:12:25:febtest:INFO: 24-07 | XA-000-09-004-012-012-008-10 | 34.6 | 1159.7
10:12:26:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:12:28:ST3_smx:INFO: chip: 23-0 28.225000 C 1195.082160 mV
10:12:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:12:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:12:28:ST3_smx:INFO: Electrons
10:12:28:ST3_smx:INFO: # loops 0
10:12:30:ST3_smx:INFO: # loops 1
10:12:32:ST3_smx:INFO: # loops 2
10:12:33:ST3_smx:INFO: Total # of broken channels: 0
10:12:33:ST3_smx:INFO: List of broken channels: []
10:12:33:ST3_smx:INFO: Total # of broken channels: 0
10:12:33:ST3_smx:INFO: List of broken channels: []
10:12:35:ST3_smx:INFO: chip: 30-1 34.556970 C 1159.654860 mV
10:12:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:12:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:12:35:ST3_smx:INFO: Electrons
10:12:35:ST3_smx:INFO: # loops 0
10:12:37:ST3_smx:INFO: # loops 1
10:12:38:ST3_smx:INFO: # loops 2
10:12:40:ST3_smx:INFO: Total # of broken channels: 0
10:12:40:ST3_smx:INFO: List of broken channels: []
10:12:40:ST3_smx:INFO: Total # of broken channels: 0
10:12:40:ST3_smx:INFO: List of broken channels: []
10:12:42:ST3_smx:INFO: chip: 21-2 28.225000 C 1195.082160 mV
10:12:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:12:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:12:42:ST3_smx:INFO: Electrons
10:12:42:ST3_smx:INFO: # loops 0
10:12:43:ST3_smx:INFO: # loops 1
10:12:45:ST3_smx:INFO: # loops 2
10:12:46:ST3_smx:INFO: Total # of broken channels: 0
10:12:46:ST3_smx:INFO: List of broken channels: []
10:12:46:ST3_smx:INFO: Total # of broken channels: 8
10:12:46:ST3_smx:INFO: List of broken channels: [90, 92, 94, 100, 102, 108, 114, 116]
10:12:48:ST3_smx:INFO: chip: 28-3 40.898880 C 1129.995435 mV
10:12:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:12:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:12:48:ST3_smx:INFO: Electrons
10:12:48:ST3_smx:INFO: # loops 0
10:12:50:ST3_smx:INFO: # loops 1
10:12:51:ST3_smx:INFO: # loops 2
10:12:53:ST3_smx:INFO: Total # of broken channels: 10
10:12:53:ST3_smx:INFO: List of broken channels: [71, 75, 77, 81, 83, 85, 87, 99, 103, 127]
10:12:53:ST3_smx:INFO: Total # of broken channels: 13
10:12:53:ST3_smx:INFO: List of broken channels: [71, 75, 77, 79, 81, 83, 85, 87, 89, 99, 101, 103, 105]
10:12:55:ST3_smx:INFO: chip: 19-4 31.389742 C 1195.082160 mV
10:12:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:12:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:12:55:ST3_smx:INFO: Electrons
10:12:55:ST3_smx:INFO: # loops 0
10:12:56:ST3_smx:INFO: # loops 1
10:12:58:ST3_smx:INFO: # loops 2
10:12:59:ST3_smx:INFO: Total # of broken channels: 0
10:12:59:ST3_smx:INFO: List of broken channels: []
10:12:59:ST3_smx:INFO: Total # of broken channels: 0
10:12:59:ST3_smx:INFO: List of broken channels: []
10:13:01:ST3_smx:INFO: chip: 26-5 40.898880 C 1141.874115 mV
10:13:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:13:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:13:01:ST3_smx:INFO: Electrons
10:13:01:ST3_smx:INFO: # loops 0
10:13:03:ST3_smx:INFO: # loops 1
10:13:04:ST3_smx:INFO: # loops 2
10:13:06:ST3_smx:INFO: Total # of broken channels: 0
10:13:06:ST3_smx:INFO: List of broken channels: []
10:13:06:ST3_smx:INFO: Total # of broken channels: 0
10:13:06:ST3_smx:INFO: List of broken channels: []
10:13:07:ST3_smx:INFO: chip: 17-6 37.726682 C 1177.390875 mV
10:13:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:13:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:13:07:ST3_smx:INFO: Electrons
10:13:07:ST3_smx:INFO: # loops 0
10:13:09:ST3_smx:INFO: # loops 1
10:13:11:ST3_smx:INFO: # loops 2
10:13:12:ST3_smx:INFO: Total # of broken channels: 0
10:13:12:ST3_smx:INFO: List of broken channels: []
10:13:12:ST3_smx:INFO: Total # of broken channels: 0
10:13:12:ST3_smx:INFO: List of broken channels: []
10:13:14:ST3_smx:INFO: chip: 24-7 34.556970 C 1171.483840 mV
10:13:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:13:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:13:14:ST3_smx:INFO: Electrons
10:13:14:ST3_smx:INFO: # loops 0
10:13:15:ST3_smx:INFO: # loops 1
10:13:17:ST3_smx:INFO: # loops 2
10:13:19:ST3_smx:INFO: Total # of broken channels: 0
10:13:19:ST3_smx:INFO: List of broken channels: []
10:13:19:ST3_smx:INFO: Total # of broken channels: 0
10:13:19:ST3_smx:INFO: List of broken channels: []
10:13:19:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:13:19:febtest:INFO: 23-00 | XA-000-09-004-012-011-007-02 | 31.4 | 1212.7
10:13:19:febtest:INFO: 30-01 | XA-000-09-004-012-009-003-01 | 34.6 | 1183.3
10:13:20:febtest:INFO: 21-02 | XA-000-09-004-012-010-010-15 | 31.4 | 1212.7
10:13:20:febtest:INFO: 28-03 | XA-000-09-004-012-008-003-12 | 44.1 | 1153.7
10:13:20:febtest:INFO: 19-04 | XA-000-09-004-012-010-009-15 | 34.6 | 1212.7
10:13:20:febtest:INFO: 26-05 | XA-000-09-004-012-010-008-15 | 40.9 | 1165.6
10:13:21:febtest:INFO: 17-06 | XA-000-09-004-012-012-007-10 | 37.7 | 1201.0
10:13:21:febtest:INFO: 24-07 | XA-000-09-004-012-012-008-10 | 37.7 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_07-10_11_57
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2272| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0280', '1.848', '2.0180']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0170', '1.850', '2.6020']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9920', '1.850', '0.5299']