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FEB_2272 07.11.24 10:14:54
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10:14:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:14:54:ST3_Shared:INFO: FEB-Microcable
10:14:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:14:54:febtest:INFO: Testing FEB with SN 2272
10:14:55:smx_tester:INFO: Scanning setup
10:14:55:elinks:INFO: Disabling clock on downlink 0
10:14:55:elinks:INFO: Disabling clock on downlink 1
10:14:55:elinks:INFO: Disabling clock on downlink 2
10:14:55:elinks:INFO: Disabling clock on downlink 3
10:14:55:elinks:INFO: Disabling clock on downlink 4
10:14:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:14:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:56:elinks:INFO: Disabling clock on downlink 0
10:14:56:elinks:INFO: Disabling clock on downlink 1
10:14:56:elinks:INFO: Disabling clock on downlink 2
10:14:56:elinks:INFO: Disabling clock on downlink 3
10:14:56:elinks:INFO: Disabling clock on downlink 4
10:14:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:14:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:56:elinks:INFO: Disabling clock on downlink 0
10:14:56:elinks:INFO: Disabling clock on downlink 1
10:14:56:elinks:INFO: Disabling clock on downlink 2
10:14:56:elinks:INFO: Disabling clock on downlink 3
10:14:56:elinks:INFO: Disabling clock on downlink 4
10:14:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:14:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:14:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:56:elinks:INFO: Disabling clock on downlink 0
10:14:56:elinks:INFO: Disabling clock on downlink 1
10:14:56:elinks:INFO: Disabling clock on downlink 2
10:14:56:elinks:INFO: Disabling clock on downlink 3
10:14:56:elinks:INFO: Disabling clock on downlink 4
10:14:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:14:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:56:elinks:INFO: Disabling clock on downlink 0
10:14:56:elinks:INFO: Disabling clock on downlink 1
10:14:56:elinks:INFO: Disabling clock on downlink 2
10:14:56:elinks:INFO: Disabling clock on downlink 3
10:14:56:elinks:INFO: Disabling clock on downlink 4
10:14:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:14:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:14:56:setup_element:INFO: Scanning clock phase
10:14:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:14:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:14:57:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:14:57:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:14:57:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:14:57:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:14:57:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:14:57:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
10:14:57:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
10:14:57:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:14:57:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:14:57:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:14:57:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:14:57:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:14:57:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:14:57:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
10:14:57:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
10:14:57:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:14:57:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:14:57:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
10:14:57:setup_element:INFO: Scanning data phases
10:14:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:14:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:15:02:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:15:02:setup_element:INFO: Eye window for uplink 16: XXXXX___________________________________
Data delay found: 22
10:15:02:setup_element:INFO: Eye window for uplink 17: XXX__________________________________XXX
Data delay found: 19
10:15:02:setup_element:INFO: Eye window for uplink 18: X_____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 3
10:15:02:setup_element:INFO: Eye window for uplink 19: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
10:15:02:setup_element:INFO: Eye window for uplink 20: XX____________________________________XX
Data delay found: 19
10:15:02:setup_element:INFO: Eye window for uplink 21: XX__________________________________XXXX
Data delay found: 18
10:15:02:setup_element:INFO: Eye window for uplink 22: XXX___________________________________XX
Data delay found: 20
10:15:02:setup_element:INFO: Eye window for uplink 23: XXXXX_______________________________XXXX
Data delay found: 20
10:15:02:setup_element:INFO: Eye window for uplink 24: _________XXXXX__________________________
Data delay found: 31
10:15:02:setup_element:INFO: Eye window for uplink 25: ____________XXXX________________________
Data delay found: 33
10:15:02:setup_element:INFO: Eye window for uplink 26: _________XXXXXX_________________________
Data delay found: 31
10:15:02:setup_element:INFO: Eye window for uplink 27: _____________XXXXX______________________
Data delay found: 35
10:15:02:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
10:15:02:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
10:15:02:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
10:15:02:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
10:15:02:setup_element:INFO: Setting the data phase to 22 for uplink 16
10:15:02:setup_element:INFO: Setting the data phase to 19 for uplink 17
10:15:02:setup_element:INFO: Setting the data phase to 3 for uplink 18
10:15:02:setup_element:INFO: Setting the data phase to 2 for uplink 19
10:15:02:setup_element:INFO: Setting the data phase to 19 for uplink 20
10:15:02:setup_element:INFO: Setting the data phase to 18 for uplink 21
10:15:02:setup_element:INFO: Setting the data phase to 20 for uplink 22
10:15:02:setup_element:INFO: Setting the data phase to 20 for uplink 23
10:15:02:setup_element:INFO: Setting the data phase to 31 for uplink 24
10:15:02:setup_element:INFO: Setting the data phase to 33 for uplink 25
10:15:02:setup_element:INFO: Setting the data phase to 31 for uplink 26
10:15:02:setup_element:INFO: Setting the data phase to 35 for uplink 27
10:15:02:setup_element:INFO: Setting the data phase to 35 for uplink 28
10:15:02:setup_element:INFO: Setting the data phase to 37 for uplink 29
10:15:02:setup_element:INFO: Setting the data phase to 37 for uplink 30
10:15:02:setup_element:INFO: Setting the data phase to 38 for uplink 31
==============================================OOO==============================================
10:15:02:setup_element:INFO: Beginning SMX ASICs map scan
10:15:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:15:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:15:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:15:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:15:02:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:15:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:15:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:15:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:15:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:15:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:15:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:15:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:15:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:15:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:15:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:15:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:15:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:15:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:15:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:15:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:15:05:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXXX__
Uplink 17: ______________________________________________________________________XXXXXXXX__
Uplink 18: _____________________________________________________________________XXXXXXX____
Uplink 19: _____________________________________________________________________XXXXXXX____
Uplink 20: ________________________________________________________________________________
Uplink 21: ________________________________________________________________________________
Uplink 22: _____________________________________________________________________XXXXXXXX___
Uplink 23: _____________________________________________________________________XXXXXXXX___
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: ____________________________________________________________________XXXXXXXXX___
Uplink 27: ____________________________________________________________________XXXXXXXXX___
Uplink 28: ________________________________________________________________________________
Uplink 29: ________________________________________________________________________________
Uplink 30: ______________________________________________________________________XXXXXXX___
Uplink 31: ______________________________________________________________________XXXXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 22
Window Length: 35
Eye Window: XXXXX___________________________________
Uplink 17:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 18:
Optimal Phase: 3
Window Length: 5
Eye Window: X_____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 19:
Optimal Phase: 2
Window Length: 6
Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 20:
Optimal Phase: 19
Window Length: 36
Eye Window: XX____________________________________XX
Uplink 21:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 22:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 23:
Optimal Phase: 20
Window Length: 31
Eye Window: XXXXX_______________________________XXXX
Uplink 24:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 25:
Optimal Phase: 33
Window Length: 36
Eye Window: ____________XXXX________________________
Uplink 26:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 27:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
==============================================OOO==============================================
10:15:05:setup_element:INFO: Performing Elink synchronization
10:15:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:15:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:15:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:15:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:15:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:15:05:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 1 | [(0, 19)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:15:06:febtest:INFO: Init all SMX (CSA): 30
10:15:19:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:15:20:febtest:INFO: 23-00 | XA-000-09-004-012-011-007-02 | 31.4 | 1183.3
10:15:20:febtest:INFO: 30-01 | XA-000-09-004-012-009-003-01 | 34.6 | 1147.8
10:15:20:febtest:INFO: 21-02 | XA-000-09-004-012-010-010-15 | 31.4 | 1183.3
10:15:20:febtest:INFO: 28-03 | XA-000-09-004-012-008-003-12 | 44.1 | 1118.1
10:15:21:febtest:INFO: 19-04 | XA-000-09-004-012-010-009-15 | 34.6 | 1177.4
10:15:21:febtest:INFO: 26-05 | XA-000-09-004-012-010-008-15 | 44.1 | 1124.0
10:15:21:febtest:INFO: 17-06 | XA-000-09-004-012-012-007-10 | 37.7 | 1177.4
10:15:21:febtest:INFO: 24-07 | XA-000-09-004-012-012-008-10 | 34.6 | 1159.7
10:15:22:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:15:24:ST3_smx:INFO: chip: 23-0 31.389742 C 1195.082160 mV
10:15:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:24:ST3_smx:INFO: Electrons
10:15:24:ST3_smx:INFO: # loops 0
10:15:26:ST3_smx:INFO: # loops 1
10:15:28:ST3_smx:INFO: # loops 2
10:15:29:ST3_smx:INFO: Total # of broken channels: 0
10:15:29:ST3_smx:INFO: List of broken channels: []
10:15:29:ST3_smx:INFO: Total # of broken channels: 0
10:15:29:ST3_smx:INFO: List of broken channels: []
10:15:31:ST3_smx:INFO: chip: 30-1 34.556970 C 1159.654860 mV
10:15:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:31:ST3_smx:INFO: Electrons
10:15:31:ST3_smx:INFO: # loops 0
10:15:33:ST3_smx:INFO: # loops 1
10:15:34:ST3_smx:INFO: # loops 2
10:15:36:ST3_smx:INFO: Total # of broken channels: 1
10:15:36:ST3_smx:INFO: List of broken channels: [3]
10:15:36:ST3_smx:INFO: Total # of broken channels: 1
10:15:36:ST3_smx:INFO: List of broken channels: [3]
10:15:37:ST3_smx:INFO: chip: 21-2 31.389742 C 1195.082160 mV
10:15:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:37:ST3_smx:INFO: Electrons
10:15:37:ST3_smx:INFO: # loops 0
10:15:39:ST3_smx:INFO: # loops 1
10:15:40:ST3_smx:INFO: # loops 2
10:15:42:ST3_smx:INFO: Total # of broken channels: 0
10:15:42:ST3_smx:INFO: List of broken channels: []
10:15:42:ST3_smx:INFO: Total # of broken channels: 0
10:15:42:ST3_smx:INFO: List of broken channels: []
10:15:44:ST3_smx:INFO: chip: 28-3 44.073563 C 1129.995435 mV
10:15:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:44:ST3_smx:INFO: Electrons
10:15:44:ST3_smx:INFO: # loops 0
10:15:45:ST3_smx:INFO: # loops 1
10:15:47:ST3_smx:INFO: # loops 2
10:15:48:ST3_smx:INFO: Total # of broken channels: 0
10:15:48:ST3_smx:INFO: List of broken channels: []
10:15:48:ST3_smx:INFO: Total # of broken channels: 13
10:15:48:ST3_smx:INFO: List of broken channels: [71, 75, 77, 79, 81, 83, 85, 87, 89, 99, 101, 103, 105]
10:15:50:ST3_smx:INFO: chip: 19-4 34.556970 C 1189.190035 mV
10:15:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:50:ST3_smx:INFO: Electrons
10:15:50:ST3_smx:INFO: # loops 0
10:15:52:ST3_smx:INFO: # loops 1
10:15:53:ST3_smx:INFO: # loops 2
10:15:55:ST3_smx:INFO: Total # of broken channels: 1
10:15:55:ST3_smx:INFO: List of broken channels: [121]
10:15:55:ST3_smx:INFO: Total # of broken channels: 1
10:15:55:ST3_smx:INFO: List of broken channels: [121]
10:15:57:ST3_smx:INFO: chip: 26-5 44.073563 C 1135.937260 mV
10:15:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:15:57:ST3_smx:INFO: Electrons
10:15:57:ST3_smx:INFO: # loops 0
10:15:58:ST3_smx:INFO: # loops 1
10:16:00:ST3_smx:INFO: # loops 2
10:16:01:ST3_smx:INFO: Total # of broken channels: 0
10:16:01:ST3_smx:INFO: List of broken channels: []
10:16:01:ST3_smx:INFO: Total # of broken channels: 0
10:16:01:ST3_smx:INFO: List of broken channels: []
10:16:03:ST3_smx:INFO: chip: 17-6 37.726682 C 1189.190035 mV
10:16:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:03:ST3_smx:INFO: Electrons
10:16:03:ST3_smx:INFO: # loops 0
10:16:04:ST3_smx:INFO: # loops 1
10:16:06:ST3_smx:INFO: # loops 2
10:16:07:ST3_smx:INFO: Total # of broken channels: 0
10:16:07:ST3_smx:INFO: List of broken channels: []
10:16:07:ST3_smx:INFO: Total # of broken channels: 2
10:16:07:ST3_smx:INFO: List of broken channels: [113, 123]
10:16:09:ST3_smx:INFO: chip: 24-7 37.726682 C 1171.483840 mV
10:16:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:09:ST3_smx:INFO: Electrons
10:16:09:ST3_smx:INFO: # loops 0
10:16:11:ST3_smx:INFO: # loops 1
10:16:12:ST3_smx:INFO: # loops 2
10:16:14:ST3_smx:INFO: Total # of broken channels: 0
10:16:14:ST3_smx:INFO: List of broken channels: []
10:16:14:ST3_smx:INFO: Total # of broken channels: 0
10:16:14:ST3_smx:INFO: List of broken channels: []
10:16:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:16:14:febtest:INFO: 23-00 | XA-000-09-004-012-011-007-02 | 31.4 | 1212.7
10:16:15:febtest:INFO: 30-01 | XA-000-09-004-012-009-003-01 | 37.7 | 1183.3
10:16:15:febtest:INFO: 21-02 | XA-000-09-004-012-010-010-15 | 31.4 | 1218.6
10:16:15:febtest:INFO: 28-03 | XA-000-09-004-012-008-003-12 | 44.1 | 1153.7
10:16:15:febtest:INFO: 19-04 | XA-000-09-004-012-010-009-15 | 34.6 | 1212.7
10:16:16:febtest:INFO: 26-05 | XA-000-09-004-012-010-008-15 | 44.1 | 1159.7
10:16:16:febtest:INFO: 17-06 | XA-000-09-004-012-012-007-10 | 37.7 | 1218.6
10:16:16:febtest:INFO: 24-07 | XA-000-09-004-012-012-008-10 | 37.7 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_07-10_14_54
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2272| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0190', '1.848', '2.0260']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0170', '1.849', '2.6030']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9900', '1.850', '0.5301']