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FEB_2273 16.12.24 14:34:42
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14:34:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:34:42:ST3_Shared:INFO: FEB-ASIC
14:34:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:34:42:febtest:INFO: Testing FEB with SN 2273
14:34:44:smx_tester:INFO: Scanning setup
14:34:44:elinks:INFO: Disabling clock on downlink 0
14:34:44:elinks:INFO: Disabling clock on downlink 1
14:34:44:elinks:INFO: Disabling clock on downlink 2
14:34:44:elinks:INFO: Disabling clock on downlink 3
14:34:44:elinks:INFO: Disabling clock on downlink 4
14:34:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:34:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:44:elinks:INFO: Disabling clock on downlink 0
14:34:44:elinks:INFO: Disabling clock on downlink 1
14:34:44:elinks:INFO: Disabling clock on downlink 2
14:34:44:elinks:INFO: Disabling clock on downlink 3
14:34:44:elinks:INFO: Disabling clock on downlink 4
14:34:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:44:elinks:INFO: Disabling clock on downlink 0
14:34:44:elinks:INFO: Disabling clock on downlink 1
14:34:44:elinks:INFO: Disabling clock on downlink 2
14:34:44:elinks:INFO: Disabling clock on downlink 3
14:34:44:elinks:INFO: Disabling clock on downlink 4
14:34:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:34:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:34:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:34:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:34:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:34:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:34:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:34:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:34:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:34:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:34:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:45:elinks:INFO: Disabling clock on downlink 0
14:34:45:elinks:INFO: Disabling clock on downlink 1
14:34:45:elinks:INFO: Disabling clock on downlink 2
14:34:45:elinks:INFO: Disabling clock on downlink 3
14:34:45:elinks:INFO: Disabling clock on downlink 4
14:34:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:34:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:45:elinks:INFO: Disabling clock on downlink 0
14:34:45:elinks:INFO: Disabling clock on downlink 1
14:34:45:elinks:INFO: Disabling clock on downlink 2
14:34:45:elinks:INFO: Disabling clock on downlink 3
14:34:45:elinks:INFO: Disabling clock on downlink 4
14:34:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:34:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:34:45:setup_element:INFO: Scanning clock phase
14:34:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:34:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:34:45:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:34:45:setup_element:INFO: Eye window for uplink 16: __________________________________________________________________XXXXXXXXXX____
Clock Delay: 30
14:34:45:setup_element:INFO: Eye window for uplink 17: __________________________________________________________________XXXXXXXXXX____
Clock Delay: 30
14:34:45:setup_element:INFO: Eye window for uplink 18: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
14:34:45:setup_element:INFO: Eye window for uplink 19: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
14:34:45:setup_element:INFO: Eye window for uplink 20: __________________________________________________________________XXXXXXXXXX____
Clock Delay: 30
14:34:45:setup_element:INFO: Eye window for uplink 21: __________________________________________________________________XXXXXXXXXX____
Clock Delay: 30
14:34:45:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
14:34:45:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
14:34:45:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXXXXXXX_____
Clock Delay: 29
14:34:45:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXXXXXXX_____
Clock Delay: 29
14:34:45:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
14:34:45:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
14:34:45:setup_element:INFO: Eye window for uplink 28: __________________________________________________________________XXXXXXXXXX____
Clock Delay: 30
14:34:45:setup_element:INFO: Eye window for uplink 29: __________________________________________________________________XXXXXXXXXX____
Clock Delay: 30
14:34:45:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
14:34:45:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
14:34:45:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 2
==============================================OOO==============================================
14:34:45:setup_element:INFO: Scanning data phases
14:34:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:34:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:34:51:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:34:51:setup_element:INFO: Eye window for uplink 16: XXXXXX______________________________XXXX
Data delay found: 20
14:34:51:setup_element:INFO: Eye window for uplink 17: XXXX____________________________XXXXXXXX
Data delay found: 17
14:34:51:setup_element:INFO: Eye window for uplink 18: XXX________________________________XXXXX
Data delay found: 18
14:34:51:setup_element:INFO: Eye window for uplink 19: X_______________________________XXXXXXXX
Data delay found: 16
14:34:51:setup_element:INFO: Eye window for uplink 20: XXXX_____________________________X_XXXXX
Data delay found: 18
14:34:51:setup_element:INFO: Eye window for uplink 21: XXXX____________________________XXXXXXXX
Data delay found: 17
14:34:51:setup_element:INFO: Eye window for uplink 22: XXXXX______________________________XXXXX
Data delay found: 19
14:34:51:setup_element:INFO: Eye window for uplink 23: XXXXXXX____________________________XXXXX
Data delay found: 20
14:34:51:setup_element:INFO: Eye window for uplink 24: ___X__XXXXXXXXX_________________________
Data delay found: 28
14:34:51:setup_element:INFO: Eye window for uplink 25: ______XXXXXXXXXX________________________
Data delay found: 30
14:34:51:setup_element:INFO: Eye window for uplink 26: ________XXXXXXX_________________________
Data delay found: 31
14:34:51:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXX______________________
Data delay found: 34
14:34:51:setup_element:INFO: Eye window for uplink 28: __________XXXXXXXXXX____________________
Data delay found: 34
14:34:51:setup_element:INFO: Eye window for uplink 29: ____________XXXXXXXXXXX_________________
Data delay found: 37
14:34:51:setup_element:INFO: Eye window for uplink 30: ______________X_XXXXXXXX________________
Data delay found: 38
14:34:51:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXXXX________________
Data delay found: 39
14:34:51:setup_element:INFO: Setting the data phase to 20 for uplink 16
14:34:51:setup_element:INFO: Setting the data phase to 17 for uplink 17
14:34:51:setup_element:INFO: Setting the data phase to 18 for uplink 18
14:34:51:setup_element:INFO: Setting the data phase to 16 for uplink 19
14:34:51:setup_element:INFO: Setting the data phase to 18 for uplink 20
14:34:51:setup_element:INFO: Setting the data phase to 17 for uplink 21
14:34:51:setup_element:INFO: Setting the data phase to 19 for uplink 22
14:34:51:setup_element:INFO: Setting the data phase to 20 for uplink 23
14:34:51:setup_element:INFO: Setting the data phase to 28 for uplink 24
14:34:51:setup_element:INFO: Setting the data phase to 30 for uplink 25
14:34:51:setup_element:INFO: Setting the data phase to 31 for uplink 26
14:34:51:setup_element:INFO: Setting the data phase to 34 for uplink 27
14:34:51:setup_element:INFO: Setting the data phase to 34 for uplink 28
14:34:51:setup_element:INFO: Setting the data phase to 37 for uplink 29
14:34:51:setup_element:INFO: Setting the data phase to 38 for uplink 30
14:34:51:setup_element:INFO: Setting the data phase to 39 for uplink 31
==============================================OOO==============================================
14:34:51:setup_element:INFO: Beginning SMX ASICs map scan
14:34:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:34:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:34:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:34:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:34:51:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:34:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:34:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:34:51:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:34:51:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:34:51:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:34:51:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:34:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:34:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:34:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:34:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:34:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:34:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:34:52:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:34:52:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:34:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:34:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:34:54:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 30
Window Length: 69
Eye Windows:
Uplink 16: __________________________________________________________________XXXXXXXXXX____
Uplink 17: __________________________________________________________________XXXXXXXXXX____
Uplink 18: __________________________________________________________________XXXXXXXXX_____
Uplink 19: __________________________________________________________________XXXXXXXXX_____
Uplink 20: __________________________________________________________________XXXXXXXXXX____
Uplink 21: __________________________________________________________________XXXXXXXXXX____
Uplink 22: ________________________________________________________________________________
Uplink 23: ________________________________________________________________________________
Uplink 24: _________________________________________________________________XXXXXXXXXX_____
Uplink 25: _________________________________________________________________XXXXXXXXXX_____
Uplink 26: _________________________________________________________________XXXXXXXX_______
Uplink 27: _________________________________________________________________XXXXXXXX_______
Uplink 28: __________________________________________________________________XXXXXXXXXX____
Uplink 29: __________________________________________________________________XXXXXXXXXX____
Uplink 30: __________________________________________________________________XXXXXXXXX_____
Uplink 31: __________________________________________________________________XXXXXXXXX_____
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 30
Eye Window: XXXXXX______________________________XXXX
Uplink 17:
Optimal Phase: 17
Window Length: 28
Eye Window: XXXX____________________________XXXXXXXX
Uplink 18:
Optimal Phase: 18
Window Length: 32
Eye Window: XXX________________________________XXXXX
Uplink 19:
Optimal Phase: 16
Window Length: 31
Eye Window: X_______________________________XXXXXXXX
Uplink 20:
Optimal Phase: 18
Window Length: 29
Eye Window: XXXX_____________________________X_XXXXX
Uplink 21:
Optimal Phase: 17
Window Length: 28
Eye Window: XXXX____________________________XXXXXXXX
Uplink 22:
Optimal Phase: 19
Window Length: 30
Eye Window: XXXXX______________________________XXXXX
Uplink 23:
Optimal Phase: 20
Window Length: 28
Eye Window: XXXXXXX____________________________XXXXX
Uplink 24:
Optimal Phase: 28
Window Length: 28
Eye Window: ___X__XXXXXXXXX_________________________
Uplink 25:
Optimal Phase: 30
Window Length: 30
Eye Window: ______XXXXXXXXXX________________________
Uplink 26:
Optimal Phase: 31
Window Length: 33
Eye Window: ________XXXXXXX_________________________
Uplink 27:
Optimal Phase: 34
Window Length: 33
Eye Window: ___________XXXXXXX______________________
Uplink 28:
Optimal Phase: 34
Window Length: 30
Eye Window: __________XXXXXXXXXX____________________
Uplink 29:
Optimal Phase: 37
Window Length: 29
Eye Window: ____________XXXXXXXXXXX_________________
Uplink 30:
Optimal Phase: 38
Window Length: 30
Eye Window: ______________X_XXXXXXXX________________
Uplink 31:
Optimal Phase: 39
Window Length: 31
Eye Window: _______________XXXXXXXXX________________
==============================================OOO==============================================
14:34:54:setup_element:INFO: Performing Elink synchronization
14:34:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:34:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:34:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:34:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
14:34:54:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:34:54:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:34:54:febtest:INFO: Init all SMX (CSA): 30
14:35:09:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:35:09:febtest:INFO: 23-00 | XA-000-09-004-019-013-019-10 | 34.6 | 1177.4
14:35:10:febtest:INFO: 30-01 | XA-000-09-004-017-009-022-05 | 31.4 | 1183.3
14:35:10:febtest:INFO: 21-02 | XA-000-09-004-019-016-016-01 | 37.7 | 1153.7
14:35:10:febtest:INFO: 28-03 | XA-000-09-004-017-012-022-14 | 40.9 | 1153.7
14:35:10:febtest:INFO: 19-04 | XA-000-09-004-017-016-016-08 | 31.4 | 1195.1
14:35:10:febtest:INFO: 26-05 | XA-000-09-004-017-014-016-13 | 37.7 | 1165.6
14:35:11:febtest:INFO: 17-06 | XA-000-09-004-019-016-020-01 | 25.1 | 1218.6
14:35:11:febtest:INFO: 24-07 | XA-000-09-004-017-006-019-01 | 37.7 | 1153.7
14:35:12:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:35:14:ST3_smx:INFO: chip: 23-0 34.556970 C 1195.082160 mV
14:35:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:14:ST3_smx:INFO: Electrons
14:35:14:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:35:16:ST3_smx:INFO: ----> Checking Analog response
14:35:16:ST3_smx:INFO: ----> Checking broken channels
14:35:17:ST3_smx:INFO: Total # broken ch: 0
14:35:17:ST3_smx:INFO: List FAST: []
14:35:17:ST3_smx:INFO: List SLOW: []
14:35:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:17:ST3_smx:INFO: Holes
14:35:17:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:35:19:ST3_smx:INFO: ----> Checking Analog response
14:35:19:ST3_smx:INFO: ----> Checking broken channels
14:35:19:ST3_smx:INFO: Total # broken ch: 0
14:35:19:ST3_smx:INFO: List FAST: []
14:35:19:ST3_smx:INFO: List SLOW: []
14:35:21:ST3_smx:INFO: chip: 30-1 28.225000 C 1195.082160 mV
14:35:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:21:ST3_smx:INFO: Electrons
14:35:21:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:35:23:ST3_smx:INFO: ----> Checking Analog response
14:35:23:ST3_smx:INFO: ----> Checking broken channels
14:35:23:ST3_smx:INFO: Total # broken ch: 0
14:35:23:ST3_smx:INFO: List FAST: []
14:35:23:ST3_smx:INFO: List SLOW: []
14:35:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:23:ST3_smx:INFO: Holes
14:35:23:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:35:26:ST3_smx:INFO: ----> Checking Analog response
14:35:26:ST3_smx:INFO: ----> Checking broken channels
14:35:26:ST3_smx:INFO: Total # broken ch: 0
14:35:26:ST3_smx:INFO: List FAST: []
14:35:26:ST3_smx:INFO: List SLOW: []
14:35:27:ST3_smx:INFO: chip: 21-2 37.726682 C 1165.571835 mV
14:35:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:27:ST3_smx:INFO: Electrons
14:35:27:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:35:30:ST3_smx:INFO: ----> Checking Analog response
14:35:30:ST3_smx:INFO: ----> Checking broken channels
14:35:30:ST3_smx:INFO: Total # broken ch: 0
14:35:30:ST3_smx:INFO: List FAST: []
14:35:30:ST3_smx:INFO: List SLOW: []
14:35:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:30:ST3_smx:INFO: Holes
14:35:30:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:35:32:ST3_smx:INFO: ----> Checking Analog response
14:35:32:ST3_smx:INFO: ----> Checking broken channels
14:35:33:ST3_smx:INFO: Total # broken ch: 0
14:35:33:ST3_smx:INFO: List FAST: []
14:35:33:ST3_smx:INFO: List SLOW: []
14:35:34:ST3_smx:INFO: chip: 28-3 37.726682 C 1165.571835 mV
14:35:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:34:ST3_smx:INFO: Electrons
14:35:34:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:35:36:ST3_smx:INFO: ----> Checking Analog response
14:35:36:ST3_smx:INFO: ----> Checking broken channels
14:35:37:ST3_smx:INFO: Total # broken ch: 0
14:35:37:ST3_smx:INFO: List FAST: []
14:35:37:ST3_smx:INFO: List SLOW: []
14:35:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:37:ST3_smx:INFO: Holes
14:35:37:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:35:39:ST3_smx:INFO: ----> Checking Analog response
14:35:39:ST3_smx:INFO: ----> Checking broken channels
14:35:39:ST3_smx:INFO: Total # broken ch: 0
14:35:39:ST3_smx:INFO: List FAST: []
14:35:39:ST3_smx:INFO: List SLOW: []
14:35:41:ST3_smx:INFO: chip: 19-4 31.389742 C 1212.728715 mV
14:35:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:41:ST3_smx:INFO: Electrons
14:35:41:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:35:43:ST3_smx:INFO: ----> Checking Analog response
14:35:43:ST3_smx:INFO: ----> Checking broken channels
14:35:43:ST3_smx:INFO: Total # broken ch: 0
14:35:43:ST3_smx:INFO: List FAST: []
14:35:43:ST3_smx:INFO: List SLOW: []
14:35:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:43:ST3_smx:INFO: Holes
14:35:43:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:35:46:ST3_smx:INFO: ----> Checking Analog response
14:35:46:ST3_smx:INFO: ----> Checking broken channels
14:35:46:ST3_smx:INFO: Total # broken ch: 0
14:35:46:ST3_smx:INFO: List FAST: []
14:35:46:ST3_smx:INFO: List SLOW: []
14:35:47:ST3_smx:INFO: chip: 26-5 34.556970 C 1177.390875 mV
14:35:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:47:ST3_smx:INFO: Electrons
14:35:47:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:35:50:ST3_smx:INFO: ----> Checking Analog response
14:35:50:ST3_smx:INFO: ----> Checking broken channels
14:35:50:ST3_smx:INFO: Total # broken ch: 0
14:35:50:ST3_smx:INFO: List FAST: []
14:35:50:ST3_smx:INFO: List SLOW: []
14:35:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:50:ST3_smx:INFO: Holes
14:35:50:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:35:52:ST3_smx:INFO: ----> Checking Analog response
14:35:52:ST3_smx:INFO: ----> Checking broken channels
14:35:53:ST3_smx:INFO: Total # broken ch: 0
14:35:53:ST3_smx:INFO: List FAST: []
14:35:53:ST3_smx:INFO: List SLOW: []
14:35:54:ST3_smx:INFO: chip: 17-6 25.062742 C 1236.187875 mV
14:35:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:54:ST3_smx:INFO: Electrons
14:35:54:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:35:56:ST3_smx:INFO: ----> Checking Analog response
14:35:56:ST3_smx:INFO: ----> Checking broken channels
14:35:57:ST3_smx:INFO: Total # broken ch: 0
14:35:57:ST3_smx:INFO: List FAST: []
14:35:57:ST3_smx:INFO: List SLOW: []
14:35:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:57:ST3_smx:INFO: Holes
14:35:57:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:35:59:ST3_smx:INFO: ----> Checking Analog response
14:35:59:ST3_smx:INFO: ----> Checking broken channels
14:35:59:ST3_smx:INFO: Total # broken ch: 0
14:35:59:ST3_smx:INFO: List FAST: []
14:35:59:ST3_smx:INFO: List SLOW: []
14:36:01:ST3_smx:INFO: chip: 24-7 40.898880 C 1165.571835 mV
14:36:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:01:ST3_smx:INFO: Electrons
14:36:01:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:36:03:ST3_smx:INFO: ----> Checking Analog response
14:36:03:ST3_smx:INFO: ----> Checking broken channels
14:36:03:ST3_smx:INFO: Total # broken ch: 0
14:36:03:ST3_smx:INFO: List FAST: []
14:36:03:ST3_smx:INFO: List SLOW: []
14:36:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:03:ST3_smx:INFO: Holes
14:36:03:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:36:06:ST3_smx:INFO: ----> Checking Analog response
14:36:06:ST3_smx:INFO: ----> Checking broken channels
14:36:06:ST3_smx:INFO: Total # broken ch: 0
14:36:06:ST3_smx:INFO: List FAST: []
14:36:06:ST3_smx:INFO: List SLOW: []
14:36:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:36:06:febtest:INFO: 23-00 | XA-000-09-004-019-013-019-10 | 34.6 | 1259.6
14:36:06:febtest:INFO: 30-01 | XA-000-09-004-017-009-022-05 | 31.4 | 1218.6
14:36:06:febtest:INFO: 21-02 | XA-000-09-004-019-016-016-01 | 40.9 | 1183.3
14:36:07:febtest:INFO: 28-03 | XA-000-09-004-017-012-022-14 | 40.9 | 1183.3
14:36:07:febtest:INFO: 19-04 | XA-000-09-004-017-016-016-08 | 31.4 | 1282.9
14:36:07:febtest:INFO: 26-05 | XA-000-09-004-017-014-016-13 | 37.7 | 1195.1
14:36:07:febtest:INFO: 17-06 | XA-000-09-004-019-016-020-01 | 25.1 | 1317.7
14:36:07:febtest:INFO: 24-07 | XA-000-09-004-017-006-019-01 | 40.9 | 1177.4
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_12_16-14_34_42
OPERATOR : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2273| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
MODULE_NAME
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9740', '1.848', '2.0930']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9880', '1.850', '2.6070']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9980', '1.850', '0.5304']