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FEB_2274 22.11.24 09:59:57
TextEdit.txt
09:59:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:59:57:ST3_Shared:INFO: FEB-ASIC
09:59:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:59:59:ST3_Shared:INFO: STS mode selected
09:59:59:febtest:INFO: Testing FEB with SN 2274
10:00:01:smx_tester:INFO: Scanning setup
10:00:01:elinks:INFO: Disabling clock on downlink 0
10:00:01:elinks:INFO: Disabling clock on downlink 1
10:00:01:elinks:INFO: Disabling clock on downlink 2
10:00:01:elinks:INFO: Disabling clock on downlink 3
10:00:01:elinks:INFO: Disabling clock on downlink 4
10:00:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:00:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:00:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:00:01:elinks:INFO: Disabling clock on downlink 0
10:00:01:elinks:INFO: Disabling clock on downlink 1
10:00:01:elinks:INFO: Disabling clock on downlink 2
10:00:01:elinks:INFO: Disabling clock on downlink 3
10:00:01:elinks:INFO: Disabling clock on downlink 4
10:00:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:00:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:00:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:00:01:elinks:INFO: Disabling clock on downlink 0
10:00:01:elinks:INFO: Disabling clock on downlink 1
10:00:01:elinks:INFO: Disabling clock on downlink 2
10:00:01:elinks:INFO: Disabling clock on downlink 3
10:00:01:elinks:INFO: Disabling clock on downlink 4
10:00:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:00:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:00:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:00:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:00:01:elinks:INFO: Disabling clock on downlink 0
10:00:01:elinks:INFO: Disabling clock on downlink 1
10:00:01:elinks:INFO: Disabling clock on downlink 2
10:00:01:elinks:INFO: Disabling clock on downlink 3
10:00:01:elinks:INFO: Disabling clock on downlink 4
10:00:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:00:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:00:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:00:02:elinks:INFO: Disabling clock on downlink 0
10:00:02:elinks:INFO: Disabling clock on downlink 1
10:00:02:elinks:INFO: Disabling clock on downlink 2
10:00:02:elinks:INFO: Disabling clock on downlink 3
10:00:02:elinks:INFO: Disabling clock on downlink 4
10:00:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:00:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:00:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:00:02:setup_element:INFO: Scanning clock phase
10:00:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:00:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:00:02:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:00:02:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:00:02:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:00:02:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:00:02:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:00:02:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:00:02:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:00:02:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:00:02:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:00:02:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
10:00:02:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
10:00:02:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:00:02:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:00:02:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:00:02:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:00:02:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:00:02:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:00:02:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
10:00:02:setup_element:INFO: Scanning data phases
10:00:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:00:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:00:07:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:00:07:setup_element:INFO: Eye window for uplink 16: __XXXX__________________________________
Data delay found: 23
10:00:07:setup_element:INFO: Eye window for uplink 17: XXXXX__________________________________X
Data delay found: 21
10:00:07:setup_element:INFO: Eye window for uplink 18: XXX__________________XXXXXXXXXXXXXXXXXXX
Data delay found: 11
10:00:08:setup_element:INFO: Eye window for uplink 19: X____________________XXXXXXXXXXXXXXXXXXX
Data delay found: 10
10:00:08:setup_element:INFO: Eye window for uplink 20: XXX__________________________________XXX
Data delay found: 19
10:00:08:setup_element:INFO: Eye window for uplink 21: X___________________________________XXXX
Data delay found: 18
10:00:08:setup_element:INFO: Eye window for uplink 22: XXXXX_________________________________XX
Data delay found: 21
10:00:08:setup_element:INFO: Eye window for uplink 23: XXXXXXX_____________________________XXXX
Data delay found: 21
10:00:08:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
10:00:08:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
10:00:08:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
10:00:08:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
10:00:08:setup_element:INFO: Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
10:00:08:setup_element:INFO: Eye window for uplink 29: ________________XXXXXX__________________
Data delay found: 38
10:00:08:setup_element:INFO: Eye window for uplink 30: __________________XXXXX_________________
Data delay found: 0
10:00:08:setup_element:INFO: Eye window for uplink 31: _________________XXXXXXX________________
Data delay found: 0
10:00:08:setup_element:INFO: Setting the data phase to 23 for uplink 16
10:00:08:setup_element:INFO: Setting the data phase to 21 for uplink 17
10:00:08:setup_element:INFO: Setting the data phase to 11 for uplink 18
10:00:08:setup_element:INFO: Setting the data phase to 10 for uplink 19
10:00:08:setup_element:INFO: Setting the data phase to 19 for uplink 20
10:00:08:setup_element:INFO: Setting the data phase to 18 for uplink 21
10:00:08:setup_element:INFO: Setting the data phase to 21 for uplink 22
10:00:08:setup_element:INFO: Setting the data phase to 21 for uplink 23
10:00:08:setup_element:INFO: Setting the data phase to 28 for uplink 24
10:00:08:setup_element:INFO: Setting the data phase to 30 for uplink 25
10:00:08:setup_element:INFO: Setting the data phase to 32 for uplink 26
10:00:08:setup_element:INFO: Setting the data phase to 35 for uplink 27
10:00:08:setup_element:INFO: Setting the data phase to 36 for uplink 28
10:00:08:setup_element:INFO: Setting the data phase to 38 for uplink 29
10:00:08:setup_element:INFO: Setting the data phase to 0 for uplink 30
10:00:08:setup_element:INFO: Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
10:00:08:setup_element:INFO: Beginning SMX ASICs map scan
10:00:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:00:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:00:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:00:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:00:08:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:00:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:00:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:00:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:00:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:00:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:00:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:00:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:00:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:00:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:00:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:00:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:00:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:00:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:00:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:00:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:00:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:00:10:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXXXX_
Uplink 17: ______________________________________________________________________XXXXXXXXX_
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: _____________________________________________________________________XXXXXXXX___
Uplink 21: _____________________________________________________________________XXXXXXXX___
Uplink 22: _____________________________________________________________________XXXXXXXX___
Uplink 23: _____________________________________________________________________XXXXXXXX___
Uplink 24: ________________________________________________________________________________
Uplink 25: ________________________________________________________________________________
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: _____________________________________________________________________XXXXXXXXX__
Uplink 29: _____________________________________________________________________XXXXXXXXX__
Uplink 30: _______________________________________________________________________XXXXXXX__
Uplink 31: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 17:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 18:
Optimal Phase: 11
Window Length: 18
Eye Window: XXX__________________XXXXXXXXXXXXXXXXXXX
Uplink 19:
Optimal Phase: 10
Window Length: 20
Eye Window: X____________________XXXXXXXXXXXXXXXXXXX
Uplink 20:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 21:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 22:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 23:
Optimal Phase: 21
Window Length: 29
Eye Window: XXXXXXX_____________________________XXXX
Uplink 24:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 27:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 28:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 29:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 30:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 31:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
==============================================OOO==============================================
10:00:10:setup_element:INFO: Performing Elink synchronization
10:00:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:00:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:00:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:00:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:00:10:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:00:10:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:00:11:febtest:INFO: Init all SMX (CSA): 30
10:00:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:00:25:febtest:INFO: 23-00 | XA-000-09-004-017-018-014-12 | 34.6 | 1171.5
10:00:25:febtest:INFO: 30-01 | XA-000-09-004-019-012-016-07 | 50.4 | 1135.9
10:00:25:febtest:INFO: 21-02 | XA-000-09-004-019-014-022-04 | 34.6 | 1224.5
10:00:26:febtest:INFO: 28-03 | XA-000-09-004-017-018-009-12 | 47.3 | 1135.9
10:00:26:febtest:INFO: 19-04 | XA-000-09-004-019-009-005-11 | 34.6 | 1201.0
10:00:26:febtest:INFO: 26-05 | XA-000-09-004-019-015-020-09 | 37.7 | 1177.4
10:00:26:febtest:INFO: 17-06 | XA-000-09-004-019-017-007-11 | 31.4 | 1236.2
10:00:26:febtest:INFO: 24-07 | XA-000-09-004-019-010-015-05 | 53.6 | 1124.0
10:00:28:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:00:30:ST3_smx:INFO: chip: 23-0 34.556970 C 1183.292940 mV
10:00:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:30:ST3_smx:INFO: Electrons
10:00:30:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:00:32:ST3_smx:INFO: ----> Checking Analog response
10:00:32:ST3_smx:INFO: ----> Checking broken channels
10:00:32:ST3_smx:INFO: Total # broken ch: 0
10:00:32:ST3_smx:INFO: List FAST: []
10:00:32:ST3_smx:INFO: List SLOW: []
10:00:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:32:ST3_smx:INFO: Holes
10:00:32:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:00:34:ST3_smx:INFO: ----> Checking Analog response
10:00:34:ST3_smx:INFO: ----> Checking broken channels
10:00:35:ST3_smx:INFO: Total # broken ch: 0
10:00:35:ST3_smx:INFO: List FAST: []
10:00:35:ST3_smx:INFO: List SLOW: []
10:00:36:ST3_smx:INFO: chip: 30-1 47.250730 C 1147.806000 mV
10:00:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:36:ST3_smx:INFO: Electrons
10:00:36:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:00:38:ST3_smx:INFO: ----> Checking Analog response
10:00:38:ST3_smx:INFO: ----> Checking broken channels
10:00:39:ST3_smx:INFO: Total # broken ch: 0
10:00:39:ST3_smx:INFO: List FAST: []
10:00:39:ST3_smx:INFO: List SLOW: []
10:00:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:39:ST3_smx:INFO: Holes
10:00:39:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:00:41:ST3_smx:INFO: ----> Checking Analog response
10:00:41:ST3_smx:INFO: ----> Checking broken channels
10:00:41:ST3_smx:INFO: Total # broken ch: 0
10:00:41:ST3_smx:INFO: List FAST: []
10:00:41:ST3_smx:INFO: List SLOW: []
10:00:43:ST3_smx:INFO: chip: 21-2 31.389742 C 1247.887635 mV
10:00:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:43:ST3_smx:INFO: Electrons
10:00:43:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:00:45:ST3_smx:INFO: ----> Checking Analog response
10:00:45:ST3_smx:INFO: ----> Checking broken channels
10:00:45:ST3_smx:INFO: Total # broken ch: 0
10:00:45:ST3_smx:INFO: List FAST: []
10:00:45:ST3_smx:INFO: List SLOW: []
10:00:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:45:ST3_smx:INFO: Holes
10:00:45:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:00:47:ST3_smx:INFO: ----> Checking Analog response
10:00:47:ST3_smx:INFO: ----> Checking broken channels
10:00:48:ST3_smx:INFO: Total # broken ch: 0
10:00:48:ST3_smx:INFO: List FAST: []
10:00:48:ST3_smx:INFO: List SLOW: []
10:00:49:ST3_smx:INFO: chip: 28-3 44.073563 C 1153.732915 mV
10:00:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:49:ST3_smx:INFO: Electrons
10:00:49:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:00:51:ST3_smx:INFO: ----> Checking Analog response
10:00:51:ST3_smx:INFO: ----> Checking broken channels
10:00:52:ST3_smx:INFO: Total # broken ch: 0
10:00:52:ST3_smx:INFO: List FAST: []
10:00:52:ST3_smx:INFO: List SLOW: []
10:00:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:52:ST3_smx:INFO: Holes
10:00:52:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:00:54:ST3_smx:INFO: ----> Checking Analog response
10:00:54:ST3_smx:INFO: ----> Checking broken channels
10:00:54:ST3_smx:INFO: Total # broken ch: 0
10:00:54:ST3_smx:INFO: List FAST: []
10:00:54:ST3_smx:INFO: List SLOW: []
10:00:56:ST3_smx:INFO: chip: 19-4 34.556970 C 1236.187875 mV
10:00:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:56:ST3_smx:INFO: Electrons
10:00:56:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:00:58:ST3_smx:INFO: ----> Checking Analog response
10:00:58:ST3_smx:INFO: ----> Checking broken channels
10:00:58:ST3_smx:INFO: Total # broken ch: 0
10:00:58:ST3_smx:INFO: List FAST: []
10:00:58:ST3_smx:INFO: List SLOW: []
10:00:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:58:ST3_smx:INFO: Holes
10:00:58:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:01:00:ST3_smx:INFO: ----> Checking Analog response
10:01:00:ST3_smx:INFO: ----> Checking broken channels
10:01:01:ST3_smx:INFO: Total # broken ch: 0
10:01:01:ST3_smx:INFO: List FAST: []
10:01:01:ST3_smx:INFO: List SLOW: []
10:01:02:ST3_smx:INFO: chip: 26-5 37.726682 C 1195.082160 mV
10:01:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:01:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:01:02:ST3_smx:INFO: Electrons
10:01:02:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:01:04:ST3_smx:INFO: ----> Checking Analog response
10:01:04:ST3_smx:INFO: ----> Checking broken channels
10:01:05:ST3_smx:INFO: Total # broken ch: 0
10:01:05:ST3_smx:INFO: List FAST: []
10:01:05:ST3_smx:INFO: List SLOW: []
10:01:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:01:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:01:05:ST3_smx:INFO: Holes
10:01:05:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:01:07:ST3_smx:INFO: ----> Checking Analog response
10:01:07:ST3_smx:INFO: ----> Checking broken channels
10:01:07:ST3_smx:INFO: Total # broken ch: 0
10:01:07:ST3_smx:INFO: List FAST: []
10:01:07:ST3_smx:INFO: List SLOW: []
10:01:08:ST3_smx:INFO: chip: 17-6 31.389742 C 1265.400000 mV
10:01:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:01:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:01:08:ST3_smx:INFO: Electrons
10:01:08:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:01:11:ST3_smx:INFO: ----> Checking Analog response
10:01:11:ST3_smx:INFO: ----> Checking broken channels
10:01:11:ST3_smx:INFO: Total # broken ch: 0
10:01:11:ST3_smx:INFO: List FAST: []
10:01:11:ST3_smx:INFO: List SLOW: []
10:01:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:01:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:01:11:ST3_smx:INFO: Holes
10:01:11:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:01:13:ST3_smx:INFO: ----> Checking Analog response
10:01:13:ST3_smx:INFO: ----> Checking broken channels
10:01:13:ST3_smx:INFO: Total # broken ch: 0
10:01:13:ST3_smx:INFO: List FAST: []
10:01:13:ST3_smx:INFO: List SLOW: []
10:01:15:ST3_smx:INFO: chip: 24-7 53.612520 C 1129.995435 mV
10:01:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:01:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:01:15:ST3_smx:INFO: Electrons
10:01:15:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:01:17:ST3_smx:INFO: ----> Checking Analog response
10:01:17:ST3_smx:INFO: ----> Checking broken channels
10:01:18:ST3_smx:INFO: Total # broken ch: 0
10:01:18:ST3_smx:INFO: List FAST: []
10:01:18:ST3_smx:INFO: List SLOW: []
10:01:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:01:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:01:18:ST3_smx:INFO: Holes
10:01:18:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:01:20:ST3_smx:INFO: ----> Checking Analog response
10:01:20:ST3_smx:INFO: ----> Checking broken channels
10:01:20:ST3_smx:INFO: Total # broken ch: 0
10:01:20:ST3_smx:INFO: List FAST: []
10:01:20:ST3_smx:INFO: List SLOW: []
10:01:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:01:20:febtest:INFO: 23-00 | XA-000-09-004-017-018-014-12 | 37.7 | 1206.9
10:01:21:febtest:INFO: 30-01 | XA-000-09-004-019-012-016-07 | 50.4 | 1165.6
10:01:21:febtest:INFO: 21-02 | XA-000-09-004-019-014-022-04 | 31.4 | 1578.5
10:01:21:febtest:INFO: 28-03 | XA-000-09-004-017-018-009-12 | 47.3 | 1165.6
10:01:21:febtest:INFO: 19-04 | XA-000-09-004-019-009-005-11 | 31.4 | 1578.5
10:01:22:febtest:INFO: 26-05 | XA-000-09-004-019-015-020-09 | 37.7 | 1224.5
10:01:22:febtest:INFO: 17-06 | XA-000-09-004-019-017-007-11 | 28.2 | 1578.5
10:01:22:febtest:INFO: 24-07 | XA-000-09-004-019-010-015-05 | 56.8 | 1147.8
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_11_22-09_59_57
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2274| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
MODULE_NAME
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0250', '1.848', '2.3310']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9970', '1.850', '2.5870']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9950', '1.850', '0.5240']