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FEB_2276 07.11.24 10:04:41
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10:04:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:04:41:ST3_Shared:INFO: FEB-Microcable
10:04:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:04:41:febtest:INFO: Testing FEB with SN 2276
10:04:43:smx_tester:INFO: Scanning setup
10:04:43:elinks:INFO: Disabling clock on downlink 0
10:04:43:elinks:INFO: Disabling clock on downlink 1
10:04:43:elinks:INFO: Disabling clock on downlink 2
10:04:43:elinks:INFO: Disabling clock on downlink 3
10:04:43:elinks:INFO: Disabling clock on downlink 4
10:04:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:04:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:04:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:04:43:elinks:INFO: Disabling clock on downlink 0
10:04:43:elinks:INFO: Disabling clock on downlink 1
10:04:43:elinks:INFO: Disabling clock on downlink 2
10:04:43:elinks:INFO: Disabling clock on downlink 3
10:04:43:elinks:INFO: Disabling clock on downlink 4
10:04:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:04:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:04:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:04:43:elinks:INFO: Disabling clock on downlink 0
10:04:43:elinks:INFO: Disabling clock on downlink 1
10:04:43:elinks:INFO: Disabling clock on downlink 2
10:04:43:elinks:INFO: Disabling clock on downlink 3
10:04:43:elinks:INFO: Disabling clock on downlink 4
10:04:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:04:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:04:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:04:43:elinks:INFO: Disabling clock on downlink 0
10:04:43:elinks:INFO: Disabling clock on downlink 1
10:04:43:elinks:INFO: Disabling clock on downlink 2
10:04:43:elinks:INFO: Disabling clock on downlink 3
10:04:43:elinks:INFO: Disabling clock on downlink 4
10:04:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:04:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:04:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:04:43:elinks:INFO: Disabling clock on downlink 0
10:04:43:elinks:INFO: Disabling clock on downlink 1
10:04:43:elinks:INFO: Disabling clock on downlink 2
10:04:43:elinks:INFO: Disabling clock on downlink 3
10:04:43:elinks:INFO: Disabling clock on downlink 4
10:04:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:04:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:04:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:04:43:setup_element:INFO: Scanning clock phase
10:04:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:04:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:04:44:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:04:44:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
10:04:44:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
10:04:44:setup_element:INFO: Eye window for uplink 18: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
10:04:44:setup_element:INFO: Eye window for uplink 19: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
10:04:44:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:04:44:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:04:44:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:04:44:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:04:44:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:04:44:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:04:44:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
10:04:44:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
10:04:44:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:04:44:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:04:44:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
10:04:44:setup_element:INFO: Scanning data phases
10:04:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:04:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:04:49:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:04:49:setup_element:INFO: Eye window for uplink 16: __XXXX__________________________________
Data delay found: 23
10:04:49:setup_element:INFO: Eye window for uplink 17: _XXXX__________________________________X
Data delay found: 21
10:04:49:setup_element:INFO: Eye window for uplink 18: ______________________________XXXXX_____
Data delay found: 12
10:04:49:setup_element:INFO: Eye window for uplink 19: ____________________________XXXXX_______
Data delay found: 10
10:04:49:setup_element:INFO: Eye window for uplink 22: XXXX_________________________________XXX
Data delay found: 20
10:04:49:setup_element:INFO: Eye window for uplink 23: XXXXXXX_____________________________XXXX
Data delay found: 21
10:04:49:setup_element:INFO: Eye window for uplink 24: _____________XXXXX______________________
Data delay found: 35
10:04:49:setup_element:INFO: Eye window for uplink 25: _______________XXXXX____________________
Data delay found: 37
10:04:49:setup_element:INFO: Eye window for uplink 26: _____________XXXXX______________________
Data delay found: 35
10:04:49:setup_element:INFO: Eye window for uplink 27: _________________XXXXXX_________________
Data delay found: 39
10:04:49:setup_element:INFO: Eye window for uplink 28: ___________________XXXXX________________
Data delay found: 1
10:04:49:setup_element:INFO: Eye window for uplink 29: _____________________XXXXXX_____________
Data delay found: 3
10:04:50:setup_element:INFO: Eye window for uplink 30: ____________________XXXXXX______________
Data delay found: 2
10:04:50:setup_element:INFO: Eye window for uplink 31: _____________________XXXXXX_____________
Data delay found: 3
10:04:50:setup_element:INFO: Setting the data phase to 23 for uplink 16
10:04:50:setup_element:INFO: Setting the data phase to 21 for uplink 17
10:04:50:setup_element:INFO: Setting the data phase to 12 for uplink 18
10:04:50:setup_element:INFO: Setting the data phase to 10 for uplink 19
10:04:50:setup_element:INFO: Setting the data phase to 20 for uplink 22
10:04:50:setup_element:INFO: Setting the data phase to 21 for uplink 23
10:04:50:setup_element:INFO: Setting the data phase to 35 for uplink 24
10:04:50:setup_element:INFO: Setting the data phase to 37 for uplink 25
10:04:50:setup_element:INFO: Setting the data phase to 35 for uplink 26
10:04:50:setup_element:INFO: Setting the data phase to 39 for uplink 27
10:04:50:setup_element:INFO: Setting the data phase to 1 for uplink 28
10:04:50:setup_element:INFO: Setting the data phase to 3 for uplink 29
10:04:50:setup_element:INFO: Setting the data phase to 2 for uplink 30
10:04:50:setup_element:INFO: Setting the data phase to 3 for uplink 31
==============================================OOO==============================================
10:04:50:setup_element:INFO: Beginning SMX ASICs map scan
10:04:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:04:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:04:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:04:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:04:50:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:04:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:04:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:04:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:04:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:04:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:04:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:04:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:04:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:04:51:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:04:51:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:04:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:04:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:04:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:04:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:04:52:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 66
Eye Windows:
Uplink 16: ________________________________________________________________________________
Uplink 17: ________________________________________________________________________________
Uplink 18: __________________________________________________________________XXXXXXX_______
Uplink 19: __________________________________________________________________XXXXXXX_______
Uplink 22: _____________________________________________________________________XXXXXXXXX__
Uplink 23: _____________________________________________________________________XXXXXXXXX__
Uplink 24: _______________________________________________________________________XXXXXXX__
Uplink 25: _______________________________________________________________________XXXXXXX__
Uplink 26: _______________________________________________________________________XXXXXXX__
Uplink 27: _______________________________________________________________________XXXXXXX__
Uplink 28: ________________________________________________________________________________
Uplink 29: ________________________________________________________________________________
Uplink 30: ________________________________________________________________________XXXXXXXX
Uplink 31: ________________________________________________________________________XXXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 17:
Optimal Phase: 21
Window Length: 34
Eye Window: _XXXX__________________________________X
Uplink 18:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 19:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 22:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 23:
Optimal Phase: 21
Window Length: 29
Eye Window: XXXXXXX_____________________________XXXX
Uplink 24:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 25:
Optimal Phase: 37
Window Length: 35
Eye Window: _______________XXXXX____________________
Uplink 26:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 27:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 28:
Optimal Phase: 1
Window Length: 35
Eye Window: ___________________XXXXX________________
Uplink 29:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
Uplink 30:
Optimal Phase: 2
Window Length: 34
Eye Window: ____________________XXXXXX______________
Uplink 31:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
==============================================OOO==============================================
10:04:52:setup_element:INFO: Performing Elink synchronization
10:04:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:04:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:04:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:04:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:04:52:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:04:52:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:04:53:febtest:INFO: Init all SMX (CSA): 30
10:05:05:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:05:05:febtest:INFO: 23-00 | XA-000-09-004-005-014-014-14 | 18.7 | 1189.2
10:05:05:febtest:INFO: 30-01 | XA-000-08-002-003-007-164-03 | 6.1 | 1224.5
10:05:06:febtest:INFO: 28-03 | XA-000-09-004-005-018-020-15 | 25.1 | 1171.5
10:05:06:febtest:INFO: 19-04 | XA-013-08-002-003-007-021-02 | 31.4 | 1177.4
10:05:06:febtest:INFO: 26-05 | XA-000-09-004-005-018-019-15 | 21.9 | 1177.4
10:05:06:febtest:INFO: 17-06 | XA-000-08-002-003-007-165-03 | 28.2 | 1183.3
10:05:07:febtest:INFO: 24-07 | XA-000-09-004-004-018-011-00 | 31.4 | 1153.7
10:05:08:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:05:08:febtest:ERROR: HW addres 3 != 2
10:05:11:ST3_smx:INFO: chip: 23-0 18.745682 C 1200.969315 mV
10:05:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:05:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:05:11:ST3_smx:INFO: Electrons
10:05:11:ST3_smx:INFO: # loops 0
10:05:13:ST3_smx:INFO: # loops 1
10:05:14:ST3_smx:INFO: # loops 2
10:05:16:ST3_smx:INFO: Total # of broken channels: 1
10:05:16:ST3_smx:INFO: List of broken channels: [2]
10:05:16:ST3_smx:INFO: Total # of broken channels: 8
10:05:16:ST3_smx:INFO: List of broken channels: [2, 20, 26, 32, 33, 104, 106, 118]
10:05:18:ST3_smx:INFO: chip: 30-1 6.141382 C 1236.187875 mV
10:05:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:05:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:05:18:ST3_smx:INFO: Electrons
10:05:18:ST3_smx:INFO: # loops 0
10:05:19:ST3_smx:INFO: # loops 1
10:05:21:ST3_smx:INFO: # loops 2
10:05:23:ST3_smx:INFO: Total # of broken channels: 1
10:05:23:ST3_smx:INFO: List of broken channels: [55]
10:05:23:ST3_smx:INFO: Total # of broken channels: 6
10:05:23:ST3_smx:INFO: List of broken channels: [1, 11, 13, 19, 25, 31]
10:05:24:ST3_smx:INFO: chip: 28-3 21.902970 C 1183.292940 mV
10:05:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:05:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:05:24:ST3_smx:INFO: Electrons
10:05:24:ST3_smx:INFO: # loops 0
10:05:26:ST3_smx:INFO: # loops 1
10:05:28:ST3_smx:INFO: # loops 2
10:05:29:ST3_smx:INFO: Total # of broken channels: 0
10:05:29:ST3_smx:INFO: List of broken channels: []
10:05:29:ST3_smx:INFO: Total # of broken channels: 9
10:05:29:ST3_smx:INFO: List of broken channels: [2, 3, 5, 7, 9, 10, 13, 24, 50]
10:05:31:ST3_smx:INFO: chip: 19-4 31.389742 C 1183.292940 mV
10:05:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:05:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:05:31:ST3_smx:INFO: Electrons
10:05:31:ST3_smx:INFO: # loops 0
10:05:32:ST3_smx:INFO: # loops 1
10:05:34:ST3_smx:INFO: # loops 2
10:05:36:ST3_smx:INFO: Total # of broken channels: 0
10:05:36:ST3_smx:INFO: List of broken channels: []
10:05:36:ST3_smx:INFO: Total # of broken channels: 3
10:05:36:ST3_smx:INFO: List of broken channels: [0, 4, 6]
10:05:37:ST3_smx:INFO: chip: 26-5 21.902970 C 1195.082160 mV
10:05:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:05:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:05:37:ST3_smx:INFO: Electrons
10:05:37:ST3_smx:INFO: # loops 0
10:05:39:ST3_smx:INFO: # loops 1
10:05:40:ST3_smx:INFO: # loops 2
10:05:42:ST3_smx:INFO: Total # of broken channels: 1
10:05:42:ST3_smx:INFO: List of broken channels: [27]
10:05:42:ST3_smx:INFO: Total # of broken channels: 1
10:05:42:ST3_smx:INFO: List of broken channels: [68]
10:05:44:ST3_smx:INFO: chip: 17-6 28.225000 C 1189.190035 mV
10:05:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:05:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:05:44:ST3_smx:INFO: Electrons
10:05:44:ST3_smx:INFO: # loops 0
10:05:45:ST3_smx:INFO: # loops 1
10:05:47:ST3_smx:INFO: # loops 2
10:05:48:ST3_smx:INFO: Total # of broken channels: 0
10:05:48:ST3_smx:INFO: List of broken channels: []
10:05:48:ST3_smx:INFO: Total # of broken channels: 0
10:05:48:ST3_smx:INFO: List of broken channels: []
10:05:50:ST3_smx:INFO: chip: 24-7 34.556970 C 1171.483840 mV
10:05:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:05:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:05:50:ST3_smx:INFO: Electrons
10:05:50:ST3_smx:INFO: # loops 0
10:05:52:ST3_smx:INFO: # loops 1
10:05:53:ST3_smx:INFO: # loops 2
10:05:55:ST3_smx:INFO: Total # of broken channels: 0
10:05:55:ST3_smx:INFO: List of broken channels: []
10:05:55:ST3_smx:INFO: Total # of broken channels: 1
10:05:55:ST3_smx:INFO: List of broken channels: [118]
10:05:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:05:55:febtest:INFO: 23-00 | XA-000-09-004-005-014-014-14 | 21.9 | 1218.6
10:05:56:febtest:INFO: 30-01 | XA-000-08-002-003-007-164-03 | 9.3 | 1259.6
10:05:56:febtest:INFO: 28-03 | XA-000-09-004-005-018-020-15 | 25.1 | 1201.0
10:05:56:febtest:INFO: 19-04 | XA-013-08-002-003-007-021-02 | 31.4 | 1206.9
10:05:56:febtest:INFO: 26-05 | XA-000-09-004-005-018-019-15 | 21.9 | 1212.7
10:05:57:febtest:INFO: 17-06 | XA-000-08-002-003-007-165-03 | 28.2 | 1212.7
10:05:57:febtest:INFO: 24-07 | XA-000-09-004-004-018-011-00 | 31.4 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_07-10_04_41
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2276| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '1.4470', '1.848', '2.2870']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9400', '1.850', '2.4750']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9030', '1.850', '0.7409']