
FEB_2282 20.11.24 09:26:13
TextEdit.txt
09:26:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:26:13:ST3_Shared:INFO: FEB-Sensor 09:26:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:26:15:ST3_Shared:INFO: STS mode selected 09:26:21:ST3_ModuleSelector:DEBUG: M3DR6T0000150B2 09:26:21:ST3_ModuleSelector:DEBUG: L3DR600015 09:26:21:ST3_ModuleSelector:DEBUG: 15103 09:26:21:ST3_ModuleSelector:DEBUG: 62x62 09:26:21:ST3_ModuleSelector:DEBUG: B 09:26:21:ST3_ModuleSelector:DEBUG: M3DR6T0000150B2 09:26:21:ST3_ModuleSelector:DEBUG: L3DR600015 09:26:21:ST3_ModuleSelector:DEBUG: 15103 09:26:21:ST3_ModuleSelector:DEBUG: 62x62 09:26:21:ST3_ModuleSelector:DEBUG: B 09:26:28:ST3_ModuleSelector:INFO: M3DR6T0000150B2 09:26:28:ST3_ModuleSelector:INFO: 15103 09:26:28:febtest:INFO: Testing FEB with SN 2282 09:26:30:smx_tester:INFO: Scanning setup 09:26:30:elinks:INFO: Disabling clock on downlink 0 09:26:30:elinks:INFO: Disabling clock on downlink 1 09:26:30:elinks:INFO: Disabling clock on downlink 2 09:26:30:elinks:INFO: Disabling clock on downlink 3 09:26:30:elinks:INFO: Disabling clock on downlink 4 09:26:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:26:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:26:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:26:30:elinks:INFO: Disabling clock on downlink 0 09:26:30:elinks:INFO: Disabling clock on downlink 1 09:26:30:elinks:INFO: Disabling clock on downlink 2 09:26:30:elinks:INFO: Disabling clock on downlink 3 09:26:30:elinks:INFO: Disabling clock on downlink 4 09:26:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:26:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:26:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:26:30:elinks:INFO: Disabling clock on downlink 0 09:26:30:elinks:INFO: Disabling clock on downlink 1 09:26:30:elinks:INFO: Disabling clock on downlink 2 09:26:30:elinks:INFO: Disabling clock on downlink 3 09:26:30:elinks:INFO: Disabling clock on downlink 4 09:26:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:26:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 09:26:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 09:26:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:26:30:elinks:INFO: Disabling clock on downlink 0 09:26:30:elinks:INFO: Disabling clock on downlink 1 09:26:30:elinks:INFO: Disabling clock on downlink 2 09:26:30:elinks:INFO: Disabling clock on downlink 3 09:26:30:elinks:INFO: Disabling clock on downlink 4 09:26:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:26:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:26:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:26:31:elinks:INFO: Disabling clock on downlink 0 09:26:31:elinks:INFO: Disabling clock on downlink 1 09:26:31:elinks:INFO: Disabling clock on downlink 2 09:26:31:elinks:INFO: Disabling clock on downlink 3 09:26:31:elinks:INFO: Disabling clock on downlink 4 09:26:31:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:26:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:26:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 09:26:31:setup_element:INFO: Scanning clock phase 09:26:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:26:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:26:31:setup_element:INFO: Clock phase scan results for group 0, downlink 2 09:26:31:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 09:26:31:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 09:26:31:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:26:31:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:26:31:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:26:31:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:26:31:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXXX_ Clock Delay: 33 09:26:31:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXXX_ Clock Delay: 33 09:26:31:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:26:31:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:26:31:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:26:31:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:26:31:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 09:26:31:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 09:26:31:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:26:31:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:26:31:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2 ==============================================OOO============================================== 09:26:31:setup_element:INFO: Scanning data phases 09:26:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:26:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:26:36:setup_element:INFO: Data phase scan results for group 0, downlink 2 09:26:37:setup_element:INFO: Eye window for uplink 16: XXXX___________________________________X Data delay found: 21 09:26:37:setup_element:INFO: Eye window for uplink 17: XX___________________________________XXX Data delay found: 19 09:26:37:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX Data delay found: 18 09:26:37:setup_element:INFO: Eye window for uplink 19: ___________________________________XXXXX Data delay found: 17 09:26:37:setup_element:INFO: Eye window for uplink 20: X___________________________________XXXX Data delay found: 18 09:26:37:setup_element:INFO: Eye window for uplink 21: ___________________________________XXXXX Data delay found: 17 09:26:37:setup_element:INFO: Eye window for uplink 22: XXX__________________________________XXX Data delay found: 19 09:26:37:setup_element:INFO: Eye window for uplink 23: XXXXX______________________________XXXXX Data delay found: 19 09:26:37:setup_element:INFO: Eye window for uplink 24: _________XXXXX__________________________ Data delay found: 31 09:26:37:setup_element:INFO: Eye window for uplink 25: ___________XXXX_________________________ Data delay found: 32 09:26:37:setup_element:INFO: Eye window for uplink 26: _________XXXXX__________________________ Data delay found: 31 09:26:37:setup_element:INFO: Eye window for uplink 27: ____________XXXXXX______________________ Data delay found: 34 09:26:37:setup_element:INFO: Eye window for uplink 28: _______________XXXXX____________________ Data delay found: 37 09:26:37:setup_element:INFO: Eye window for uplink 29: __________________XXXXX_________________ Data delay found: 0 09:26:37:setup_element:INFO: Eye window for uplink 30: __________________XXXXXX________________ Data delay found: 0 09:26:37:setup_element:INFO: Eye window for uplink 31: __________________XXXXXXX_______________ Data delay found: 1 09:26:37:setup_element:INFO: Setting the data phase to 21 for uplink 16 09:26:37:setup_element:INFO: Setting the data phase to 19 for uplink 17 09:26:37:setup_element:INFO: Setting the data phase to 18 for uplink 18 09:26:37:setup_element:INFO: Setting the data phase to 17 for uplink 19 09:26:37:setup_element:INFO: Setting the data phase to 18 for uplink 20 09:26:37:setup_element:INFO: Setting the data phase to 17 for uplink 21 09:26:37:setup_element:INFO: Setting the data phase to 19 for uplink 22 09:26:37:setup_element:INFO: Setting the data phase to 19 for uplink 23 09:26:37:setup_element:INFO: Setting the data phase to 31 for uplink 24 09:26:37:setup_element:INFO: Setting the data phase to 32 for uplink 25 09:26:37:setup_element:INFO: Setting the data phase to 31 for uplink 26 09:26:37:setup_element:INFO: Setting the data phase to 34 for uplink 27 09:26:37:setup_element:INFO: Setting the data phase to 37 for uplink 28 09:26:37:setup_element:INFO: Setting the data phase to 0 for uplink 29 09:26:37:setup_element:INFO: Setting the data phase to 0 for uplink 30 09:26:37:setup_element:INFO: Setting the data phase to 1 for uplink 31 ==============================================OOO============================================== 09:26:37:setup_element:INFO: Beginning SMX ASICs map scan 09:26:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:26:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:26:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:26:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:26:37:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 09:26:37:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 09:26:37:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 09:26:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 09:26:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 09:26:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 09:26:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 09:26:37:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 09:26:37:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 09:26:37:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 09:26:37:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 09:26:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 09:26:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 09:26:38:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 09:26:38:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 09:26:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 09:26:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 09:26:39:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 69 Eye Windows: Uplink 16: _______________________________________________________________________XXXXXXX__ Uplink 17: _______________________________________________________________________XXXXXXX__ Uplink 18: _____________________________________________________________________XXXXXXXXX__ Uplink 19: _____________________________________________________________________XXXXXXXXX__ Uplink 20: ______________________________________________________________________XXXXXXXX__ Uplink 21: ______________________________________________________________________XXXXXXXX__ Uplink 22: _____________________________________________________________________XXXXXXXXXX_ Uplink 23: _____________________________________________________________________XXXXXXXXXX_ Uplink 24: _____________________________________________________________________XXXXXXX____ Uplink 25: _____________________________________________________________________XXXXXXX____ Uplink 26: _____________________________________________________________________XXXXXXXXX__ Uplink 27: _____________________________________________________________________XXXXXXXXX__ Uplink 28: ______________________________________________________________________XXXXXXXXX_ Uplink 29: ______________________________________________________________________XXXXXXXXX_ Uplink 30: ________________________________________________________________________XXXXXXXX Uplink 31: ________________________________________________________________________XXXXXXXX Data phase characteristics: Uplink 16: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 17: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 18: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 19: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 20: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 21: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 22: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 23: Optimal Phase: 19 Window Length: 30 Eye Window: XXXXX______________________________XXXXX Uplink 24: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 25: Optimal Phase: 32 Window Length: 36 Eye Window: ___________XXXX_________________________ Uplink 26: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 27: Optimal Phase: 34 Window Length: 34 Eye Window: ____________XXXXXX______________________ Uplink 28: Optimal Phase: 37 Window Length: 35 Eye Window: _______________XXXXX____________________ Uplink 29: Optimal Phase: 0 Window Length: 35 Eye Window: __________________XXXXX_________________ Uplink 30: Optimal Phase: 0 Window Length: 34 Eye Window: __________________XXXXXX________________ Uplink 31: Optimal Phase: 1 Window Length: 33 Eye Window: __________________XXXXXXX_______________ ==============================================OOO============================================== 09:26:39:setup_element:INFO: Performing Elink synchronization 09:26:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:26:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:26:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:26:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 09:26:39:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 09:26:39:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 09:26:40:febtest:INFO: Init all SMX (CSA): 30 09:26:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:26:55:febtest:INFO: 23-00 | XA-000-09-004-002-015-004-09 | 37.7 | 1147.8 09:26:55:febtest:INFO: 30-01 | XA-000-09-004-012-018-010-15 | 37.7 | 1130.0 09:26:55:febtest:INFO: 21-02 | XA-000-09-004-012-018-009-15 | 34.6 | 1159.7 09:26:56:febtest:INFO: 28-03 | XA-000-09-004-012-017-010-01 | 28.2 | 1177.4 09:26:56:febtest:INFO: 19-04 | XA-000-09-004-012-017-009-01 | 40.9 | 1141.9 09:26:56:febtest:INFO: 26-05 | XA-000-09-004-002-015-008-09 | 28.2 | 1177.4 09:26:56:febtest:INFO: 17-06 | XA-000-09-004-002-015-023-14 | 28.2 | 1195.1 09:26:57:febtest:INFO: 24-07 | XA-000-09-004-002-015-005-09 | 37.7 | 1153.7 09:26:58:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 09:27:00:ST3_smx:INFO: chip: 23-0 37.726682 C 1153.732915 mV 09:27:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:27:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:27:00:ST3_smx:INFO: Electrons 09:27:00:ST3_smx:INFO: # loops 0 09:27:01:ST3_smx:INFO: # loops 1 09:27:03:ST3_smx:INFO: # loops 2 09:27:05:ST3_smx:INFO: # loops 3 09:27:06:ST3_smx:INFO: # loops 4 09:27:08:ST3_smx:INFO: Total # of broken channels: 1 09:27:08:ST3_smx:INFO: List of broken channels: [6] 09:27:08:ST3_smx:INFO: Total # of broken channels: 3 09:27:08:ST3_smx:INFO: List of broken channels: [6, 14, 20] 09:27:10:ST3_smx:INFO: chip: 30-1 40.898880 C 1147.806000 mV 09:27:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:27:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:27:10:ST3_smx:INFO: Electrons 09:27:10:ST3_smx:INFO: # loops 0 09:27:11:ST3_smx:INFO: # loops 1 09:27:13:ST3_smx:INFO: # loops 2 09:27:15:ST3_smx:INFO: # loops 3 09:27:16:ST3_smx:INFO: # loops 4 09:27:18:ST3_smx:INFO: Total # of broken channels: 0 09:27:18:ST3_smx:INFO: List of broken channels: [] 09:27:18:ST3_smx:INFO: Total # of broken channels: 1 09:27:18:ST3_smx:INFO: List of broken channels: [44] 09:27:20:ST3_smx:INFO: chip: 21-2 34.556970 C 1171.483840 mV 09:27:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:27:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:27:20:ST3_smx:INFO: Electrons 09:27:20:ST3_smx:INFO: # loops 0 09:27:21:ST3_smx:INFO: # loops 1 09:27:23:ST3_smx:INFO: # loops 2 09:27:25:ST3_smx:INFO: # loops 3 09:27:26:ST3_smx:INFO: # loops 4 09:27:28:ST3_smx:INFO: Total # of broken channels: 1 09:27:28:ST3_smx:INFO: List of broken channels: [95] 09:27:28:ST3_smx:INFO: Total # of broken channels: 0 09:27:28:ST3_smx:INFO: List of broken channels: [] 09:27:30:ST3_smx:INFO: chip: 28-3 25.062742 C 1189.190035 mV 09:27:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:27:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:27:30:ST3_smx:INFO: Electrons 09:27:30:ST3_smx:INFO: # loops 0 09:27:31:ST3_smx:INFO: # loops 1 09:27:33:ST3_smx:INFO: # loops 2 09:27:35:ST3_smx:INFO: # loops 3 09:27:36:ST3_smx:INFO: # loops 4 09:27:38:ST3_smx:INFO: Total # of broken channels: 0 09:27:38:ST3_smx:INFO: List of broken channels: [] 09:27:38:ST3_smx:INFO: Total # of broken channels: 0 09:27:38:ST3_smx:INFO: List of broken channels: [] 09:27:40:ST3_smx:INFO: chip: 19-4 40.898880 C 1153.732915 mV 09:27:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:27:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:27:40:ST3_smx:INFO: Electrons 09:27:40:ST3_smx:INFO: # loops 0 09:27:41:ST3_smx:INFO: # loops 1 09:27:43:ST3_smx:INFO: # loops 2 09:27:45:ST3_smx:INFO: # loops 3 09:27:46:ST3_smx:INFO: # loops 4 09:27:48:ST3_smx:INFO: Total # of broken channels: 0 09:27:48:ST3_smx:INFO: List of broken channels: [] 09:27:48:ST3_smx:INFO: Total # of broken channels: 0 09:27:48:ST3_smx:INFO: List of broken channels: [] 09:27:50:ST3_smx:INFO: chip: 26-5 31.389742 C 1195.082160 mV 09:27:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:27:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:27:50:ST3_smx:INFO: Electrons 09:27:50:ST3_smx:INFO: # loops 0 09:27:51:ST3_smx:INFO: # loops 1 09:27:53:ST3_smx:INFO: # loops 2 09:27:55:ST3_smx:INFO: # loops 3 09:27:56:ST3_smx:INFO: # loops 4 09:27:58:ST3_smx:INFO: Total # of broken channels: 0 09:27:58:ST3_smx:INFO: List of broken channels: [] 09:27:58:ST3_smx:INFO: Total # of broken channels: 0 09:27:58:ST3_smx:INFO: List of broken channels: [] 09:28:00:ST3_smx:INFO: chip: 17-6 28.225000 C 1206.851500 mV 09:28:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:28:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:28:00:ST3_smx:INFO: Electrons 09:28:00:ST3_smx:INFO: # loops 0 09:28:01:ST3_smx:INFO: # loops 1 09:28:03:ST3_smx:INFO: # loops 2 09:28:05:ST3_smx:INFO: # loops 3 09:28:06:ST3_smx:INFO: # loops 4 09:28:08:ST3_smx:INFO: Total # of broken channels: 0 09:28:08:ST3_smx:INFO: List of broken channels: [] 09:28:08:ST3_smx:INFO: Total # of broken channels: 0 09:28:08:ST3_smx:INFO: List of broken channels: [] 09:28:10:ST3_smx:INFO: chip: 24-7 37.726682 C 1165.571835 mV 09:28:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:28:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:28:10:ST3_smx:INFO: Electrons 09:28:10:ST3_smx:INFO: # loops 0 09:28:11:ST3_smx:INFO: # loops 1 09:28:13:ST3_smx:INFO: # loops 2 09:28:15:ST3_smx:INFO: # loops 3 09:28:16:ST3_smx:INFO: # loops 4 09:28:18:ST3_smx:INFO: Total # of broken channels: 0 09:28:18:ST3_smx:INFO: List of broken channels: [] 09:28:18:ST3_smx:INFO: Total # of broken channels: 0 09:28:18:ST3_smx:INFO: List of broken channels: [] 09:28:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:28:19:febtest:INFO: 23-00 | XA-000-09-004-002-015-004-09 | 40.9 | 1177.4 09:28:19:febtest:INFO: 30-01 | XA-000-09-004-012-018-010-15 | 40.9 | 1165.6 09:28:19:febtest:INFO: 21-02 | XA-000-09-004-012-018-009-15 | 37.7 | 1189.2 09:28:19:febtest:INFO: 28-03 | XA-000-09-004-012-017-010-01 | 28.2 | 1212.7 09:28:19:febtest:INFO: 19-04 | XA-000-09-004-012-017-009-01 | 40.9 | 1177.4 09:28:20:febtest:INFO: 26-05 | XA-000-09-004-002-015-008-09 | 31.4 | 1218.6 09:28:20:febtest:INFO: 17-06 | XA-000-09-004-002-015-023-14 | 31.4 | 1224.5 09:28:20:febtest:INFO: 24-07 | XA-000-09-004-002-015-005-09 | 40.9 | 1189.2 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 24_11_20-09_26_13 OPERATOR : Alois Alzheimer SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2282| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ SENSOR_NAME: 15103 | SIZE: 62x62 | GRADE: B MODULE_NAME: M3DR6T0000150B2 LADDER_NAME: L3DR600015 ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.3590', '1.848', '1.6860'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0020', '1.850', '2.5660'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9610', '1.850', '0.5188']