13:25:11:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:25:11:ST3_Shared:INFO:	                       FEB-Microcable                       
13:25:11:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:25:11:febtest:INFO:	Testing FEB with SN 2282
13:25:13:smx_tester:INFO:	Scanning setup
13:25:13:elinks:INFO:	Disabling clock on downlink 0
13:25:13:elinks:INFO:	Disabling clock on downlink 1
13:25:13:elinks:INFO:	Disabling clock on downlink 2
13:25:13:elinks:INFO:	Disabling clock on downlink 3
13:25:13:elinks:INFO:	Disabling clock on downlink 4
13:25:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:25:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:25:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:25:13:elinks:INFO:	Disabling clock on downlink 0
13:25:13:elinks:INFO:	Disabling clock on downlink 1
13:25:13:elinks:INFO:	Disabling clock on downlink 2
13:25:13:elinks:INFO:	Disabling clock on downlink 3
13:25:13:elinks:INFO:	Disabling clock on downlink 4
13:25:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:25:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:25:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:25:13:elinks:INFO:	Disabling clock on downlink 0
13:25:13:elinks:INFO:	Disabling clock on downlink 1
13:25:13:elinks:INFO:	Disabling clock on downlink 2
13:25:13:elinks:INFO:	Disabling clock on downlink 3
13:25:13:elinks:INFO:	Disabling clock on downlink 4
13:25:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:25:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:25:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:25:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:25:13:elinks:INFO:	Disabling clock on downlink 0
13:25:13:elinks:INFO:	Disabling clock on downlink 1
13:25:13:elinks:INFO:	Disabling clock on downlink 2
13:25:13:elinks:INFO:	Disabling clock on downlink 3
13:25:13:elinks:INFO:	Disabling clock on downlink 4
13:25:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:25:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:25:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:25:13:elinks:INFO:	Disabling clock on downlink 0
13:25:13:elinks:INFO:	Disabling clock on downlink 1
13:25:13:elinks:INFO:	Disabling clock on downlink 2
13:25:13:elinks:INFO:	Disabling clock on downlink 3
13:25:13:elinks:INFO:	Disabling clock on downlink 4
13:25:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:25:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:25:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:25:14:setup_element:INFO:	Scanning clock phase
13:25:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:25:14:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:25:14:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:25:14:setup_element:INFO:	Eye window for uplink 16: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:25:14:setup_element:INFO:	Eye window for uplink 17: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:25:14:setup_element:INFO:	Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:25:14:setup_element:INFO:	Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:25:14:setup_element:INFO:	Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:25:14:setup_element:INFO:	Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:25:14:setup_element:INFO:	Eye window for uplink 22: ______________________________________________________________________XXXXXXX_X_
Clock Delay: 34
13:25:14:setup_element:INFO:	Eye window for uplink 23: ______________________________________________________________________XXXXXXX_X_
Clock Delay: 34
13:25:14:setup_element:INFO:	Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:25:14:setup_element:INFO:	Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:25:14:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
13:25:14:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
13:25:14:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:25:14:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:25:14:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:25:14:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:25:14:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
13:25:14:setup_element:INFO:	Scanning data phases
13:25:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:25:14:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:25:20:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:25:20:setup_element:INFO:	Eye window for uplink 16: _XXXX___________________________________
Data delay found: 22
13:25:20:setup_element:INFO:	Eye window for uplink 17: XXXX__________________________________XX
Data delay found: 20
13:25:20:setup_element:INFO:	Eye window for uplink 18: XXXX_________________________________XXX
Data delay found: 20
13:25:20:setup_element:INFO:	Eye window for uplink 19: XX__________________________________XXXX
Data delay found: 18
13:25:20:setup_element:INFO:	Eye window for uplink 20: XXXXXXXXXXXXXXXXX_____________________XX
Data delay found: 27
13:25:20:setup_element:INFO:	Eye window for uplink 21: XXXXXXXXXXXXXXXXX___________________XXXX
Data delay found: 26
13:25:20:setup_element:INFO:	Eye window for uplink 22: XXXX___________________________________X
Data delay found: 21
13:25:20:setup_element:INFO:	Eye window for uplink 23: XXXXXXX______________________________XXX
Data delay found: 21
13:25:20:setup_element:INFO:	Eye window for uplink 24: _________XXXXXX_________________________
Data delay found: 31
13:25:20:setup_element:INFO:	Eye window for uplink 25: ____________XXXXX_______________________
Data delay found: 34
13:25:20:setup_element:INFO:	Eye window for uplink 26: _________XXXXXX_________________________
Data delay found: 31
13:25:20:setup_element:INFO:	Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
13:25:20:setup_element:INFO:	Eye window for uplink 28: ________________XXXXXX__________________
Data delay found: 38
13:25:20:setup_element:INFO:	Eye window for uplink 29: ___________________XXXXXX_______________
Data delay found: 1
13:25:20:setup_element:INFO:	Eye window for uplink 30: ___________________XXXXXX_______________
Data delay found: 1
13:25:20:setup_element:INFO:	Eye window for uplink 31: ___________________XXXXXXX______________
Data delay found: 2
13:25:20:setup_element:INFO:	Setting the data phase to 22 for uplink 16
13:25:20:setup_element:INFO:	Setting the data phase to 20 for uplink 17
13:25:20:setup_element:INFO:	Setting the data phase to 20 for uplink 18
13:25:20:setup_element:INFO:	Setting the data phase to 18 for uplink 19
13:25:20:setup_element:INFO:	Setting the data phase to 27 for uplink 20
13:25:20:setup_element:INFO:	Setting the data phase to 26 for uplink 21
13:25:20:setup_element:INFO:	Setting the data phase to 21 for uplink 22
13:25:20:setup_element:INFO:	Setting the data phase to 21 for uplink 23
13:25:20:setup_element:INFO:	Setting the data phase to 31 for uplink 24
13:25:20:setup_element:INFO:	Setting the data phase to 34 for uplink 25
13:25:20:setup_element:INFO:	Setting the data phase to 31 for uplink 26
13:25:20:setup_element:INFO:	Setting the data phase to 35 for uplink 27
13:25:20:setup_element:INFO:	Setting the data phase to 38 for uplink 28
13:25:20:setup_element:INFO:	Setting the data phase to 1 for uplink 29
13:25:20:setup_element:INFO:	Setting the data phase to 1 for uplink 30
13:25:20:setup_element:INFO:	Setting the data phase to 2 for uplink 31
==============================================OOO==============================================
13:25:20:setup_element:INFO:	Beginning SMX ASICs map scan
13:25:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:25:20:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:25:20:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:25:20:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:25:20:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:25:20:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:25:20:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:25:20:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:25:20:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:25:20:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:25:20:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:25:20:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:25:20:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:25:21:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:25:21:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:25:21:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:25:21:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:25:21:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:25:21:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:25:21:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:25:21:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:25:23:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 68
    Eye Windows:
      Uplink 16: _______________________________________________________________________XXXXXXX__
      Uplink 17: _______________________________________________________________________XXXXXXX__
      Uplink 18: ______________________________________________________________________XXXXXXXX__
      Uplink 19: ______________________________________________________________________XXXXXXXX__
      Uplink 20: ______________________________________________________________________XXXXXXXX__
      Uplink 21: ______________________________________________________________________XXXXXXXX__
      Uplink 22: ______________________________________________________________________XXXXXXX_X_
      Uplink 23: ______________________________________________________________________XXXXXXX_X_
      Uplink 24: ____________________________________________________________________XXXXXXXXX___
      Uplink 25: ____________________________________________________________________XXXXXXXXX___
      Uplink 26: ________________________________________________________________________________
      Uplink 27: ________________________________________________________________________________
      Uplink 28: _______________________________________________________________________XXXXXXX__
      Uplink 29: _______________________________________________________________________XXXXXXX__
      Uplink 30: ________________________________________________________________________XXXXXXXX
      Uplink 31: ________________________________________________________________________XXXXXXXX
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 22
      Window Length: 36
      Eye Window: _XXXX___________________________________
    Uplink 17:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 18:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 19:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 20:
      Optimal Phase: 27
      Window Length: 21
      Eye Window: XXXXXXXXXXXXXXXXX_____________________XX
    Uplink 21:
      Optimal Phase: 26
      Window Length: 19
      Eye Window: XXXXXXXXXXXXXXXXX___________________XXXX
    Uplink 22:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 23:
      Optimal Phase: 21
      Window Length: 30
      Eye Window: XXXXXXX______________________________XXX
    Uplink 24:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 25:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 26:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 27:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 28:
      Optimal Phase: 38
      Window Length: 34
      Eye Window: ________________XXXXXX__________________
    Uplink 29:
      Optimal Phase: 1
      Window Length: 34
      Eye Window: ___________________XXXXXX_______________
    Uplink 30:
      Optimal Phase: 1
      Window Length: 34
      Eye Window: ___________________XXXXXX_______________
    Uplink 31:
      Optimal Phase: 2
      Window Length: 33
      Eye Window: ___________________XXXXXXX______________

==============================================OOO==============================================
13:25:23:setup_element:INFO:	Performing Elink synchronization
13:25:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:25:23:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:25:23:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:25:23:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
13:25:23:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:25:23:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:25:24:febtest:INFO:	Init all SMX (CSA): 30
13:25:37:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:25:38:febtest:INFO:	23-00 | XA-000-09-004-002-015-004-09 |  44.1 | 1124.0
13:25:38:febtest:INFO:	30-01 | XA-000-09-004-012-018-010-15 |  37.7 | 1135.9
13:25:38:febtest:INFO:	21-02 | XA-000-09-004-012-018-009-15 |  34.6 | 1153.7
13:25:38:febtest:INFO:	28-03 | XA-000-09-004-012-017-010-01 |  25.1 | 1177.4
13:25:39:febtest:INFO:	19-04 | XA-000-09-004-012-017-009-01 |  40.9 | 1141.9
13:25:39:febtest:INFO:	26-05 | XA-000-09-004-002-015-008-09 |  31.4 | 1177.4
13:25:39:febtest:INFO:	17-06 | XA-000-09-004-002-015-023-14 |  25.1 | 1195.1
13:25:39:febtest:INFO:	24-07 | XA-000-09-004-002-015-005-09 |  37.7 | 1153.7
13:25:40:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:25:42:ST3_smx:INFO:	chip: 23-0 	 44.073563 C 	 1135.937260 mV
13:25:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:25:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:25:42:ST3_smx:INFO:		Electrons
13:25:42:ST3_smx:INFO:	# loops 0
13:25:44:ST3_smx:INFO:	# loops 1
13:25:46:ST3_smx:INFO:	# loops 2
13:25:47:ST3_smx:INFO:	Total # of broken channels: 2
13:25:47:ST3_smx:INFO:	List of broken channels: [6, 20]
13:25:47:ST3_smx:INFO:	Total # of broken channels: 3
13:25:47:ST3_smx:INFO:	List of broken channels: [6, 14, 20]
13:25:49:ST3_smx:INFO:	chip: 30-1 	 37.726682 C 	 1147.806000 mV
13:25:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:25:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:25:49:ST3_smx:INFO:		Electrons
13:25:49:ST3_smx:INFO:	# loops 0
13:25:51:ST3_smx:INFO:	# loops 1
13:25:52:ST3_smx:INFO:	# loops 2
13:25:54:ST3_smx:INFO:	Total # of broken channels: 0
13:25:54:ST3_smx:INFO:	List of broken channels: []
13:25:54:ST3_smx:INFO:	Total # of broken channels: 0
13:25:54:ST3_smx:INFO:	List of broken channels: []
13:25:56:ST3_smx:INFO:	chip: 21-2 	 34.556970 C 	 1165.571835 mV
13:25:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:25:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:25:56:ST3_smx:INFO:		Electrons
13:25:56:ST3_smx:INFO:	# loops 0
13:25:57:ST3_smx:INFO:	# loops 1
13:25:59:ST3_smx:INFO:	# loops 2
13:26:00:ST3_smx:INFO:	Total # of broken channels: 2
13:26:00:ST3_smx:INFO:	List of broken channels: [34, 95]
13:26:00:ST3_smx:INFO:	Total # of broken channels: 0
13:26:00:ST3_smx:INFO:	List of broken channels: []
13:26:02:ST3_smx:INFO:	chip: 28-3 	 28.225000 C 	 1189.190035 mV
13:26:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:02:ST3_smx:INFO:		Electrons
13:26:02:ST3_smx:INFO:	# loops 0
13:26:04:ST3_smx:INFO:	# loops 1
13:26:05:ST3_smx:INFO:	# loops 2
13:26:07:ST3_smx:INFO:	Total # of broken channels: 0
13:26:07:ST3_smx:INFO:	List of broken channels: []
13:26:07:ST3_smx:INFO:	Total # of broken channels: 1
13:26:07:ST3_smx:INFO:	List of broken channels: [119]
13:26:09:ST3_smx:INFO:	chip: 19-4 	 37.726682 C 	 1153.732915 mV
13:26:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:09:ST3_smx:INFO:		Electrons
13:26:09:ST3_smx:INFO:	# loops 0
13:26:10:ST3_smx:INFO:	# loops 1
13:26:12:ST3_smx:INFO:	# loops 2
13:26:13:ST3_smx:INFO:	Total # of broken channels: 0
13:26:13:ST3_smx:INFO:	List of broken channels: []
13:26:13:ST3_smx:INFO:	Total # of broken channels: 0
13:26:13:ST3_smx:INFO:	List of broken channels: []
13:26:15:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1189.190035 mV
13:26:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:15:ST3_smx:INFO:		Electrons
13:26:15:ST3_smx:INFO:	# loops 0
13:26:17:ST3_smx:INFO:	# loops 1
13:26:18:ST3_smx:INFO:	# loops 2
13:26:20:ST3_smx:INFO:	Total # of broken channels: 0
13:26:20:ST3_smx:INFO:	List of broken channels: []
13:26:20:ST3_smx:INFO:	Total # of broken channels: 0
13:26:20:ST3_smx:INFO:	List of broken channels: []
13:26:22:ST3_smx:INFO:	chip: 17-6 	 28.225000 C 	 1206.851500 mV
13:26:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:22:ST3_smx:INFO:		Electrons
13:26:22:ST3_smx:INFO:	# loops 0
13:26:23:ST3_smx:INFO:	# loops 1
13:26:25:ST3_smx:INFO:	# loops 2
13:26:26:ST3_smx:INFO:	Total # of broken channels: 0
13:26:26:ST3_smx:INFO:	List of broken channels: []
13:26:26:ST3_smx:INFO:	Total # of broken channels: 0
13:26:26:ST3_smx:INFO:	List of broken channels: []
13:26:28:ST3_smx:INFO:	chip: 24-7 	 37.726682 C 	 1159.654860 mV
13:26:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:28:ST3_smx:INFO:		Electrons
13:26:28:ST3_smx:INFO:	# loops 0
13:26:30:ST3_smx:INFO:	# loops 1
13:26:31:ST3_smx:INFO:	# loops 2
13:26:33:ST3_smx:INFO:	Total # of broken channels: 0
13:26:33:ST3_smx:INFO:	List of broken channels: []
13:26:33:ST3_smx:INFO:	Total # of broken channels: 0
13:26:33:ST3_smx:INFO:	List of broken channels: []
13:26:33:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:26:33:febtest:INFO:	23-00 | XA-000-09-004-002-015-004-09 |  44.1 | 1153.7
13:26:34:febtest:INFO:	30-01 | XA-000-09-004-012-018-010-15 |  37.7 | 1165.6
13:26:34:febtest:INFO:	21-02 | XA-000-09-004-012-018-009-15 |  34.6 | 1189.2
13:26:34:febtest:INFO:	28-03 | XA-000-09-004-012-017-010-01 |  28.2 | 1212.7
13:26:34:febtest:INFO:	19-04 | XA-000-09-004-012-017-009-01 |  40.9 | 1171.5
13:26:34:febtest:INFO:	26-05 | XA-000-09-004-002-015-008-09 |  31.4 | 1212.7
13:26:35:febtest:INFO:	17-06 | XA-000-09-004-002-015-023-14 |  28.2 | 1230.3
13:26:35:febtest:INFO:	24-07 | XA-000-09-004-002-015-005-09 |  40.9 | 1183.3
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_13-13_25_11
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2282| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.7930', '1.848', '1.7930']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9840', '1.850', '2.5610']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9660', '1.850', '0.5170']