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FEB_2284 25.11.24 10:33:20
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10:33:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:33:20:ST3_Shared:INFO: FEB-Sensor
10:33:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:33:23:ST3_Shared:INFO: STS mode selected
10:33:29:ST3_ModuleSelector:DEBUG:
10:33:29:ST3_ModuleSelector:DEBUG:
10:33:29:ST3_ModuleSelector:DEBUG:
10:33:29:ST3_ModuleSelector:DEBUG: None
10:33:29:ST3_ModuleSelector:DEBUG:
10:33:40:ST3_ModuleSelector:DEBUG:
10:33:40:ST3_ModuleSelector:DEBUG:
10:33:40:ST3_ModuleSelector:DEBUG:
10:33:40:ST3_ModuleSelector:DEBUG: None
10:33:40:ST3_ModuleSelector:DEBUG:
10:33:49:ST3_ModuleSelector:DEBUG: M3DR6B1000151A2
10:33:49:ST3_ModuleSelector:DEBUG: L3DR600015
10:33:49:ST3_ModuleSelector:DEBUG: 05053
10:33:49:ST3_ModuleSelector:DEBUG: 62x62
10:33:49:ST3_ModuleSelector:DEBUG: C
10:33:49:ST3_ModuleSelector:DEBUG: M3DR6B1000151A2
10:33:49:ST3_ModuleSelector:DEBUG: L3DR600015
10:33:49:ST3_ModuleSelector:DEBUG: 05053
10:33:49:ST3_ModuleSelector:DEBUG: 62x62
10:33:49:ST3_ModuleSelector:DEBUG: C
10:33:59:ST3_ModuleSelector:INFO: M3DR6B1000151A2
10:33:59:ST3_ModuleSelector:INFO: 05053
10:33:59:febtest:INFO: Testing FEB with SN 2284
10:34:00:smx_tester:INFO: Scanning setup
10:34:00:elinks:INFO: Disabling clock on downlink 0
10:34:00:elinks:INFO: Disabling clock on downlink 1
10:34:00:elinks:INFO: Disabling clock on downlink 2
10:34:00:elinks:INFO: Disabling clock on downlink 3
10:34:00:elinks:INFO: Disabling clock on downlink 4
10:34:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:34:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:00:elinks:INFO: Disabling clock on downlink 0
10:34:00:elinks:INFO: Disabling clock on downlink 1
10:34:00:elinks:INFO: Disabling clock on downlink 2
10:34:00:elinks:INFO: Disabling clock on downlink 3
10:34:00:elinks:INFO: Disabling clock on downlink 4
10:34:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:34:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:01:elinks:INFO: Disabling clock on downlink 0
10:34:01:elinks:INFO: Disabling clock on downlink 1
10:34:01:elinks:INFO: Disabling clock on downlink 2
10:34:01:elinks:INFO: Disabling clock on downlink 3
10:34:01:elinks:INFO: Disabling clock on downlink 4
10:34:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:34:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:34:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:01:elinks:INFO: Disabling clock on downlink 0
10:34:01:elinks:INFO: Disabling clock on downlink 1
10:34:01:elinks:INFO: Disabling clock on downlink 2
10:34:01:elinks:INFO: Disabling clock on downlink 3
10:34:01:elinks:INFO: Disabling clock on downlink 4
10:34:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:34:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:01:elinks:INFO: Disabling clock on downlink 0
10:34:01:elinks:INFO: Disabling clock on downlink 1
10:34:01:elinks:INFO: Disabling clock on downlink 2
10:34:01:elinks:INFO: Disabling clock on downlink 3
10:34:01:elinks:INFO: Disabling clock on downlink 4
10:34:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:34:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:34:01:setup_element:INFO: Scanning clock phase
10:34:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:34:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:34:01:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:34:01:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:34:01:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:34:01:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:34:01:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:34:01:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
10:34:01:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
10:34:01:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:34:01:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:34:01:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:34:01:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:34:01:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:34:01:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:34:01:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:34:02:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:34:02:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
10:34:02:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
10:34:02:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
10:34:02:setup_element:INFO: Scanning data phases
10:34:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:34:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:34:07:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:34:07:setup_element:INFO: Eye window for uplink 16: XXXX__________________________________XX
Data delay found: 20
10:34:07:setup_element:INFO: Eye window for uplink 17: XX__________________________________XXXX
Data delay found: 18
10:34:07:setup_element:INFO: Eye window for uplink 18: XXXXX_________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 9
10:34:07:setup_element:INFO: Eye window for uplink 19: XX____________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 7
10:34:07:setup_element:INFO: Eye window for uplink 20: _______________________________XXXXXXXXX
Data delay found: 15
10:34:07:setup_element:INFO: Eye window for uplink 21: _______________________________XXXXXXXXX
Data delay found: 15
10:34:07:setup_element:INFO: Eye window for uplink 22: XXXX__________________________________XX
Data delay found: 20
10:34:07:setup_element:INFO: Eye window for uplink 23: XXXXXXX_____________________________XXXX
Data delay found: 21
10:34:07:setup_element:INFO: Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
10:34:07:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
10:34:07:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
10:34:07:setup_element:INFO: Eye window for uplink 27: ______________XXXXX_____________________
Data delay found: 36
10:34:07:setup_element:INFO: Eye window for uplink 28: _______________XXXXX_______XXXXXXXXXXXXX
Data delay found: 7
10:34:07:setup_element:INFO: Eye window for uplink 29: _________________XXXXXXX___XXXXXXXXXXXXX
Data delay found: 8
10:34:07:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
10:34:07:setup_element:INFO: Eye window for uplink 31: ________________XXXXXX__________________
Data delay found: 38
10:34:07:setup_element:INFO: Setting the data phase to 20 for uplink 16
10:34:07:setup_element:INFO: Setting the data phase to 18 for uplink 17
10:34:07:setup_element:INFO: Setting the data phase to 9 for uplink 18
10:34:07:setup_element:INFO: Setting the data phase to 7 for uplink 19
10:34:07:setup_element:INFO: Setting the data phase to 15 for uplink 20
10:34:07:setup_element:INFO: Setting the data phase to 15 for uplink 21
10:34:07:setup_element:INFO: Setting the data phase to 20 for uplink 22
10:34:07:setup_element:INFO: Setting the data phase to 21 for uplink 23
10:34:07:setup_element:INFO: Setting the data phase to 29 for uplink 24
10:34:07:setup_element:INFO: Setting the data phase to 31 for uplink 25
10:34:07:setup_element:INFO: Setting the data phase to 32 for uplink 26
10:34:07:setup_element:INFO: Setting the data phase to 36 for uplink 27
10:34:07:setup_element:INFO: Setting the data phase to 7 for uplink 28
10:34:07:setup_element:INFO: Setting the data phase to 8 for uplink 29
10:34:07:setup_element:INFO: Setting the data phase to 38 for uplink 30
10:34:07:setup_element:INFO: Setting the data phase to 38 for uplink 31
==============================================OOO==============================================
10:34:07:setup_element:INFO: Beginning SMX ASICs map scan
10:34:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:34:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:34:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:34:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:34:07:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:34:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:34:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:34:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:34:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:34:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:34:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:34:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:34:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:34:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:34:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:34:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:34:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:34:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:34:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:34:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:34:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:34:10:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXXX__
Uplink 17: ______________________________________________________________________XXXXXXXX__
Uplink 18: ______________________________________________________________________XXXXXXX___
Uplink 19: ______________________________________________________________________XXXXXXX___
Uplink 20: ________________________________________________________________________________
Uplink 21: ________________________________________________________________________________
Uplink 22: _____________________________________________________________________XXXXXXXX___
Uplink 23: _____________________________________________________________________XXXXXXXX___
Uplink 24: ____________________________________________________________________XXXXXXX_____
Uplink 25: ____________________________________________________________________XXXXXXX_____
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXXXX_
Uplink 29: ______________________________________________________________________XXXXXXXXX_
Uplink 30: ________________________________________________________________________________
Uplink 31: ________________________________________________________________________________
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 17:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 18:
Optimal Phase: 9
Window Length: 9
Eye Window: XXXXX_________XXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 19:
Optimal Phase: 7
Window Length: 12
Eye Window: XX____________XXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 20:
Optimal Phase: 15
Window Length: 31
Eye Window: _______________________________XXXXXXXXX
Uplink 21:
Optimal Phase: 15
Window Length: 31
Eye Window: _______________________________XXXXXXXXX
Uplink 22:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 23:
Optimal Phase: 21
Window Length: 29
Eye Window: XXXXXXX_____________________________XXXX
Uplink 24:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 27:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 28:
Optimal Phase: 7
Window Length: 15
Eye Window: _______________XXXXX_______XXXXXXXXXXXXX
Uplink 29:
Optimal Phase: 8
Window Length: 17
Eye Window: _________________XXXXXXX___XXXXXXXXXXXXX
Uplink 30:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 31:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
==============================================OOO==============================================
10:34:10:setup_element:INFO: Performing Elink synchronization
10:34:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:34:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:34:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:34:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:34:10:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:34:10:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:34:11:febtest:INFO: Init all SMX (CSA): 30
10:34:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:34:25:febtest:INFO: 23-00 | XA-000-09-004-003-003-017-12 | 37.7 | 1159.7
10:34:25:febtest:INFO: 30-01 | XA-000-09-004-003-003-012-11 | 40.9 | 1135.9
10:34:25:febtest:INFO: 21-02 | XA-000-09-004-003-003-018-12 | 31.4 | 1171.5
10:34:26:febtest:INFO: 28-03 | XA-000-09-004-003-003-011-11 | 37.7 | 1147.8
10:34:26:febtest:INFO: 19-04 | XA-000-09-004-003-003-019-12 | 40.9 | 1135.9
10:34:26:febtest:INFO: 26-05 | XA-000-09-004-003-003-016-12 | 40.9 | 1135.9
10:34:26:febtest:INFO: 17-06 | XA-000-09-004-003-003-014-11 | 25.1 | 1195.1
10:34:27:febtest:INFO: 24-07 | XA-000-09-004-003-003-015-11 | 28.2 | 1189.2
10:34:28:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:34:30:ST3_smx:INFO: chip: 23-0 37.726682 C 1171.483840 mV
10:34:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:34:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:34:30:ST3_smx:INFO: Electrons
10:34:30:ST3_smx:INFO: # loops 0
10:34:31:ST3_smx:INFO: # loops 1
10:34:33:ST3_smx:INFO: # loops 2
10:34:34:ST3_smx:INFO: # loops 3
10:34:36:ST3_smx:INFO: # loops 4
10:34:38:ST3_smx:INFO: Total # of broken channels: 0
10:34:38:ST3_smx:INFO: List of broken channels: []
10:34:38:ST3_smx:INFO: Total # of broken channels: 0
10:34:38:ST3_smx:INFO: List of broken channels: []
10:34:39:ST3_smx:INFO: chip: 30-1 40.898880 C 1147.806000 mV
10:34:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:34:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:34:39:ST3_smx:INFO: Electrons
10:34:39:ST3_smx:INFO: # loops 0
10:34:41:ST3_smx:INFO: # loops 1
10:34:43:ST3_smx:INFO: # loops 2
10:34:44:ST3_smx:INFO: # loops 3
10:34:46:ST3_smx:INFO: # loops 4
10:34:47:ST3_smx:INFO: Total # of broken channels: 0
10:34:47:ST3_smx:INFO: List of broken channels: []
10:34:47:ST3_smx:INFO: Total # of broken channels: 1
10:34:47:ST3_smx:INFO: List of broken channels: [0]
10:34:49:ST3_smx:INFO: chip: 21-2 34.556970 C 1177.390875 mV
10:34:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:34:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:34:49:ST3_smx:INFO: Electrons
10:34:49:ST3_smx:INFO: # loops 0
10:34:51:ST3_smx:INFO: # loops 1
10:34:52:ST3_smx:INFO: # loops 2
10:34:54:ST3_smx:INFO: # loops 3
10:34:56:ST3_smx:INFO: # loops 4
10:34:57:ST3_smx:INFO: Total # of broken channels: 0
10:34:57:ST3_smx:INFO: List of broken channels: []
10:34:57:ST3_smx:INFO: Total # of broken channels: 0
10:34:57:ST3_smx:INFO: List of broken channels: []
10:34:59:ST3_smx:INFO: chip: 28-3 37.726682 C 1165.571835 mV
10:34:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:34:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:34:59:ST3_smx:INFO: Electrons
10:34:59:ST3_smx:INFO: # loops 0
10:35:01:ST3_smx:INFO: # loops 1
10:35:02:ST3_smx:INFO: # loops 2
10:35:04:ST3_smx:INFO: # loops 3
10:35:05:ST3_smx:INFO: # loops 4
10:35:07:ST3_smx:INFO: Total # of broken channels: 0
10:35:07:ST3_smx:INFO: List of broken channels: []
10:35:07:ST3_smx:INFO: Total # of broken channels: 0
10:35:07:ST3_smx:INFO: List of broken channels: []
10:35:08:ST3_smx:INFO: chip: 19-4 40.898880 C 1147.806000 mV
10:35:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:08:ST3_smx:INFO: Electrons
10:35:08:ST3_smx:INFO: # loops 0
10:35:10:ST3_smx:INFO: # loops 1
10:35:12:ST3_smx:INFO: # loops 2
10:35:13:ST3_smx:INFO: # loops 3
10:35:15:ST3_smx:INFO: # loops 4
10:35:16:ST3_smx:INFO: Total # of broken channels: 1
10:35:16:ST3_smx:INFO: List of broken channels: [54]
10:35:16:ST3_smx:INFO: Total # of broken channels: 1
10:35:16:ST3_smx:INFO: List of broken channels: [54]
10:35:18:ST3_smx:INFO: chip: 26-5 40.898880 C 1153.732915 mV
10:35:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:18:ST3_smx:INFO: Electrons
10:35:18:ST3_smx:INFO: # loops 0
10:35:20:ST3_smx:INFO: # loops 1
10:35:21:ST3_smx:INFO: # loops 2
10:35:23:ST3_smx:INFO: # loops 3
10:35:25:ST3_smx:INFO: # loops 4
10:35:26:ST3_smx:INFO: Total # of broken channels: 1
10:35:26:ST3_smx:INFO: List of broken channels: [49]
10:35:26:ST3_smx:INFO: Total # of broken channels: 3
10:35:26:ST3_smx:INFO: List of broken channels: [49, 67, 85]
10:35:28:ST3_smx:INFO: chip: 17-6 25.062742 C 1206.851500 mV
10:35:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:28:ST3_smx:INFO: Electrons
10:35:28:ST3_smx:INFO: # loops 0
10:35:30:ST3_smx:INFO: # loops 1
10:35:31:ST3_smx:INFO: # loops 2
10:35:33:ST3_smx:INFO: # loops 3
10:35:34:ST3_smx:INFO: # loops 4
10:35:36:ST3_smx:INFO: Total # of broken channels: 0
10:35:36:ST3_smx:INFO: List of broken channels: []
10:35:36:ST3_smx:INFO: Total # of broken channels: 0
10:35:36:ST3_smx:INFO: List of broken channels: []
10:35:38:ST3_smx:INFO: chip: 24-7 28.225000 C 1195.082160 mV
10:35:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:38:ST3_smx:INFO: Electrons
10:35:38:ST3_smx:INFO: # loops 0
10:35:40:ST3_smx:INFO: # loops 1
10:35:41:ST3_smx:INFO: # loops 2
10:35:43:ST3_smx:INFO: # loops 3
10:35:44:ST3_smx:INFO: # loops 4
10:35:46:ST3_smx:INFO: Total # of broken channels: 0
10:35:46:ST3_smx:INFO: List of broken channels: []
10:35:46:ST3_smx:INFO: Total # of broken channels: 2
10:35:46:ST3_smx:INFO: List of broken channels: [90, 91]
10:35:46:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:35:46:febtest:INFO: 23-00 | XA-000-09-004-003-003-017-12 | 37.7 | 1195.1
10:35:47:febtest:INFO: 30-01 | XA-000-09-004-003-003-012-11 | 44.1 | 1171.5
10:35:47:febtest:INFO: 21-02 | XA-000-09-004-003-003-018-12 | 34.6 | 1201.0
10:35:47:febtest:INFO: 28-03 | XA-000-09-004-003-003-011-11 | 37.7 | 1183.3
10:35:47:febtest:INFO: 19-04 | XA-000-09-004-003-003-019-12 | 44.1 | 1165.6
10:35:48:febtest:INFO: 26-05 | XA-000-09-004-003-003-016-12 | 44.1 | 1171.5
10:35:48:febtest:INFO: 17-06 | XA-000-09-004-003-003-014-11 | 28.2 | 1224.5
10:35:48:febtest:INFO: 24-07 | XA-000-09-004-003-003-015-11 | 31.4 | 1218.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_11_25-10_33_20
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2284| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 05053 | SIZE: 62x62 | GRADE: C
MODULE_NAME: M3DR6B1000151A2
LADDER_NAME: L3DR600015
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5060', '1.848', '2.5250']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9850', '1.850', '2.5700']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9540', '1.850', '0.5204']