12:36:30:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:36:30:ST3_Shared:INFO:	                       FEB-Microcable                       
12:36:30:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:36:30:febtest:INFO:	Testing FEB with SN 2285
12:36:31:smx_tester:INFO:	Scanning setup
12:36:31:elinks:INFO:	Disabling clock on downlink 0
12:36:31:elinks:INFO:	Disabling clock on downlink 1
12:36:31:elinks:INFO:	Disabling clock on downlink 2
12:36:31:elinks:INFO:	Disabling clock on downlink 3
12:36:31:elinks:INFO:	Disabling clock on downlink 4
12:36:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:36:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:36:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:36:31:elinks:INFO:	Disabling clock on downlink 0
12:36:31:elinks:INFO:	Disabling clock on downlink 1
12:36:31:elinks:INFO:	Disabling clock on downlink 2
12:36:31:elinks:INFO:	Disabling clock on downlink 3
12:36:31:elinks:INFO:	Disabling clock on downlink 4
12:36:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:36:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:36:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:36:32:elinks:INFO:	Disabling clock on downlink 0
12:36:32:elinks:INFO:	Disabling clock on downlink 1
12:36:32:elinks:INFO:	Disabling clock on downlink 2
12:36:32:elinks:INFO:	Disabling clock on downlink 3
12:36:32:elinks:INFO:	Disabling clock on downlink 4
12:36:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:36:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
12:36:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
12:36:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:36:32:elinks:INFO:	Disabling clock on downlink 0
12:36:32:elinks:INFO:	Disabling clock on downlink 1
12:36:32:elinks:INFO:	Disabling clock on downlink 2
12:36:32:elinks:INFO:	Disabling clock on downlink 3
12:36:32:elinks:INFO:	Disabling clock on downlink 4
12:36:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:36:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:36:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:36:32:elinks:INFO:	Disabling clock on downlink 0
12:36:32:elinks:INFO:	Disabling clock on downlink 1
12:36:32:elinks:INFO:	Disabling clock on downlink 2
12:36:32:elinks:INFO:	Disabling clock on downlink 3
12:36:32:elinks:INFO:	Disabling clock on downlink 4
12:36:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:36:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:36:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
12:36:32:setup_element:INFO:	Scanning clock phase
12:36:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:36:32:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:36:32:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
12:36:32:setup_element:INFO:	Eye window for uplink 16: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
12:36:32:setup_element:INFO:	Eye window for uplink 17: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
12:36:32:setup_element:INFO:	Eye window for uplink 18: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
12:36:32:setup_element:INFO:	Eye window for uplink 19: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
12:36:32:setup_element:INFO:	Eye window for uplink 20: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
12:36:32:setup_element:INFO:	Eye window for uplink 21: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
12:36:32:setup_element:INFO:	Eye window for uplink 22: _________________________________________________________________XXXXXXX________
Clock Delay: 28
12:36:32:setup_element:INFO:	Eye window for uplink 23: _________________________________________________________________XXXXXXX________
Clock Delay: 28
12:36:32:setup_element:INFO:	Eye window for uplink 24: ________________________________________________________________XXXXXXXX________
Clock Delay: 27
12:36:32:setup_element:INFO:	Eye window for uplink 25: ________________________________________________________________XXXXXXXX________
Clock Delay: 27
12:36:32:setup_element:INFO:	Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:36:32:setup_element:INFO:	Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:36:32:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
12:36:32:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
12:36:32:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
12:36:32:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
12:36:32:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 2
==============================================OOO==============================================
12:36:32:setup_element:INFO:	Scanning data phases
12:36:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:36:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:36:38:setup_element:INFO:	Data phase scan results for group 0, downlink 2
12:36:38:setup_element:INFO:	Eye window for uplink 16: _________________________________XXXX___
Data delay found: 14
12:36:38:setup_element:INFO:	Eye window for uplink 17: ________________________________XXXX____
Data delay found: 13
12:36:38:setup_element:INFO:	Eye window for uplink 18: ________________________________XXXX____
Data delay found: 13
12:36:38:setup_element:INFO:	Eye window for uplink 19: ______________________________XXXX______
Data delay found: 11
12:36:38:setup_element:INFO:	Eye window for uplink 20: ________________________________XXXXX___
Data delay found: 14
12:36:38:setup_element:INFO:	Eye window for uplink 21: _______________________________XXXXX____
Data delay found: 13
12:36:38:setup_element:INFO:	Eye window for uplink 22: ______________________________XXXXX_____
Data delay found: 12
12:36:38:setup_element:INFO:	Eye window for uplink 23: ____________________________XXXXXXXXXXX_
Data delay found: 13
12:36:38:setup_element:INFO:	Eye window for uplink 24: _XXXXXX_________________________________
Data delay found: 23
12:36:38:setup_element:INFO:	Eye window for uplink 25: ___XXXXX________________________________
Data delay found: 25
12:36:38:setup_element:INFO:	Eye window for uplink 26: ____________XXXXXXX_____________________
Data delay found: 35
12:36:38:setup_element:INFO:	Eye window for uplink 27: ________________XXXXXXX_________________
Data delay found: 39
12:36:38:setup_element:INFO:	Eye window for uplink 28: ________XXXXXX__________________________
Data delay found: 30
12:36:38:setup_element:INFO:	Eye window for uplink 29: ___________XXXXXX_______________________
Data delay found: 33
12:36:38:setup_element:INFO:	Eye window for uplink 30: _________XXXXXX_________________________
Data delay found: 31
12:36:38:setup_element:INFO:	Eye window for uplink 31: _________XXXXXX_________________________
Data delay found: 31
12:36:38:setup_element:INFO:	Setting the data phase to 14 for uplink 16
12:36:38:setup_element:INFO:	Setting the data phase to 13 for uplink 17
12:36:38:setup_element:INFO:	Setting the data phase to 13 for uplink 18
12:36:38:setup_element:INFO:	Setting the data phase to 11 for uplink 19
12:36:38:setup_element:INFO:	Setting the data phase to 14 for uplink 20
12:36:38:setup_element:INFO:	Setting the data phase to 13 for uplink 21
12:36:38:setup_element:INFO:	Setting the data phase to 12 for uplink 22
12:36:38:setup_element:INFO:	Setting the data phase to 13 for uplink 23
12:36:38:setup_element:INFO:	Setting the data phase to 23 for uplink 24
12:36:38:setup_element:INFO:	Setting the data phase to 25 for uplink 25
12:36:38:setup_element:INFO:	Setting the data phase to 35 for uplink 26
12:36:38:setup_element:INFO:	Setting the data phase to 39 for uplink 27
12:36:38:setup_element:INFO:	Setting the data phase to 30 for uplink 28
12:36:38:setup_element:INFO:	Setting the data phase to 33 for uplink 29
12:36:38:setup_element:INFO:	Setting the data phase to 31 for uplink 30
12:36:38:setup_element:INFO:	Setting the data phase to 31 for uplink 31
==============================================OOO==============================================
12:36:38:setup_element:INFO:	Beginning SMX ASICs map scan
12:36:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:36:38:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:36:38:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:36:38:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:36:38:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
12:36:38:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
12:36:38:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
12:36:38:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:36:38:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:36:38:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
12:36:38:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
12:36:39:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:36:39:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:36:39:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
12:36:39:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
12:36:39:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:36:39:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:36:39:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
12:36:39:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
12:36:39:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:36:39:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:36:41:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 66
    Eye Windows:
      Uplink 16: __________________________________________________________________XXXXXXXX______
      Uplink 17: __________________________________________________________________XXXXXXXX______
      Uplink 18: __________________________________________________________________XXXXXXX_______
      Uplink 19: __________________________________________________________________XXXXXXX_______
      Uplink 20: __________________________________________________________________XXXXXXXX______
      Uplink 21: __________________________________________________________________XXXXXXXX______
      Uplink 22: _________________________________________________________________XXXXXXX________
      Uplink 23: _________________________________________________________________XXXXXXX________
      Uplink 24: ________________________________________________________________XXXXXXXX________
      Uplink 25: ________________________________________________________________XXXXXXXX________
      Uplink 26: ______________________________________________________________________XXXXXXXX__
      Uplink 27: ______________________________________________________________________XXXXXXXX__
      Uplink 28: ________________________________________________________________________________
      Uplink 29: ________________________________________________________________________________
      Uplink 30: ________________________________________________________________________________
      Uplink 31: ________________________________________________________________________________
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 14
      Window Length: 36
      Eye Window: _________________________________XXXX___
    Uplink 17:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 18:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 19:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
    Uplink 20:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 21:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 22:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 23:
      Optimal Phase: 13
      Window Length: 29
      Eye Window: ____________________________XXXXXXXXXXX_
    Uplink 24:
      Optimal Phase: 23
      Window Length: 34
      Eye Window: _XXXXXX_________________________________
    Uplink 25:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 26:
      Optimal Phase: 35
      Window Length: 33
      Eye Window: ____________XXXXXXX_____________________
    Uplink 27:
      Optimal Phase: 39
      Window Length: 33
      Eye Window: ________________XXXXXXX_________________
    Uplink 28:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 29:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 30:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 31:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________

==============================================OOO==============================================
12:36:41:setup_element:INFO:	Performing Elink synchronization
12:36:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:36:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:36:41:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:36:41:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
12:36:41:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
12:36:41:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
12:36:41:febtest:INFO:	Init all SMX (CSA): 30
12:36:56:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:36:56:febtest:INFO:	23-00 | XA-035-08-002-003-007-021-14 |  56.8 | 1112.1
12:36:56:febtest:INFO:	30-01 | XA-034-08-002-003-007-021-05 |  63.2 | 1082.3
12:36:56:febtest:INFO:	21-02 | XA-036-08-002-003-007-021-13 |  69.6 | 1070.3
12:36:57:febtest:INFO:	28-03 | XA-033-08-002-003-007-021-01 |  53.6 | 1118.1
12:36:57:febtest:INFO:	19-04 | XA-038-08-002-003-007-021-02 |  53.6 | 1130.0
12:36:57:febtest:INFO:	26-05 | XA-000-09-004-003-003-007-11 |  28.2 | 1183.3
12:36:57:febtest:INFO:	17-06 | XA-037-08-002-003-007-021-06 |  63.2 | 1082.3
12:36:57:febtest:INFO:	24-07 | XA-031-08-002-003-007-021-08 |  63.2 | 1082.3
12:36:58:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
12:37:00:ST3_smx:INFO:	chip: 23-0 	 56.797143 C 	 1124.048640 mV
12:37:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:01:ST3_smx:INFO:		Electrons
12:37:01:ST3_smx:INFO:	# loops 0
12:37:02:ST3_smx:INFO:	# loops 1
12:37:04:ST3_smx:INFO:	# loops 2
12:37:05:ST3_smx:INFO:	Total # of broken channels: 0
12:37:05:ST3_smx:INFO:	List of broken channels: []
12:37:05:ST3_smx:INFO:	Total # of broken channels: 7
12:37:05:ST3_smx:INFO:	List of broken channels: [92, 116, 118, 120, 122, 124, 126]
12:37:07:ST3_smx:INFO:	chip: 30-1 	 63.173842 C 	 1094.240115 mV
12:37:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:07:ST3_smx:INFO:		Electrons
12:37:07:ST3_smx:INFO:	# loops 0
12:37:09:ST3_smx:INFO:	# loops 1
12:37:10:ST3_smx:INFO:	# loops 2
12:37:12:ST3_smx:INFO:	Total # of broken channels: 0
12:37:12:ST3_smx:INFO:	List of broken channels: []
12:37:12:ST3_smx:INFO:	Total # of broken channels: 0
12:37:12:ST3_smx:INFO:	List of broken channels: []
12:37:14:ST3_smx:INFO:	chip: 21-2 	 69.560482 C 	 1076.295360 mV
12:37:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:14:ST3_smx:INFO:		Electrons
12:37:14:ST3_smx:INFO:	# loops 0
12:37:15:ST3_smx:INFO:	# loops 1
12:37:17:ST3_smx:INFO:	# loops 2
12:37:18:ST3_smx:INFO:	Total # of broken channels: 1
12:37:18:ST3_smx:INFO:	List of broken channels: [121]
12:37:18:ST3_smx:INFO:	Total # of broken channels: 23
12:37:18:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45]
12:37:20:ST3_smx:INFO:	chip: 28-3 	 53.612520 C 	 1135.937260 mV
12:37:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:20:ST3_smx:INFO:		Electrons
12:37:20:ST3_smx:INFO:	# loops 0
12:37:22:ST3_smx:INFO:	# loops 1
12:37:23:ST3_smx:INFO:	# loops 2
12:37:25:ST3_smx:INFO:	Total # of broken channels: 0
12:37:25:ST3_smx:INFO:	List of broken channels: []
12:37:25:ST3_smx:INFO:	Total # of broken channels: 0
12:37:25:ST3_smx:INFO:	List of broken channels: []
12:37:27:ST3_smx:INFO:	chip: 19-4 	 53.612520 C 	 1141.874115 mV
12:37:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:27:ST3_smx:INFO:		Electrons
12:37:27:ST3_smx:INFO:	# loops 0
12:37:28:ST3_smx:INFO:	# loops 1
12:37:30:ST3_smx:INFO:	# loops 2
12:37:32:ST3_smx:INFO:	Total # of broken channels: 0
12:37:32:ST3_smx:INFO:	List of broken channels: []
12:37:32:ST3_smx:INFO:	Total # of broken channels: 8
12:37:32:ST3_smx:INFO:	List of broken channels: [112, 114, 116, 118, 120, 122, 124, 126]
12:37:33:ST3_smx:INFO:	chip: 26-5 	 28.225000 C 	 1189.190035 mV
12:37:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:33:ST3_smx:INFO:		Electrons
12:37:33:ST3_smx:INFO:	# loops 0
12:37:35:ST3_smx:INFO:	# loops 1
12:37:36:ST3_smx:INFO:	# loops 2
12:37:38:ST3_smx:INFO:	Total # of broken channels: 0
12:37:38:ST3_smx:INFO:	List of broken channels: []
12:37:38:ST3_smx:INFO:	Total # of broken channels: 0
12:37:38:ST3_smx:INFO:	List of broken channels: []
12:37:40:ST3_smx:INFO:	chip: 17-6 	 63.173842 C 	 1094.240115 mV
12:37:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:40:ST3_smx:INFO:		Electrons
12:37:40:ST3_smx:INFO:	# loops 0
12:37:42:ST3_smx:INFO:	# loops 1
12:37:43:ST3_smx:INFO:	# loops 2
12:37:45:ST3_smx:INFO:	Total # of broken channels: 0
12:37:45:ST3_smx:INFO:	List of broken channels: []
12:37:45:ST3_smx:INFO:	Total # of broken channels: 0
12:37:45:ST3_smx:INFO:	List of broken channels: []
12:37:47:ST3_smx:INFO:	chip: 24-7 	 63.173842 C 	 1088.263500 mV
12:37:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:37:47:ST3_smx:INFO:		Electrons
12:37:47:ST3_smx:INFO:	# loops 0
12:37:48:ST3_smx:INFO:	# loops 1
12:37:50:ST3_smx:INFO:	# loops 2
12:37:51:ST3_smx:INFO:	Total # of broken channels: 0
12:37:51:ST3_smx:INFO:	List of broken channels: []
12:37:51:ST3_smx:INFO:	Total # of broken channels: 0
12:37:51:ST3_smx:INFO:	List of broken channels: []
12:37:52:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:37:52:febtest:INFO:	23-00 | XA-035-08-002-003-007-021-14 |  56.8 | 1147.8
12:37:52:febtest:INFO:	30-01 | XA-034-08-002-003-007-021-05 |  63.2 | 1112.1
12:37:52:febtest:INFO:	21-02 | XA-036-08-002-003-007-021-13 |  69.6 | 1100.2
12:37:53:febtest:INFO:	28-03 | XA-033-08-002-003-007-021-01 |  53.6 | 1153.7
12:37:53:febtest:INFO:	19-04 | XA-038-08-002-003-007-021-02 |  53.6 | 1159.7
12:37:53:febtest:INFO:	26-05 | XA-000-09-004-003-003-007-11 |  28.2 | 1212.7
12:37:53:febtest:INFO:	17-06 | XA-037-08-002-003-007-021-06 |  66.4 | 1112.1
12:37:53:febtest:INFO:	24-07 | XA-031-08-002-003-007-021-08 |  66.4 | 1106.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_12-12_36_30
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2285| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9460', '1.848', '2.1110']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0360', '1.850', '2.5380']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9860', '1.850', '0.5259']