14:19:10:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:19:10:ST3_Shared:INFO:	                       FEB-Microcable                       
14:19:10:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:19:10:febtest:INFO:	Testing FEB with SN 2286
14:19:12:smx_tester:INFO:	Scanning setup
14:19:12:elinks:INFO:	Disabling clock on downlink 0
14:19:12:elinks:INFO:	Disabling clock on downlink 1
14:19:12:elinks:INFO:	Disabling clock on downlink 2
14:19:12:elinks:INFO:	Disabling clock on downlink 3
14:19:12:elinks:INFO:	Disabling clock on downlink 4
14:19:12:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:19:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:19:12:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:19:12:elinks:INFO:	Disabling clock on downlink 0
14:19:12:elinks:INFO:	Disabling clock on downlink 1
14:19:12:elinks:INFO:	Disabling clock on downlink 2
14:19:12:elinks:INFO:	Disabling clock on downlink 3
14:19:12:elinks:INFO:	Disabling clock on downlink 4
14:19:12:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:19:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:19:12:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:19:12:elinks:INFO:	Disabling clock on downlink 0
14:19:12:elinks:INFO:	Disabling clock on downlink 1
14:19:12:elinks:INFO:	Disabling clock on downlink 2
14:19:12:elinks:INFO:	Disabling clock on downlink 3
14:19:12:elinks:INFO:	Disabling clock on downlink 4
14:19:12:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:19:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:19:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:19:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:19:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
14:19:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
14:19:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
14:19:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
14:19:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
14:19:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
14:19:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:19:13:elinks:INFO:	Disabling clock on downlink 0
14:19:13:elinks:INFO:	Disabling clock on downlink 1
14:19:13:elinks:INFO:	Disabling clock on downlink 2
14:19:13:elinks:INFO:	Disabling clock on downlink 3
14:19:13:elinks:INFO:	Disabling clock on downlink 4
14:19:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:19:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:19:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:19:13:elinks:INFO:	Disabling clock on downlink 0
14:19:13:elinks:INFO:	Disabling clock on downlink 1
14:19:13:elinks:INFO:	Disabling clock on downlink 2
14:19:13:elinks:INFO:	Disabling clock on downlink 3
14:19:13:elinks:INFO:	Disabling clock on downlink 4
14:19:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:19:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:19:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:19:13:setup_element:INFO:	Scanning clock phase
14:19:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:19:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:19:13:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:19:13:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
14:19:13:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
14:19:13:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:19:13:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:19:13:setup_element:INFO:	Eye window for uplink 28: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
14:19:13:setup_element:INFO:	Eye window for uplink 29: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
14:19:13:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:19:13:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:19:13:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 2
==============================================OOO==============================================
14:19:13:setup_element:INFO:	Scanning data phases
14:19:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:19:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:19:19:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:19:19:setup_element:INFO:	Eye window for uplink 24: __________XXXXX_________________________
Data delay found: 32
14:19:19:setup_element:INFO:	Eye window for uplink 25: ____________XXXXX_______________________
Data delay found: 34
14:19:19:setup_element:INFO:	Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
14:19:19:setup_element:INFO:	Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
14:19:19:setup_element:INFO:	Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
14:19:19:setup_element:INFO:	Eye window for uplink 29: ________________XXXXX___________________
Data delay found: 38
14:19:19:setup_element:INFO:	Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
14:19:19:setup_element:INFO:	Eye window for uplink 31: _________________XXXXXX_________________
Data delay found: 39
14:19:19:setup_element:INFO:	Setting the data phase to 32 for uplink 24
14:19:19:setup_element:INFO:	Setting the data phase to 34 for uplink 25
14:19:19:setup_element:INFO:	Setting the data phase to 32 for uplink 26
14:19:19:setup_element:INFO:	Setting the data phase to 35 for uplink 27
14:19:19:setup_element:INFO:	Setting the data phase to 35 for uplink 28
14:19:19:setup_element:INFO:	Setting the data phase to 38 for uplink 29
14:19:19:setup_element:INFO:	Setting the data phase to 39 for uplink 30
14:19:19:setup_element:INFO:	Setting the data phase to 39 for uplink 31
==============================================OOO==============================================
14:19:19:setup_element:INFO:	Beginning SMX ASICs map scan
14:19:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:19:19:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:19:19:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:19:19:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:19:19:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
14:19:19:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:19:19:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:19:19:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:19:19:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:19:20:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:19:20:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:19:20:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:19:20:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:19:21:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 71
    Eye Windows:
      Uplink 24: ___________________________________________________________________XXXXXXXXX____
      Uplink 25: ___________________________________________________________________XXXXXXXXX____
      Uplink 26: ____________________________________________________________________XXXXXXXX____
      Uplink 27: ____________________________________________________________________XXXXXXXX____
      Uplink 28: ___________________________________________________________________XXXXXXXX_____
      Uplink 29: ___________________________________________________________________XXXXXXXX_____
      Uplink 30: _____________________________________________________________________XXXXXX_____
      Uplink 31: _____________________________________________________________________XXXXXX_____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 25:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 26:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 27:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 29:
      Optimal Phase: 38
      Window Length: 35
      Eye Window: ________________XXXXX___________________
    Uplink 30:
      Optimal Phase: 39
      Window Length: 34
      Eye Window: _________________XXXXXX_________________
    Uplink 31:
      Optimal Phase: 39
      Window Length: 34
      Eye Window: _________________XXXXXX_________________

==============================================OOO==============================================
14:19:21:setup_element:INFO:	Performing Elink synchronization
14:19:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:19:21:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:19:21:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:19:21:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
14:19:21:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:19:21:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
14:19:22:febtest:INFO:	Init all SMX (CSA): 30
14:19:29:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:19:30:febtest:INFO:	30-01 | XA-000-09-004-012-009-007-01 |  28.2 | 1183.3
14:19:30:febtest:INFO:	28-03 | XA-000-09-004-012-007-003-08 |  47.3 | 1112.1
14:19:30:febtest:INFO:	26-05 | XA-000-09-004-012-008-004-12 |  34.6 | 1159.7
14:19:30:febtest:INFO:	24-07 | XA-000-09-004-012-008-005-12 |  31.4 | 1177.4
14:19:31:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:19:33:ST3_smx:INFO:	chip: 30-1 	 28.225000 C 	 1189.190035 mV
14:19:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:19:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:19:33:ST3_smx:INFO:		Electrons
14:19:33:ST3_smx:INFO:	# loops 0
14:19:35:ST3_smx:INFO:	# loops 1
14:19:36:ST3_smx:INFO:	# loops 2
14:19:38:ST3_smx:INFO:	Total # of broken channels: 0
14:19:38:ST3_smx:INFO:	List of broken channels: []
14:19:38:ST3_smx:INFO:	Total # of broken channels: 0
14:19:38:ST3_smx:INFO:	List of broken channels: []
14:19:40:ST3_smx:INFO:	chip: 28-3 	 47.250730 C 	 1124.048640 mV
14:19:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:19:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:19:40:ST3_smx:INFO:		Electrons
14:19:40:ST3_smx:INFO:	# loops 0
14:19:41:ST3_smx:INFO:	# loops 1
14:19:43:ST3_smx:INFO:	# loops 2
14:19:44:ST3_smx:INFO:	Total # of broken channels: 0
14:19:44:ST3_smx:INFO:	List of broken channels: []
14:19:44:ST3_smx:INFO:	Total # of broken channels: 0
14:19:44:ST3_smx:INFO:	List of broken channels: []
14:19:46:ST3_smx:INFO:	chip: 26-5 	 34.556970 C 	 1171.483840 mV
14:19:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:19:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:19:46:ST3_smx:INFO:		Electrons
14:19:46:ST3_smx:INFO:	# loops 0
14:19:48:ST3_smx:INFO:	# loops 1
14:19:49:ST3_smx:INFO:	# loops 2
14:19:51:ST3_smx:INFO:	Total # of broken channels: 0
14:19:51:ST3_smx:INFO:	List of broken channels: []
14:19:51:ST3_smx:INFO:	Total # of broken channels: 0
14:19:51:ST3_smx:INFO:	List of broken channels: []
14:19:53:ST3_smx:INFO:	chip: 24-7 	 31.389742 C 	 1189.190035 mV
14:19:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:19:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:19:53:ST3_smx:INFO:		Electrons
14:19:53:ST3_smx:INFO:	# loops 0
14:19:54:ST3_smx:INFO:	# loops 1
14:19:56:ST3_smx:INFO:	# loops 2
14:19:57:ST3_smx:INFO:	Total # of broken channels: 0
14:19:57:ST3_smx:INFO:	List of broken channels: []
14:19:57:ST3_smx:INFO:	Total # of broken channels: 0
14:19:57:ST3_smx:INFO:	List of broken channels: []
14:19:58:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:19:58:febtest:INFO:	30-01 | XA-000-09-004-012-009-007-01 |  28.2 | 1212.7
14:19:58:febtest:INFO:	28-03 | XA-000-09-004-012-007-003-08 |  47.3 | 1141.9
14:19:58:febtest:INFO:	26-05 | XA-000-09-004-012-008-004-12 |  34.6 | 1189.2
14:19:59:febtest:INFO:	24-07 | XA-000-09-004-012-008-005-12 |  31.4 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_07-14_19_10
OPERATOR  : Robert V.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2286| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0640', '1.849', '0.9020']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0230', '1.850', '1.3030']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0120', '1.850', '0.2673']