14:46:07:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:46:07:ST3_Shared:INFO:	                          FEB-ASIC                          
14:46:07:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:46:07:febtest:INFO:	Testing FEB with SN 2289
14:46:09:smx_tester:INFO:	Scanning setup
14:46:09:elinks:INFO:	Disabling clock on downlink 0
14:46:09:elinks:INFO:	Disabling clock on downlink 1
14:46:09:elinks:INFO:	Disabling clock on downlink 2
14:46:09:elinks:INFO:	Disabling clock on downlink 3
14:46:09:elinks:INFO:	Disabling clock on downlink 4
14:46:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:46:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:46:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:46:09:elinks:INFO:	Disabling clock on downlink 0
14:46:09:elinks:INFO:	Disabling clock on downlink 1
14:46:09:elinks:INFO:	Disabling clock on downlink 2
14:46:09:elinks:INFO:	Disabling clock on downlink 3
14:46:09:elinks:INFO:	Disabling clock on downlink 4
14:46:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:46:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:46:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:46:09:elinks:INFO:	Disabling clock on downlink 0
14:46:09:elinks:INFO:	Disabling clock on downlink 1
14:46:09:elinks:INFO:	Disabling clock on downlink 2
14:46:09:elinks:INFO:	Disabling clock on downlink 3
14:46:09:elinks:INFO:	Disabling clock on downlink 4
14:46:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:46:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:46:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
14:46:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
14:46:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
14:46:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
14:46:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
14:46:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
14:46:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
14:46:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
14:46:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:46:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:46:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
14:46:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
14:46:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:46:09:elinks:INFO:	Disabling clock on downlink 0
14:46:09:elinks:INFO:	Disabling clock on downlink 1
14:46:09:elinks:INFO:	Disabling clock on downlink 2
14:46:09:elinks:INFO:	Disabling clock on downlink 3
14:46:09:elinks:INFO:	Disabling clock on downlink 4
14:46:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:46:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:46:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:46:09:elinks:INFO:	Disabling clock on downlink 0
14:46:09:elinks:INFO:	Disabling clock on downlink 1
14:46:09:elinks:INFO:	Disabling clock on downlink 2
14:46:09:elinks:INFO:	Disabling clock on downlink 3
14:46:09:elinks:INFO:	Disabling clock on downlink 4
14:46:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:46:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:46:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:46:09:setup_element:INFO:	Scanning clock phase
14:46:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:46:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:46:09:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:46:09:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
14:46:09:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
14:46:09:setup_element:INFO:	Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:46:09:setup_element:INFO:	Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:46:09:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:46:09:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:46:09:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:46:09:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:46:09:setup_element:INFO:	Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:46:09:setup_element:INFO:	Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:46:09:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:46:09:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:46:09:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
14:46:10:setup_element:INFO:	Scanning data phases
14:46:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:46:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:46:15:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:46:15:setup_element:INFO:	Eye window for uplink 16: XXX__________________________________XXX
Data delay found: 19
14:46:15:setup_element:INFO:	Eye window for uplink 17: XX_________________________________XXXXX
Data delay found: 18
14:46:15:setup_element:INFO:	Eye window for uplink 18: XXXXXX_________________________________X
Data delay found: 22
14:46:15:setup_element:INFO:	Eye window for uplink 19: XXX__________________________________XXX
Data delay found: 19
14:46:15:setup_element:INFO:	Eye window for uplink 20: XXXX__________________________________XX
Data delay found: 20
14:46:15:setup_element:INFO:	Eye window for uplink 21: XXX__________________________________XXX
Data delay found: 19
14:46:15:setup_element:INFO:	Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
14:46:15:setup_element:INFO:	Eye window for uplink 23: XXXXXXX____________________________XXXXX
Data delay found: 20
14:46:15:setup_element:INFO:	Eye window for uplink 24: _________XXXXXX_________________________
Data delay found: 31
14:46:15:setup_element:INFO:	Eye window for uplink 25: ___________XXXXXX_______________________
Data delay found: 33
14:46:15:setup_element:INFO:	Eye window for uplink 28: ____________XXXXXX______________________
Data delay found: 34
14:46:15:setup_element:INFO:	Eye window for uplink 29: ______________XXXXXXX___________________
Data delay found: 37
14:46:15:setup_element:INFO:	Setting the data phase to 19 for uplink 16
14:46:15:setup_element:INFO:	Setting the data phase to 18 for uplink 17
14:46:15:setup_element:INFO:	Setting the data phase to 22 for uplink 18
14:46:15:setup_element:INFO:	Setting the data phase to 19 for uplink 19
14:46:15:setup_element:INFO:	Setting the data phase to 20 for uplink 20
14:46:15:setup_element:INFO:	Setting the data phase to 19 for uplink 21
14:46:15:setup_element:INFO:	Setting the data phase to 19 for uplink 22
14:46:15:setup_element:INFO:	Setting the data phase to 20 for uplink 23
14:46:15:setup_element:INFO:	Setting the data phase to 31 for uplink 24
14:46:15:setup_element:INFO:	Setting the data phase to 33 for uplink 25
14:46:15:setup_element:INFO:	Setting the data phase to 34 for uplink 28
14:46:15:setup_element:INFO:	Setting the data phase to 37 for uplink 29
==============================================OOO==============================================
14:46:15:setup_element:INFO:	Beginning SMX ASICs map scan
14:46:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:46:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:46:15:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:46:15:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:46:15:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 28, 29]
14:46:15:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:46:15:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:46:15:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:46:15:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:46:16:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:46:16:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:46:16:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:46:16:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:46:16:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:46:16:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:46:16:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:46:16:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:46:18:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 28, 29]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 71
    Eye Windows:
      Uplink 16: ________________________________________________________________________________
      Uplink 17: ________________________________________________________________________________
      Uplink 18: _____________________________________________________________________XXXXXXXX___
      Uplink 19: _____________________________________________________________________XXXXXXXX___
      Uplink 20: ____________________________________________________________________XXXXXXXXX___
      Uplink 21: ____________________________________________________________________XXXXXXXXX___
      Uplink 22: ____________________________________________________________________XXXXXXXX____
      Uplink 23: ____________________________________________________________________XXXXXXXX____
      Uplink 24: ____________________________________________________________________XXXXXXXX____
      Uplink 25: ____________________________________________________________________XXXXXXXX____
      Uplink 28: _____________________________________________________________________XXXXXXX____
      Uplink 29: _____________________________________________________________________XXXXXXX____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 17:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 18:
      Optimal Phase: 22
      Window Length: 33
      Eye Window: XXXXXX_________________________________X
    Uplink 19:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 20:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 21:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 22:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 23:
      Optimal Phase: 20
      Window Length: 28
      Eye Window: XXXXXXX____________________________XXXXX
    Uplink 24:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 25:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 28:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXXXX___________________

==============================================OOO==============================================
14:46:18:setup_element:INFO:	Performing Elink synchronization
14:46:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:46:18:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:46:18:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:46:18:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
14:46:18:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:46:18:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 28, 29]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:46:18:febtest:INFO:	Init all SMX (CSA): 30
14:46:29:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:46:29:febtest:INFO:	23-00 | XA-000-09-004-017-011-013-01 |  37.7 | 1153.7
14:46:30:febtest:INFO:	21-02 | XA-000-09-004-017-006-013-06 |  34.6 | 1177.4
14:46:30:febtest:INFO:	28-03 | XA-000-09-004-017-010-021-11 |  40.9 | 1147.8
14:46:30:febtest:INFO:	19-04 | XA-000-09-004-017-004-016-02 | 357.0 |    0.0
14:46:30:febtest:INFO:	17-06 | XA-000-09-004-017-014-013-10 |  47.3 | 1147.8
14:46:31:febtest:INFO:	24-07 | XA-000-09-004-019-008-017-01 |  47.3 | 1135.9
14:46:32:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:46:32:febtest:ERROR:	HW addres 2 != 1
14:46:43:ST3_smx:INFO:	chip: 23-0 	 37.726682 C 	 1165.571835 mV
14:46:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:43:ST3_smx:INFO:		Electrons
14:46:43:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
14:46:46:ST3_smx:INFO:	----> Checking Analog response
14:46:46:ST3_smx:INFO:	----> Checking broken channels
14:46:46:ST3_smx:INFO:	Total # broken ch: 145
14:46:46:ST3_smx:INFO:	List FAST: [2, 5, 6, 7, 8, 13, 15, 18, 19, 21, 26, 33, 38, 40, 53, 57, 59, 63, 70, 74, 85, 111, 118]
14:46:46:ST3_smx:INFO:	List SLOW: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 66, 68, 69, 70, 71, 72, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
14:46:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:46:ST3_smx:INFO:		Holes
14:46:46:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
14:46:48:ST3_smx:INFO:	----> Checking Analog response
14:46:48:ST3_smx:INFO:	----> Checking broken channels
14:46:48:ST3_smx:INFO:	Total # broken ch: 145
14:46:48:ST3_smx:INFO:	List FAST: [2, 5, 6, 7, 8, 13, 15, 18, 19, 21, 26, 33, 38, 40, 53, 57, 59, 63, 70, 74, 85, 111, 118]
14:46:48:ST3_smx:INFO:	List SLOW: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 66, 68, 69, 70, 71, 72, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
14:46:50:ST3_smx:INFO:	chip: 21-2 	 34.556970 C 	 1183.292940 mV
14:46:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:50:ST3_smx:INFO:		Electrons
14:46:50:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
14:46:52:ST3_smx:INFO:	----> Checking Analog response
14:46:52:ST3_smx:INFO:	----> Checking broken channels
14:46:52:ST3_smx:INFO:	Total # broken ch: 0
14:46:52:ST3_smx:INFO:	List FAST: []
14:46:52:ST3_smx:INFO:	List SLOW: []
14:46:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:52:ST3_smx:INFO:		Holes
14:46:52:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
14:46:55:ST3_smx:INFO:	----> Checking Analog response
14:46:55:ST3_smx:INFO:	----> Checking broken channels
14:46:55:ST3_smx:INFO:	Total # broken ch: 0
14:46:55:ST3_smx:INFO:	List FAST: []
14:46:55:ST3_smx:INFO:	List SLOW: []
14:46:56:ST3_smx:INFO:	chip: 28-3 	 40.898880 C 	 1153.732915 mV
14:46:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:56:ST3_smx:INFO:		Electrons
14:46:56:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
14:46:59:ST3_smx:INFO:	----> Checking Analog response
14:46:59:ST3_smx:INFO:	----> Checking broken channels
14:46:59:ST3_smx:INFO:	Total # broken ch: 0
14:46:59:ST3_smx:INFO:	List FAST: []
14:46:59:ST3_smx:INFO:	List SLOW: []
14:46:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:59:ST3_smx:INFO:		Holes
14:46:59:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
14:47:01:ST3_smx:INFO:	----> Checking Analog response
14:47:01:ST3_smx:INFO:	----> Checking broken channels
14:47:02:ST3_smx:INFO:	Total # broken ch: 0
14:47:02:ST3_smx:INFO:	List FAST: []
14:47:02:ST3_smx:INFO:	List SLOW: []
14:47:03:ST3_smx:INFO:	chip: 19-4 	 -432.266438 C 	 1578.532875 mV
14:47:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:03:ST3_smx:INFO:		Electrons
14:47:03:ST3_smx:INFO:			Injected pulses:   0LSB, amp_cal 0.000000 fC
14:47:05:ST3_smx:INFO:	----> Checking Analog response
14:47:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:06:ST3_smx:INFO:	Total # broken ch: 512
14:47:06:ST3_smx:INFO:	List FAST: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
14:47:06:ST3_smx:INFO:	List SLOW: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
14:47:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:06:ST3_smx:INFO:		Holes
14:47:06:ST3_smx:INFO:			Injected pulses:   0LSB, amp_cal 0.000000 fC
14:47:08:ST3_smx:INFO:	----> Checking Analog response
14:47:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:08:ST3_smx:INFO:	Total # broken ch: 512
14:47:08:ST3_smx:INFO:	List FAST: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
14:47:08:ST3_smx:INFO:	List SLOW: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
14:47:10:ST3_smx:INFO:	chip: 17-6 	 44.073563 C 	 1153.732915 mV
14:47:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:10:ST3_smx:INFO:		Electrons
14:47:10:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
14:47:12:ST3_smx:INFO:	----> Checking Analog response
14:47:12:ST3_smx:INFO:	----> Checking broken channels
14:47:12:ST3_smx:INFO:	Total # broken ch: 0
14:47:12:ST3_smx:INFO:	List FAST: []
14:47:12:ST3_smx:INFO:	List SLOW: []
14:47:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:12:ST3_smx:INFO:		Holes
14:47:12:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
14:47:14:ST3_smx:INFO:	----> Checking Analog response
14:47:14:ST3_smx:INFO:	----> Checking broken channels
14:47:15:ST3_smx:INFO:	Total # broken ch: 0
14:47:15:ST3_smx:INFO:	List FAST: []
14:47:15:ST3_smx:INFO:	List SLOW: []
14:47:16:ST3_smx:INFO:	chip: 24-7 	 47.250730 C 	 1141.874115 mV
14:47:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:16:ST3_smx:INFO:		Electrons
14:47:16:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
14:47:18:ST3_smx:INFO:	----> Checking Analog response
14:47:18:ST3_smx:INFO:	----> Checking broken channels
14:47:19:ST3_smx:INFO:	Total # broken ch: 0
14:47:19:ST3_smx:INFO:	List FAST: []
14:47:19:ST3_smx:INFO:	List SLOW: []
14:47:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:47:19:ST3_smx:INFO:		Holes
14:47:19:ST3_smx:INFO:			Injected pulses: 150LSB, amp_cal 8.400000 fC
14:47:21:ST3_smx:INFO:	----> Checking Analog response
14:47:21:ST3_smx:INFO:	----> Checking broken channels
14:47:21:ST3_smx:INFO:	Total # broken ch: 0
14:47:21:ST3_smx:INFO:	List FAST: []
14:47:21:ST3_smx:INFO:	List SLOW: []
14:47:21:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:47:22:febtest:INFO:	23-00 | XA-000-09-004-017-011-013-01 |  37.7 | 1177.4
14:47:22:febtest:INFO:	21-02 | XA-000-09-004-017-006-013-06 |  34.6 | 1201.0
14:47:22:febtest:INFO:	28-03 | XA-000-09-004-017-010-021-11 |  44.1 | 1171.5
14:47:22:febtest:INFO:	19-04 | XA-000-09-004-017-004-016-02 | -432.3 | 1578.5
14:47:22:febtest:INFO:	17-06 | XA-000-09-004-017-014-013-10 |  47.3 | 1171.5
14:47:23:febtest:INFO:	24-07 | XA-000-09-004-019-008-017-01 |  50.4 | 1153.7
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_11_19-14_46_07
OPERATOR  : Robert V.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2289| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
MODULE_NAMEM3DR4T0000130B2
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.6920', '1.850', '2.1220']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.7290', '1.850', '2.2350']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.7070', '1.850', '1.1190']