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FEB_2299 24.01.25 11:14:42
Info
11:14:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:14:42:ST3_Shared:INFO: FEB-Sensor
11:14:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:14:47:ST3_ModuleSelector:DEBUG: M4UR5B2011332B2
11:14:47:ST3_ModuleSelector:DEBUG: L4UR501133
11:14:47:ST3_ModuleSelector:DEBUG: 30394
11:14:47:ST3_ModuleSelector:DEBUG: 62x124
11:14:47:ST3_ModuleSelector:DEBUG: B
11:14:47:ST3_ModuleSelector:DEBUG: M4UR5B2011332B2
11:14:47:ST3_ModuleSelector:DEBUG: L4UR501133
11:14:47:ST3_ModuleSelector:DEBUG: 30394
11:14:47:ST3_ModuleSelector:DEBUG: 62x124
11:14:47:ST3_ModuleSelector:DEBUG: B
11:14:51:ST3_ModuleSelector:INFO: M4UR5B2011332B2
11:14:51:ST3_ModuleSelector:INFO: 30394
11:14:51:febtest:INFO: Testing FEB with SN 2299
11:14:52:smx_tester:INFO: Scanning setup
11:14:52:elinks:INFO: Disabling clock on downlink 0
11:14:52:elinks:INFO: Disabling clock on downlink 1
11:14:52:elinks:INFO: Disabling clock on downlink 2
11:14:52:elinks:INFO: Disabling clock on downlink 3
11:14:52:elinks:INFO: Disabling clock on downlink 4
11:14:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:14:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:14:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:14:53:elinks:INFO: Disabling clock on downlink 0
11:14:53:elinks:INFO: Disabling clock on downlink 1
11:14:53:elinks:INFO: Disabling clock on downlink 2
11:14:53:elinks:INFO: Disabling clock on downlink 3
11:14:53:elinks:INFO: Disabling clock on downlink 4
11:14:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:14:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:14:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:14:53:elinks:INFO: Disabling clock on downlink 0
11:14:53:elinks:INFO: Disabling clock on downlink 1
11:14:53:elinks:INFO: Disabling clock on downlink 2
11:14:53:elinks:INFO: Disabling clock on downlink 3
11:14:53:elinks:INFO: Disabling clock on downlink 4
11:14:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:14:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:14:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:14:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:14:53:elinks:INFO: Disabling clock on downlink 0
11:14:53:elinks:INFO: Disabling clock on downlink 1
11:14:53:elinks:INFO: Disabling clock on downlink 2
11:14:53:elinks:INFO: Disabling clock on downlink 3
11:14:53:elinks:INFO: Disabling clock on downlink 4
11:14:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:14:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:14:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:14:53:elinks:INFO: Disabling clock on downlink 0
11:14:53:elinks:INFO: Disabling clock on downlink 1
11:14:53:elinks:INFO: Disabling clock on downlink 2
11:14:53:elinks:INFO: Disabling clock on downlink 3
11:14:53:elinks:INFO: Disabling clock on downlink 4
11:14:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:14:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:14:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:14:53:setup_element:INFO: Scanning clock phase
11:14:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:14:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:14:54:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:14:54:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:14:54:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:14:54:setup_element:INFO: Eye window for uplink 18: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
11:14:54:setup_element:INFO: Eye window for uplink 19: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
11:14:54:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
11:14:54:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
11:14:54:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:14:54:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:14:54:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:14:54:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:14:54:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:14:54:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:14:54:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:14:54:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:14:54:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:14:54:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:14:54:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
11:14:54:setup_element:INFO: Scanning data phases
11:14:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:14:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:14:59:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:14:59:setup_element:INFO: Eye window for uplink 16: XX___________________________________XXX
Data delay found: 19
11:14:59:setup_element:INFO: Eye window for uplink 17: ___________________________________XXXXX
Data delay found: 17
11:14:59:setup_element:INFO: Eye window for uplink 18: __________________________________XXXXXX
Data delay found: 16
11:14:59:setup_element:INFO: Eye window for uplink 19: _________________________________XXXX___
Data delay found: 14
11:14:59:setup_element:INFO: Eye window for uplink 20: XXX___________________________________XX
Data delay found: 20
11:14:59:setup_element:INFO: Eye window for uplink 21: XX_________________________________XXXXX
Data delay found: 18
11:14:59:setup_element:INFO: Eye window for uplink 22: XXX_________________________________XXXX
Data delay found: 19
11:14:59:setup_element:INFO: Eye window for uplink 23: XXXXXX_____________________________XXXXX
Data delay found: 20
11:14:59:setup_element:INFO: Eye window for uplink 24: _________XXXXX__________________________
Data delay found: 31
11:14:59:setup_element:INFO: Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
11:14:59:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
11:14:59:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
11:14:59:setup_element:INFO: Eye window for uplink 28: ______________XXXXXXX___________________
Data delay found: 37
11:14:59:setup_element:INFO: Eye window for uplink 29: _________________XXXXXXX________________
Data delay found: 0
11:14:59:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
11:14:59:setup_element:INFO: Eye window for uplink 31: _________________XXXXXXX________________
Data delay found: 0
11:14:59:setup_element:INFO: Setting the data phase to 19 for uplink 16
11:14:59:setup_element:INFO: Setting the data phase to 17 for uplink 17
11:14:59:setup_element:INFO: Setting the data phase to 16 for uplink 18
11:14:59:setup_element:INFO: Setting the data phase to 14 for uplink 19
11:14:59:setup_element:INFO: Setting the data phase to 20 for uplink 20
11:14:59:setup_element:INFO: Setting the data phase to 18 for uplink 21
11:14:59:setup_element:INFO: Setting the data phase to 19 for uplink 22
11:14:59:setup_element:INFO: Setting the data phase to 20 for uplink 23
11:14:59:setup_element:INFO: Setting the data phase to 31 for uplink 24
11:14:59:setup_element:INFO: Setting the data phase to 33 for uplink 25
11:14:59:setup_element:INFO: Setting the data phase to 32 for uplink 26
11:14:59:setup_element:INFO: Setting the data phase to 35 for uplink 27
11:14:59:setup_element:INFO: Setting the data phase to 37 for uplink 28
11:14:59:setup_element:INFO: Setting the data phase to 0 for uplink 29
11:14:59:setup_element:INFO: Setting the data phase to 39 for uplink 30
11:14:59:setup_element:INFO: Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
11:14:59:setup_element:INFO: Beginning SMX ASICs map scan
11:14:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:14:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:14:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:14:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:14:59:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:14:59:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:14:59:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:14:59:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:14:59:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:14:59:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:14:59:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:15:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:15:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:15:00:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:15:00:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:15:00:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:15:00:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:15:00:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:15:00:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:15:00:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:15:00:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:15:02:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 69
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXX____
Uplink 17: _____________________________________________________________________XXXXXXX____
Uplink 18: ___________________________________________________________________XXXXXXXXX____
Uplink 19: ___________________________________________________________________XXXXXXXXX____
Uplink 20: ________________________________________________________________________________
Uplink 21: ________________________________________________________________________________
Uplink 22: _____________________________________________________________________XXXXXXXX___
Uplink 23: _____________________________________________________________________XXXXXXXX___
Uplink 24: ____________________________________________________________________XXXXXXXX____
Uplink 25: ____________________________________________________________________XXXXXXXX____
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 17:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 18:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 19:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 20:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 21:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 22:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 23:
Optimal Phase: 20
Window Length: 29
Eye Window: XXXXXX_____________________________XXXXX
Uplink 24:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 25:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 26:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 27:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 28:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXXXX___________________
Uplink 29:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
Uplink 30:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 31:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
==============================================OOO==============================================
11:15:02:setup_element:INFO: Performing Elink synchronization
11:15:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:15:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:15:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:15:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
11:15:02:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:15:02:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:15:02:febtest:INFO: Init all SMX (CSA): 30
11:15:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:15:17:febtest:INFO: 23-00 | XA-000-09-004-006-010-022-14 | 18.7 | 1189.2
11:15:18:febtest:INFO: 30-01 | XA-000-09-004-006-012-024-11 | 12.4 | 1206.9
11:15:18:febtest:INFO: 21-02 | XA-000-09-004-006-011-022-03 | 25.1 | 1165.6
11:15:18:febtest:INFO: 28-03 | XA-000-09-004-006-010-023-14 | 31.4 | 1141.9
11:15:18:febtest:INFO: 19-04 | XA-000-09-004-006-011-021-03 | 31.4 | 1147.8
11:15:18:febtest:INFO: 26-05 | XA-000-09-004-006-011-023-03 | 37.7 | 1118.1
11:15:19:febtest:INFO: 17-06 | XA-000-09-004-006-010-021-14 | 34.6 | 1147.8
11:15:19:febtest:INFO: 24-07 | XA-000-09-004-006-012-023-11 | 25.1 | 1159.7
11:15:20:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:15:22:ST3_smx:INFO: chip: 23-0 21.902970 C 1200.969315 mV
11:15:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:15:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:15:22:ST3_smx:INFO: Electrons
11:15:22:ST3_smx:INFO: # loops 0
11:15:23:ST3_smx:INFO: # loops 1
11:15:25:ST3_smx:INFO: # loops 2
11:15:27:ST3_smx:INFO: # loops 3
11:15:28:ST3_smx:INFO: # loops 4
11:15:30:ST3_smx:INFO: Total # of broken channels: 0
11:15:30:ST3_smx:INFO: List of broken channels: []
11:15:30:ST3_smx:INFO: Total # of broken channels: 0
11:15:30:ST3_smx:INFO: List of broken channels: []
11:15:32:ST3_smx:INFO: chip: 30-1 12.438562 C 1218.600960 mV
11:15:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:15:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:15:32:ST3_smx:INFO: Electrons
11:15:32:ST3_smx:INFO: # loops 0
11:15:34:ST3_smx:INFO: # loops 1
11:15:35:ST3_smx:INFO: # loops 2
11:15:37:ST3_smx:INFO: # loops 3
11:15:39:ST3_smx:INFO: # loops 4
11:15:41:ST3_smx:INFO: Total # of broken channels: 0
11:15:41:ST3_smx:INFO: List of broken channels: []
11:15:41:ST3_smx:INFO: Total # of broken channels: 0
11:15:41:ST3_smx:INFO: List of broken channels: []
11:15:42:ST3_smx:INFO: chip: 21-2 25.062742 C 1177.390875 mV
11:15:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:15:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:15:42:ST3_smx:INFO: Electrons
11:15:42:ST3_smx:INFO: # loops 0
11:15:44:ST3_smx:INFO: # loops 1
11:15:46:ST3_smx:INFO: # loops 2
11:15:47:ST3_smx:INFO: # loops 3
11:15:49:ST3_smx:INFO: # loops 4
11:15:51:ST3_smx:INFO: Total # of broken channels: 0
11:15:51:ST3_smx:INFO: List of broken channels: []
11:15:51:ST3_smx:INFO: Total # of broken channels: 0
11:15:51:ST3_smx:INFO: List of broken channels: []
11:15:52:ST3_smx:INFO: chip: 28-3 31.389742 C 1153.732915 mV
11:15:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:15:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:15:52:ST3_smx:INFO: Electrons
11:15:52:ST3_smx:INFO: # loops 0
11:15:54:ST3_smx:INFO: # loops 1
11:15:56:ST3_smx:INFO: # loops 2
11:15:57:ST3_smx:INFO: # loops 3
11:15:59:ST3_smx:INFO: # loops 4
11:16:01:ST3_smx:INFO: Total # of broken channels: 0
11:16:01:ST3_smx:INFO: List of broken channels: []
11:16:01:ST3_smx:INFO: Total # of broken channels: 0
11:16:01:ST3_smx:INFO: List of broken channels: []
11:16:02:ST3_smx:INFO: chip: 19-4 31.389742 C 1153.732915 mV
11:16:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:02:ST3_smx:INFO: Electrons
11:16:02:ST3_smx:INFO: # loops 0
11:16:04:ST3_smx:INFO: # loops 1
11:16:06:ST3_smx:INFO: # loops 2
11:16:07:ST3_smx:INFO: # loops 3
11:16:09:ST3_smx:INFO: # loops 4
11:16:11:ST3_smx:INFO: Total # of broken channels: 0
11:16:11:ST3_smx:INFO: List of broken channels: []
11:16:11:ST3_smx:INFO: Total # of broken channels: 14
11:16:11:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 12, 14, 15]
11:16:12:ST3_smx:INFO: chip: 26-5 37.726682 C 1129.995435 mV
11:16:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:13:ST3_smx:INFO: Electrons
11:16:13:ST3_smx:INFO: # loops 0
11:16:14:ST3_smx:INFO: # loops 1
11:16:16:ST3_smx:INFO: # loops 2
11:16:18:ST3_smx:INFO: # loops 3
11:16:19:ST3_smx:INFO: # loops 4
11:16:21:ST3_smx:INFO: Total # of broken channels: 0
11:16:21:ST3_smx:INFO: List of broken channels: []
11:16:21:ST3_smx:INFO: Total # of broken channels: 0
11:16:21:ST3_smx:INFO: List of broken channels: []
11:16:23:ST3_smx:INFO: chip: 17-6 34.556970 C 1153.732915 mV
11:16:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:23:ST3_smx:INFO: Electrons
11:16:23:ST3_smx:INFO: # loops 0
11:16:24:ST3_smx:INFO: # loops 1
11:16:26:ST3_smx:INFO: # loops 2
11:16:28:ST3_smx:INFO: # loops 3
11:16:30:ST3_smx:INFO: # loops 4
11:16:31:ST3_smx:INFO: Total # of broken channels: 63
11:16:31:ST3_smx:INFO: List of broken channels: [7, 9, 11, 16, 18, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 127]
11:16:31:ST3_smx:INFO: Total # of broken channels: 87
11:16:31:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 13, 16, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 31, 33, 34, 35, 36, 37, 39, 41, 42, 43, 45, 47, 48, 49, 51, 52, 53, 55, 57, 59, 61, 62, 63, 65, 67, 69, 71, 72, 73, 74, 75, 77, 79, 80, 81, 83, 85, 87, 89, 90, 91, 93, 94, 95, 96, 97, 99, 100, 101, 103, 105, 107, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 121, 122, 123, 125, 127]
11:16:33:ST3_smx:INFO: chip: 24-7 28.225000 C 1165.571835 mV
11:16:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:33:ST3_smx:INFO: Electrons
11:16:33:ST3_smx:INFO: # loops 0
11:16:35:ST3_smx:INFO: # loops 1
11:16:36:ST3_smx:INFO: # loops 2
11:16:38:ST3_smx:INFO: # loops 3
11:16:40:ST3_smx:INFO: # loops 4
11:16:41:ST3_smx:INFO: Total # of broken channels: 0
11:16:41:ST3_smx:INFO: List of broken channels: []
11:16:41:ST3_smx:INFO: Total # of broken channels: 0
11:16:41:ST3_smx:INFO: List of broken channels: []
11:16:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:16:42:febtest:INFO: 23-00 | XA-000-09-004-006-010-022-14 | 21.9 | 1218.6
11:16:42:febtest:INFO: 30-01 | XA-000-09-004-006-012-024-11 | 12.4 | 1236.2
11:16:42:febtest:INFO: 21-02 | XA-000-09-004-006-011-022-03 | 28.2 | 1195.1
11:16:43:febtest:INFO: 28-03 | XA-000-09-004-006-010-023-14 | 31.4 | 1171.5
11:16:43:febtest:INFO: 19-04 | XA-000-09-004-006-011-021-03 | 34.6 | 1171.5
11:16:43:febtest:INFO: 26-05 | XA-000-09-004-006-011-023-03 | 40.9 | 1147.8
11:16:43:febtest:INFO: 17-06 | XA-000-09-004-006-010-021-14 | 37.7 | 1171.5
11:16:43:febtest:INFO: 24-07 | XA-000-09-004-006-012-023-11 | 28.2 | 1189.2
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_01_24-11_14_42
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2299| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 30394 | SIZE: 62x124 | GRADE: B
MODULE_NAME: M4UR5B2011332B2
LADDER_NAME: L4UR501133
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.3740', '1.848', '2.4970']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0760', '1.850', '2.5480']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9900', '1.850', '0.5254']