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FEB_2300 17.12.24 10:28:35
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10:28:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:28:35:ST3_Shared:INFO: FEB-Microcable
10:28:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:28:43:ST3_Shared:INFO: MUCH mode selected
10:28:43:febtest:INFO: Testing FEB with SN 2300
10:28:45:smx_tester:INFO: Scanning setup
10:28:45:elinks:INFO: Disabling clock on downlink 0
10:28:45:elinks:INFO: Disabling clock on downlink 1
10:28:45:elinks:INFO: Disabling clock on downlink 2
10:28:45:elinks:INFO: Disabling clock on downlink 3
10:28:45:elinks:INFO: Disabling clock on downlink 4
10:28:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:28:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:28:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:28:45:elinks:INFO: Disabling clock on downlink 0
10:28:45:elinks:INFO: Disabling clock on downlink 1
10:28:45:elinks:INFO: Disabling clock on downlink 2
10:28:45:elinks:INFO: Disabling clock on downlink 3
10:28:45:elinks:INFO: Disabling clock on downlink 4
10:28:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:28:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:28:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:28:45:elinks:INFO: Disabling clock on downlink 0
10:28:45:elinks:INFO: Disabling clock on downlink 1
10:28:45:elinks:INFO: Disabling clock on downlink 2
10:28:45:elinks:INFO: Disabling clock on downlink 3
10:28:45:elinks:INFO: Disabling clock on downlink 4
10:28:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:28:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:28:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:28:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:28:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:28:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:28:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:28:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:28:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:28:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:28:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:28:45:elinks:INFO: Disabling clock on downlink 0
10:28:45:elinks:INFO: Disabling clock on downlink 1
10:28:45:elinks:INFO: Disabling clock on downlink 2
10:28:45:elinks:INFO: Disabling clock on downlink 3
10:28:45:elinks:INFO: Disabling clock on downlink 4
10:28:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:28:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:28:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:28:45:elinks:INFO: Disabling clock on downlink 0
10:28:45:elinks:INFO: Disabling clock on downlink 1
10:28:45:elinks:INFO: Disabling clock on downlink 2
10:28:45:elinks:INFO: Disabling clock on downlink 3
10:28:45:elinks:INFO: Disabling clock on downlink 4
10:28:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:28:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:28:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:28:45:setup_element:INFO: Scanning clock phase
10:28:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:28:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:28:45:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:28:45:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:28:45:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:28:45:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:28:45:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:28:45:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:28:45:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:28:45:setup_element:INFO: Eye window for uplink 30: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:28:45:setup_element:INFO: Eye window for uplink 31: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:28:45:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
10:28:45:setup_element:INFO: Scanning data phases
10:28:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:28:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:28:51:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:28:51:setup_element:INFO: Eye window for uplink 24: ____________XXXXX_______________________
Data delay found: 34
10:28:51:setup_element:INFO: Eye window for uplink 25: ______________XXXXX_____________________
Data delay found: 36
10:28:51:setup_element:INFO: Eye window for uplink 26: _________XXXXXX_________________________
Data delay found: 31
10:28:51:setup_element:INFO: Eye window for uplink 27: ____________XXXXXXX_____________________
Data delay found: 35
10:28:51:setup_element:INFO: Eye window for uplink 28: _________________XXXX___________________
Data delay found: 38
10:28:51:setup_element:INFO: Eye window for uplink 29: ___________________XXXXXX_______________
Data delay found: 1
10:28:51:setup_element:INFO: Eye window for uplink 30: __________________XXXXX_________________
Data delay found: 0
10:28:51:setup_element:INFO: Eye window for uplink 31: __________________XXXXXX________________
Data delay found: 0
10:28:51:setup_element:INFO: Setting the data phase to 34 for uplink 24
10:28:51:setup_element:INFO: Setting the data phase to 36 for uplink 25
10:28:51:setup_element:INFO: Setting the data phase to 31 for uplink 26
10:28:51:setup_element:INFO: Setting the data phase to 35 for uplink 27
10:28:51:setup_element:INFO: Setting the data phase to 38 for uplink 28
10:28:51:setup_element:INFO: Setting the data phase to 1 for uplink 29
10:28:51:setup_element:INFO: Setting the data phase to 0 for uplink 30
10:28:51:setup_element:INFO: Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
10:28:51:setup_element:INFO: Beginning SMX ASICs map scan
10:28:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:28:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:28:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:28:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:28:51:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:28:51:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:28:51:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:28:51:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:28:51:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:28:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:28:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:28:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:28:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:28:53:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXXXX__
Uplink 25: _____________________________________________________________________XXXXXXXXX__
Uplink 26: ____________________________________________________________________XXXXXXXXX___
Uplink 27: ____________________________________________________________________XXXXXXXXX___
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: ____________________________________________________________________XXXXXXXXX___
Uplink 31: ____________________________________________________________________XXXXXXXXX___
Data phase characteristics:
Uplink 24:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 25:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 26:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 27:
Optimal Phase: 35
Window Length: 33
Eye Window: ____________XXXXXXX_____________________
Uplink 28:
Optimal Phase: 38
Window Length: 36
Eye Window: _________________XXXX___________________
Uplink 29:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 30:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 31:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
==============================================OOO==============================================
10:28:53:setup_element:INFO: Performing Elink synchronization
10:28:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:28:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:28:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:28:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:28:53:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:28:53:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
10:28:54:febtest:INFO: Init all SMX (CSA): 30
10:29:02:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:29:02:febtest:INFO: 30-01 | XA-000-09-004-002-017-016-11 | 25.1 | 1153.7
10:29:02:febtest:INFO: 28-03 | XA-000-09-004-002-016-008-01 | 37.7 | 1112.1
10:29:02:febtest:INFO: 26-05 | XA-000-09-004-002-017-012-12 | 18.7 | 1165.6
10:29:02:febtest:INFO: 24-07 | XA-000-09-004-002-016-007-01 | 34.6 | 1118.1
10:29:03:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:29:05:ST3_smx:INFO: chip: 30-1 25.062742 C 1165.571835 mV
10:29:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:05:ST3_smx:INFO: Electrons
10:29:05:ST3_smx:INFO: # loops 0
10:29:07:ST3_smx:INFO: # loops 1
10:29:09:ST3_smx:INFO: # loops 2
10:29:10:ST3_smx:INFO: Total # of broken channels: 0
10:29:10:ST3_smx:INFO: List of broken channels: []
10:29:10:ST3_smx:INFO: Total # of broken channels: 35
10:29:10:ST3_smx:INFO: List of broken channels: [0, 4, 6, 8, 10, 12, 14, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 56, 58, 62, 64, 70, 72, 74, 78, 80, 82, 90]
10:29:12:ST3_smx:INFO: chip: 28-3 37.726682 C 1118.096875 mV
10:29:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:12:ST3_smx:INFO: Electrons
10:29:12:ST3_smx:INFO: # loops 0
10:29:14:ST3_smx:INFO: # loops 1
10:29:15:ST3_smx:INFO: # loops 2
10:29:17:ST3_smx:INFO: Total # of broken channels: 8
10:29:17:ST3_smx:INFO: List of broken channels: [30, 32, 52, 54, 58, 60, 96, 120]
10:29:17:ST3_smx:INFO: Total # of broken channels: 34
10:29:17:ST3_smx:INFO: List of broken channels: [6, 8, 10, 24, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 76, 80, 84, 88, 90, 92, 96, 100, 118]
10:29:19:ST3_smx:INFO: chip: 26-5 18.745682 C 1177.390875 mV
10:29:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:19:ST3_smx:INFO: Electrons
10:29:19:ST3_smx:INFO: # loops 0
10:29:20:ST3_smx:INFO: # loops 1
10:29:22:ST3_smx:INFO: # loops 2
10:29:24:ST3_smx:INFO: Total # of broken channels: 0
10:29:24:ST3_smx:INFO: List of broken channels: []
10:29:24:ST3_smx:INFO: Total # of broken channels: 45
10:29:24:ST3_smx:INFO: List of broken channels: [4, 6, 8, 10, 12, 16, 18, 20, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 78, 80, 82, 84, 88, 90, 92, 94, 100, 102, 106]
10:29:25:ST3_smx:INFO: chip: 24-7 37.726682 C 1129.995435 mV
10:29:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:25:ST3_smx:INFO: Electrons
10:29:25:ST3_smx:INFO: # loops 0
10:29:27:ST3_smx:INFO: # loops 1
10:29:29:ST3_smx:INFO: # loops 2
10:29:30:ST3_smx:INFO: Total # of broken channels: 0
10:29:30:ST3_smx:INFO: List of broken channels: []
10:29:30:ST3_smx:INFO: Total # of broken channels: 50
10:29:30:ST3_smx:INFO: List of broken channels: [1, 2, 4, 6, 8, 10, 12, 14, 16, 18, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 72, 74, 76, 78, 80, 84, 86, 88, 90, 94, 98, 102, 106, 108, 112, 122]
10:29:30:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:29:31:febtest:INFO: 30-01 | XA-000-09-004-002-017-016-11 | 25.1 | 1189.2
10:29:31:febtest:INFO: 28-03 | XA-000-09-004-002-016-008-01 | 37.7 | 1141.9
10:29:31:febtest:INFO: 26-05 | XA-000-09-004-002-017-012-12 | 21.9 | 1195.1
10:29:31:febtest:INFO: 24-07 | XA-000-09-004-002-016-007-01 | 37.7 | 1147.8
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_12_17-10_28_35
OPERATOR : Robert V.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2300| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : MUCH
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0320', '1.849', '0.4943']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9963', '1.850', '1.2690']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9835', '1.850', '0.2595']