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FEB_2300 20.01.25 08:52:14
Info
08:52:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:52:14:ST3_Shared:INFO: FEB-Sensor
08:52:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:52:18:ST3_Shared:INFO: STS mode selected
08:52:32:ST3_ModuleSelector:DEBUG: M4UR1B3011313B2
08:52:32:ST3_ModuleSelector:DEBUG:
08:52:32:ST3_ModuleSelector:DEBUG:
08:52:32:ST3_ModuleSelector:DEBUG:
08:52:32:ST3_ModuleSelector:DEBUG:
08:52:32:ST3_ModuleSelector:DEBUG: M4UR1B3011313B2
08:52:32:ST3_ModuleSelector:DEBUG:
08:52:32:ST3_ModuleSelector:DEBUG:
08:52:32:ST3_ModuleSelector:DEBUG:
08:52:32:ST3_ModuleSelector:DEBUG:
08:52:49:ST3_ModuleSelector:INFO: New Sensor ID: 07343
08:52:49:ST3_ModuleSelector:DEBUG: M4UR1B3011313B2
08:52:49:ST3_ModuleSelector:DEBUG:
08:52:49:ST3_ModuleSelector:DEBUG: 07343
08:52:49:ST3_ModuleSelector:DEBUG: 62x62
08:52:49:ST3_ModuleSelector:DEBUG:
08:52:55:ST3_ModuleSelector:INFO: M4UR1B3011313B2
08:52:55:ST3_ModuleSelector:INFO: 07343
08:52:55:febtest:INFO: Testing FEB with SN 2300
08:52:57:smx_tester:INFO: Scanning setup
08:52:57:elinks:INFO: Disabling clock on downlink 0
08:52:57:elinks:INFO: Disabling clock on downlink 1
08:52:57:elinks:INFO: Disabling clock on downlink 2
08:52:57:elinks:INFO: Disabling clock on downlink 3
08:52:57:elinks:INFO: Disabling clock on downlink 4
08:52:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:52:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:52:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:52:57:elinks:INFO: Disabling clock on downlink 0
08:52:57:elinks:INFO: Disabling clock on downlink 1
08:52:57:elinks:INFO: Disabling clock on downlink 2
08:52:57:elinks:INFO: Disabling clock on downlink 3
08:52:57:elinks:INFO: Disabling clock on downlink 4
08:52:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:52:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:52:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:52:57:elinks:INFO: Disabling clock on downlink 0
08:52:57:elinks:INFO: Disabling clock on downlink 1
08:52:57:elinks:INFO: Disabling clock on downlink 2
08:52:57:elinks:INFO: Disabling clock on downlink 3
08:52:57:elinks:INFO: Disabling clock on downlink 4
08:52:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:52:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:52:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:52:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:52:58:elinks:INFO: Disabling clock on downlink 0
08:52:58:elinks:INFO: Disabling clock on downlink 1
08:52:58:elinks:INFO: Disabling clock on downlink 2
08:52:58:elinks:INFO: Disabling clock on downlink 3
08:52:58:elinks:INFO: Disabling clock on downlink 4
08:52:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:52:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:52:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:52:58:elinks:INFO: Disabling clock on downlink 0
08:52:58:elinks:INFO: Disabling clock on downlink 1
08:52:58:elinks:INFO: Disabling clock on downlink 2
08:52:58:elinks:INFO: Disabling clock on downlink 3
08:52:58:elinks:INFO: Disabling clock on downlink 4
08:52:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:52:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:52:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:52:58:setup_element:INFO: Scanning clock phase
08:52:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:52:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:52:58:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:52:58:setup_element:INFO: Eye window for uplink 16: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
08:52:58:setup_element:INFO: Eye window for uplink 17: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
08:52:58:setup_element:INFO: Eye window for uplink 18: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:52:58:setup_element:INFO: Eye window for uplink 19: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:52:58:setup_element:INFO: Eye window for uplink 20: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
08:52:58:setup_element:INFO: Eye window for uplink 21: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
08:52:58:setup_element:INFO: Eye window for uplink 22: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
08:52:58:setup_element:INFO: Eye window for uplink 23: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
08:52:58:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:52:58:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:52:58:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
08:52:58:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
08:52:58:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
08:52:58:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
08:52:58:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
08:52:58:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
08:52:58:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 2
==============================================OOO==============================================
08:52:58:setup_element:INFO: Scanning data phases
08:52:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:52:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:53:04:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:53:04:setup_element:INFO: Eye window for uplink 16: XXX______________________XXXXXXXXXXXXXXX
Data delay found: 13
08:53:04:setup_element:INFO: Eye window for uplink 17: XX_______________________XXXXXXXXXXXXXXX
Data delay found: 13
08:53:04:setup_element:INFO: Eye window for uplink 18: XXXXXXX_____________________________XXXX
Data delay found: 21
08:53:04:setup_element:INFO: Eye window for uplink 19: XXXXX______________________________XXXXX
Data delay found: 19
08:53:04:setup_element:INFO: Eye window for uplink 20: X_X________________________________XXXXX
Data delay found: 18
08:53:04:setup_element:INFO: Eye window for uplink 21: X_______________________________XXXXXXX_
Data delay found: 16
08:53:04:setup_element:INFO: Eye window for uplink 22: XXXXX_______________________________XXXX
Data delay found: 20
08:53:04:setup_element:INFO: Eye window for uplink 23: XXXXXXXX____________________________XXXX
Data delay found: 21
08:53:04:setup_element:INFO: Eye window for uplink 24: ______XXXXXXXXXXXX______________________
Data delay found: 31
08:53:04:setup_element:INFO: Eye window for uplink 25: _______XXXXXXXXXXXXX____________________
Data delay found: 33
08:53:04:setup_element:INFO: Eye window for uplink 26: _____XXXXXXXXXXX________________________
Data delay found: 30
08:53:04:setup_element:INFO: Eye window for uplink 27: __________XXXXXXXXXX____________________
Data delay found: 34
08:53:04:setup_element:INFO: Eye window for uplink 28: _______________XXXXXXXX_________________
Data delay found: 38
08:53:04:setup_element:INFO: Eye window for uplink 29: _________________XXXXXXXXX______________
Data delay found: 1
08:53:04:setup_element:INFO: Eye window for uplink 30: _________________XXXXXXXX_______________
Data delay found: 0
08:53:04:setup_element:INFO: Eye window for uplink 31: _________________XXXXXXXXX______________
Data delay found: 1
08:53:04:setup_element:INFO: Setting the data phase to 13 for uplink 16
08:53:04:setup_element:INFO: Setting the data phase to 13 for uplink 17
08:53:04:setup_element:INFO: Setting the data phase to 21 for uplink 18
08:53:04:setup_element:INFO: Setting the data phase to 19 for uplink 19
08:53:04:setup_element:INFO: Setting the data phase to 18 for uplink 20
08:53:04:setup_element:INFO: Setting the data phase to 16 for uplink 21
08:53:04:setup_element:INFO: Setting the data phase to 20 for uplink 22
08:53:04:setup_element:INFO: Setting the data phase to 21 for uplink 23
08:53:04:setup_element:INFO: Setting the data phase to 31 for uplink 24
08:53:04:setup_element:INFO: Setting the data phase to 33 for uplink 25
08:53:04:setup_element:INFO: Setting the data phase to 30 for uplink 26
08:53:04:setup_element:INFO: Setting the data phase to 34 for uplink 27
08:53:04:setup_element:INFO: Setting the data phase to 38 for uplink 28
08:53:04:setup_element:INFO: Setting the data phase to 1 for uplink 29
08:53:04:setup_element:INFO: Setting the data phase to 0 for uplink 30
08:53:04:setup_element:INFO: Setting the data phase to 1 for uplink 31
==============================================OOO==============================================
08:53:04:setup_element:INFO: Beginning SMX ASICs map scan
08:53:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:53:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:53:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:53:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:53:04:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:53:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:53:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:53:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:53:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:53:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:53:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:53:05:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:53:05:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:53:05:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:53:05:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:53:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:53:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:53:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:53:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:53:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:53:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:53:07:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 30
Window Length: 70
Eye Windows:
Uplink 16: __________________________________________________________________XXXXXXXXX_____
Uplink 17: __________________________________________________________________XXXXXXXXX_____
Uplink 18: ____________________________________________________________________XXXXXXXX____
Uplink 19: ____________________________________________________________________XXXXXXXX____
Uplink 20: __________________________________________________________________XXXXXXXXX_____
Uplink 21: __________________________________________________________________XXXXXXXXX_____
Uplink 22: ___________________________________________________________________XXXXXXXXX____
Uplink 23: ___________________________________________________________________XXXXXXXXX____
Uplink 24: ____________________________________________________________________XXXXXXXX____
Uplink 25: ____________________________________________________________________XXXXXXXX____
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: ________________________________________________________________________________
Uplink 29: ________________________________________________________________________________
Uplink 30: ________________________________________________________________________________
Uplink 31: ________________________________________________________________________________
Data phase characteristics:
Uplink 16:
Optimal Phase: 13
Window Length: 22
Eye Window: XXX______________________XXXXXXXXXXXXXXX
Uplink 17:
Optimal Phase: 13
Window Length: 23
Eye Window: XX_______________________XXXXXXXXXXXXXXX
Uplink 18:
Optimal Phase: 21
Window Length: 29
Eye Window: XXXXXXX_____________________________XXXX
Uplink 19:
Optimal Phase: 19
Window Length: 30
Eye Window: XXXXX______________________________XXXXX
Uplink 20:
Optimal Phase: 18
Window Length: 32
Eye Window: X_X________________________________XXXXX
Uplink 21:
Optimal Phase: 16
Window Length: 31
Eye Window: X_______________________________XXXXXXX_
Uplink 22:
Optimal Phase: 20
Window Length: 31
Eye Window: XXXXX_______________________________XXXX
Uplink 23:
Optimal Phase: 21
Window Length: 28
Eye Window: XXXXXXXX____________________________XXXX
Uplink 24:
Optimal Phase: 31
Window Length: 28
Eye Window: ______XXXXXXXXXXXX______________________
Uplink 25:
Optimal Phase: 33
Window Length: 27
Eye Window: _______XXXXXXXXXXXXX____________________
Uplink 26:
Optimal Phase: 30
Window Length: 29
Eye Window: _____XXXXXXXXXXX________________________
Uplink 27:
Optimal Phase: 34
Window Length: 30
Eye Window: __________XXXXXXXXXX____________________
Uplink 28:
Optimal Phase: 38
Window Length: 32
Eye Window: _______________XXXXXXXX_________________
Uplink 29:
Optimal Phase: 1
Window Length: 31
Eye Window: _________________XXXXXXXXX______________
Uplink 30:
Optimal Phase: 0
Window Length: 32
Eye Window: _________________XXXXXXXX_______________
Uplink 31:
Optimal Phase: 1
Window Length: 31
Eye Window: _________________XXXXXXXXX______________
==============================================OOO==============================================
08:53:07:setup_element:INFO: Performing Elink synchronization
08:53:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:53:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:53:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:53:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
08:53:07:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:53:07:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:53:08:febtest:INFO: Init all SMX (CSA): 30
08:53:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:53:21:febtest:INFO: 23-00 | XA-000-09-004-002-016-010-01 | 25.1 | 1183.3
08:53:22:febtest:INFO: 30-01 | XA-000-09-004-002-017-016-11 | 34.6 | 1153.7
08:53:22:febtest:INFO: 21-02 | XA-000-09-004-006-013-024-06 | 37.7 | 1141.9
08:53:22:febtest:INFO: 28-03 | XA-000-09-004-002-016-008-01 | 47.3 | 1106.2
08:53:22:febtest:INFO: 19-04 | XA-000-09-004-002-017-011-12 | 50.4 | 1094.2
08:53:23:febtest:INFO: 26-05 | XA-000-09-004-002-017-012-12 | 25.1 | 1171.5
08:53:23:febtest:INFO: 17-06 | XA-000-09-004-002-016-012-01 | 18.7 | 1206.9
08:53:23:febtest:INFO: 24-07 | XA-000-09-004-002-016-007-01 | 40.9 | 1112.1
08:53:24:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:53:26:ST3_smx:INFO: chip: 23-0 25.062742 C 1195.082160 mV
08:53:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:26:ST3_smx:INFO: Electrons
08:53:26:ST3_smx:INFO: # loops 0
08:53:28:ST3_smx:INFO: # loops 1
08:53:29:ST3_smx:INFO: # loops 2
08:53:31:ST3_smx:INFO: # loops 3
08:53:32:ST3_smx:INFO: # loops 4
08:53:34:ST3_smx:INFO: Total # of broken channels: 0
08:53:34:ST3_smx:INFO: List of broken channels: []
08:53:34:ST3_smx:INFO: Total # of broken channels: 0
08:53:34:ST3_smx:INFO: List of broken channels: []
08:53:36:ST3_smx:INFO: chip: 30-1 34.556970 C 1165.571835 mV
08:53:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:36:ST3_smx:INFO: Electrons
08:53:36:ST3_smx:INFO: # loops 0
08:53:37:ST3_smx:INFO: # loops 1
08:53:39:ST3_smx:INFO: # loops 2
08:53:40:ST3_smx:INFO: # loops 3
08:53:42:ST3_smx:INFO: # loops 4
08:53:44:ST3_smx:INFO: Total # of broken channels: 0
08:53:44:ST3_smx:INFO: List of broken channels: []
08:53:44:ST3_smx:INFO: Total # of broken channels: 0
08:53:44:ST3_smx:INFO: List of broken channels: []
08:53:45:ST3_smx:INFO: chip: 21-2 40.898880 C 1147.806000 mV
08:53:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:45:ST3_smx:INFO: Electrons
08:53:45:ST3_smx:INFO: # loops 0
08:53:47:ST3_smx:INFO: # loops 1
08:53:48:ST3_smx:INFO: # loops 2
08:53:50:ST3_smx:INFO: # loops 3
08:53:52:ST3_smx:INFO: # loops 4
08:53:53:ST3_smx:INFO: Total # of broken channels: 0
08:53:53:ST3_smx:INFO: List of broken channels: []
08:53:53:ST3_smx:INFO: Total # of broken channels: 0
08:53:53:ST3_smx:INFO: List of broken channels: []
08:53:55:ST3_smx:INFO: chip: 28-3 47.250730 C 1118.096875 mV
08:53:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:55:ST3_smx:INFO: Electrons
08:53:55:ST3_smx:INFO: # loops 0
08:53:56:ST3_smx:INFO: # loops 1
08:53:58:ST3_smx:INFO: # loops 2
08:53:59:ST3_smx:INFO: # loops 3
08:54:01:ST3_smx:INFO: # loops 4
08:54:02:ST3_smx:INFO: Total # of broken channels: 1
08:54:02:ST3_smx:INFO: List of broken channels: [54]
08:54:02:ST3_smx:INFO: Total # of broken channels: 4
08:54:02:ST3_smx:INFO: List of broken channels: [52, 54, 58, 96]
08:54:04:ST3_smx:INFO: chip: 19-4 50.430383 C 1100.211760 mV
08:54:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:04:ST3_smx:INFO: Electrons
08:54:04:ST3_smx:INFO: # loops 0
08:54:06:ST3_smx:INFO: # loops 1
08:54:07:ST3_smx:INFO: # loops 2
08:54:09:ST3_smx:INFO: # loops 3
08:54:10:ST3_smx:INFO: # loops 4
08:54:12:ST3_smx:INFO: Total # of broken channels: 0
08:54:12:ST3_smx:INFO: List of broken channels: []
08:54:12:ST3_smx:INFO: Total # of broken channels: 0
08:54:12:ST3_smx:INFO: List of broken channels: []
08:54:14:ST3_smx:INFO: chip: 26-5 28.225000 C 1183.292940 mV
08:54:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:14:ST3_smx:INFO: Electrons
08:54:14:ST3_smx:INFO: # loops 0
08:54:15:ST3_smx:INFO: # loops 1
08:54:17:ST3_smx:INFO: # loops 2
08:54:18:ST3_smx:INFO: # loops 3
08:54:20:ST3_smx:INFO: # loops 4
08:54:21:ST3_smx:INFO: Total # of broken channels: 0
08:54:21:ST3_smx:INFO: List of broken channels: []
08:54:21:ST3_smx:INFO: Total # of broken channels: 0
08:54:21:ST3_smx:INFO: List of broken channels: []
08:54:23:ST3_smx:INFO: chip: 17-6 21.902970 C 1212.728715 mV
08:54:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:23:ST3_smx:INFO: Electrons
08:54:23:ST3_smx:INFO: # loops 0
08:54:25:ST3_smx:INFO: # loops 1
08:54:27:ST3_smx:INFO: # loops 2
08:54:28:ST3_smx:INFO: # loops 3
08:54:30:ST3_smx:INFO: # loops 4
08:54:31:ST3_smx:INFO: Total # of broken channels: 0
08:54:31:ST3_smx:INFO: List of broken channels: []
08:54:31:ST3_smx:INFO: Total # of broken channels: 0
08:54:31:ST3_smx:INFO: List of broken channels: []
08:54:33:ST3_smx:INFO: chip: 24-7 44.073563 C 1118.096875 mV
08:54:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:33:ST3_smx:INFO: Electrons
08:54:33:ST3_smx:INFO: # loops 0
08:54:35:ST3_smx:INFO: # loops 1
08:54:36:ST3_smx:INFO: # loops 2
08:54:38:ST3_smx:INFO: # loops 3
08:54:39:ST3_smx:INFO: # loops 4
08:54:41:ST3_smx:INFO: Total # of broken channels: 0
08:54:41:ST3_smx:INFO: List of broken channels: []
08:54:41:ST3_smx:INFO: Total # of broken channels: 0
08:54:41:ST3_smx:INFO: List of broken channels: []
08:54:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:54:41:febtest:INFO: 23-00 | XA-000-09-004-002-016-010-01 | 31.4 | 1212.7
08:54:41:febtest:INFO: 30-01 | XA-000-09-004-002-017-016-11 | 37.7 | 1183.3
08:54:42:febtest:INFO: 21-02 | XA-000-09-004-006-013-024-06 | 44.1 | 1171.5
08:54:42:febtest:INFO: 28-03 | XA-000-09-004-002-016-008-01 | 50.4 | 1135.9
08:54:42:febtest:INFO: 19-04 | XA-000-09-004-002-017-011-12 | 53.6 | 1124.0
08:54:42:febtest:INFO: 26-05 | XA-000-09-004-002-017-012-12 | 28.2 | 1201.0
08:54:43:febtest:INFO: 17-06 | XA-000-09-004-002-016-012-01 | 21.9 | 1236.2
08:54:43:febtest:INFO: 24-07 | XA-000-09-004-002-016-007-01 | 44.1 | 1141.9
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_01_20-08_52_14
OPERATOR : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2300| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 07343 | SIZE: 62x62 | GRADE:
MODULE_NAME: M4UR1B3011313B2
LADDER_NAME:
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5040', '1.848', '1.5120']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0020', '1.850', '2.5450']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9610', '1.850', '0.5178']
08:54:58:ST3_Shared:INFO: Listo of operators:Oleksandr S.;