10:38:56:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:38:56:ST3_Shared:INFO:	                       FEB-Microcable                       
10:38:56:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:39:00:ST3_Shared:INFO:	STS mode selected
10:39:00:febtest:INFO:	Testing FEB with SN 2302
10:39:01:smx_tester:INFO:	Scanning setup
10:39:01:elinks:INFO:	Disabling clock on downlink 0
10:39:01:elinks:INFO:	Disabling clock on downlink 1
10:39:01:elinks:INFO:	Disabling clock on downlink 2
10:39:01:elinks:INFO:	Disabling clock on downlink 3
10:39:01:elinks:INFO:	Disabling clock on downlink 4
10:39:01:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:39:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:39:01:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:39:01:elinks:INFO:	Disabling clock on downlink 0
10:39:01:elinks:INFO:	Disabling clock on downlink 1
10:39:01:elinks:INFO:	Disabling clock on downlink 2
10:39:01:elinks:INFO:	Disabling clock on downlink 3
10:39:01:elinks:INFO:	Disabling clock on downlink 4
10:39:01:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:39:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:39:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:39:02:elinks:INFO:	Disabling clock on downlink 0
10:39:02:elinks:INFO:	Disabling clock on downlink 1
10:39:02:elinks:INFO:	Disabling clock on downlink 2
10:39:02:elinks:INFO:	Disabling clock on downlink 3
10:39:02:elinks:INFO:	Disabling clock on downlink 4
10:39:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:39:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:39:02:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
10:39:02:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
10:39:02:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
10:39:02:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
10:39:02:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
10:39:02:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
10:39:02:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
10:39:02:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
10:39:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:39:02:elinks:INFO:	Disabling clock on downlink 0
10:39:02:elinks:INFO:	Disabling clock on downlink 1
10:39:02:elinks:INFO:	Disabling clock on downlink 2
10:39:02:elinks:INFO:	Disabling clock on downlink 3
10:39:02:elinks:INFO:	Disabling clock on downlink 4
10:39:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:39:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:39:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:39:02:elinks:INFO:	Disabling clock on downlink 0
10:39:02:elinks:INFO:	Disabling clock on downlink 1
10:39:02:elinks:INFO:	Disabling clock on downlink 2
10:39:02:elinks:INFO:	Disabling clock on downlink 3
10:39:02:elinks:INFO:	Disabling clock on downlink 4
10:39:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:39:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:39:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:39:02:setup_element:INFO:	Scanning clock phase
10:39:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:39:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:39:02:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
10:39:02:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
10:39:02:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
10:39:02:setup_element:INFO:	Eye window for uplink 26: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:39:02:setup_element:INFO:	Eye window for uplink 27: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:39:02:setup_element:INFO:	Eye window for uplink 28: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
10:39:02:setup_element:INFO:	Eye window for uplink 29: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
10:39:02:setup_element:INFO:	Eye window for uplink 30: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
10:39:02:setup_element:INFO:	Eye window for uplink 31: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
10:39:02:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 2
==============================================OOO==============================================
10:39:02:setup_element:INFO:	Scanning data phases
10:39:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:39:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:39:08:setup_element:INFO:	Data phase scan results for group 0, downlink 2
10:39:08:setup_element:INFO:	Eye window for uplink 24: __________XXXXXX________________________
Data delay found: 32
10:39:08:setup_element:INFO:	Eye window for uplink 25: _____________XXXX_______________________
Data delay found: 34
10:39:08:setup_element:INFO:	Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
10:39:08:setup_element:INFO:	Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
10:39:08:setup_element:INFO:	Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
10:39:08:setup_element:INFO:	Eye window for uplink 29: _______________XXXXX____________________
Data delay found: 37
10:39:08:setup_element:INFO:	Eye window for uplink 30: ______________XXXXXX__________________XX
Data delay found: 28
10:39:08:setup_element:INFO:	Eye window for uplink 31: ______________XXXXXXX_________________XX
Data delay found: 29
10:39:08:setup_element:INFO:	Setting the data phase to 32 for uplink 24
10:39:08:setup_element:INFO:	Setting the data phase to 34 for uplink 25
10:39:08:setup_element:INFO:	Setting the data phase to 30 for uplink 26
10:39:08:setup_element:INFO:	Setting the data phase to 33 for uplink 27
10:39:08:setup_element:INFO:	Setting the data phase to 35 for uplink 28
10:39:08:setup_element:INFO:	Setting the data phase to 37 for uplink 29
10:39:08:setup_element:INFO:	Setting the data phase to 28 for uplink 30
10:39:08:setup_element:INFO:	Setting the data phase to 29 for uplink 31
==============================================OOO==============================================
10:39:08:setup_element:INFO:	Beginning SMX ASICs map scan
10:39:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:39:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:39:08:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:39:08:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:39:08:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:39:08:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:39:08:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:39:08:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:39:08:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:39:09:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:39:09:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:39:09:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:39:09:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:39:10:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 69
    Eye Windows:
      Uplink 24: ___________________________________________________________________XXXXXXXXX____
      Uplink 25: ___________________________________________________________________XXXXXXXXX____
      Uplink 26: __________________________________________________________________XXXXXXXX______
      Uplink 27: __________________________________________________________________XXXXXXXX______
      Uplink 28: __________________________________________________________________XXXXXXXXX_____
      Uplink 29: __________________________________________________________________XXXXXXXXX_____
      Uplink 30: _________________________________________________________________XXXXXXXXX______
      Uplink 31: _________________________________________________________________XXXXXXXXX______
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 25:
      Optimal Phase: 34
      Window Length: 36
      Eye Window: _____________XXXX_______________________
    Uplink 26:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 35
      Eye Window: _______________XXXXX____________________
    Uplink 30:
      Optimal Phase: 28
      Window Length: 18
      Eye Window: ______________XXXXXX__________________XX
    Uplink 31:
      Optimal Phase: 29
      Window Length: 17
      Eye Window: ______________XXXXXXX_________________XX

==============================================OOO==============================================
10:39:10:setup_element:INFO:	Performing Elink synchronization
10:39:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:39:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:39:10:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:39:10:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:39:10:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
10:39:10:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
10:39:11:febtest:INFO:	Init all SMX (CSA): 30
10:39:18:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:39:19:febtest:INFO:	30-01 | XA-000-09-004-002-013-012-10 |  15.6 | 1206.9
10:39:19:febtest:INFO:	28-03 | XA-000-08-002-003-007-184-04 |  18.7 | 1201.0
10:39:19:febtest:INFO:	26-05 | XA-000-09-004-002-013-018-13 |  15.6 | 1206.9
10:39:19:febtest:INFO:	24-07 | XA-000-09-004-002-012-022-00 |  31.4 | 1153.7
10:39:20:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:39:22:ST3_smx:INFO:	chip: 30-1 	 15.590880 C 	 1218.600960 mV
10:39:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:22:ST3_smx:INFO:		Electrons
10:39:22:ST3_smx:INFO:	# loops 0
10:39:24:ST3_smx:INFO:	# loops 1
10:39:26:ST3_smx:INFO:	# loops 2
10:39:27:ST3_smx:INFO:	Total # of broken channels: 0
10:39:27:ST3_smx:INFO:	List of broken channels: []
10:39:27:ST3_smx:INFO:	Total # of broken channels: 0
10:39:27:ST3_smx:INFO:	List of broken channels: []
10:39:29:ST3_smx:INFO:	chip: 28-3 	 18.745682 C 	 1206.851500 mV
10:39:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:29:ST3_smx:INFO:		Electrons
10:39:29:ST3_smx:INFO:	# loops 0
10:39:31:ST3_smx:INFO:	# loops 1
10:39:32:ST3_smx:INFO:	# loops 2
10:39:34:ST3_smx:INFO:	Total # of broken channels: 0
10:39:34:ST3_smx:INFO:	List of broken channels: []
10:39:34:ST3_smx:INFO:	Total # of broken channels: 0
10:39:34:ST3_smx:INFO:	List of broken channels: []
10:39:36:ST3_smx:INFO:	chip: 26-5 	 15.590880 C 	 1212.728715 mV
10:39:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:36:ST3_smx:INFO:		Electrons
10:39:36:ST3_smx:INFO:	# loops 0
10:39:37:ST3_smx:INFO:	# loops 1
10:39:39:ST3_smx:INFO:	# loops 2
10:39:40:ST3_smx:INFO:	Total # of broken channels: 1
10:39:40:ST3_smx:INFO:	List of broken channels: [80]
10:39:40:ST3_smx:INFO:	Total # of broken channels: 0
10:39:40:ST3_smx:INFO:	List of broken channels: []
10:39:42:ST3_smx:INFO:	chip: 24-7 	 31.389742 C 	 1165.571835 mV
10:39:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:39:42:ST3_smx:INFO:		Electrons
10:39:42:ST3_smx:INFO:	# loops 0
10:39:44:ST3_smx:INFO:	# loops 1
10:39:46:ST3_smx:INFO:	# loops 2
10:39:47:ST3_smx:INFO:	Total # of broken channels: 0
10:39:47:ST3_smx:INFO:	List of broken channels: []
10:39:47:ST3_smx:INFO:	Total # of broken channels: 0
10:39:47:ST3_smx:INFO:	List of broken channels: []
10:39:47:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:39:48:febtest:INFO:	30-01 | XA-000-09-004-002-013-012-10 |  15.6 | 1242.0
10:39:48:febtest:INFO:	28-03 | XA-000-08-002-003-007-184-04 |  18.7 | 1230.3
10:39:48:febtest:INFO:	26-05 | XA-000-09-004-002-013-018-13 |  18.7 | 1236.2
10:39:48:febtest:INFO:	24-07 | XA-000-09-004-002-012-022-00 |  34.6 | 1183.3
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_12_17-10_38_56
OPERATOR  : Robert V.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2302| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9550', '1.848', '1.1690']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9966', '1.849', '1.2730']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9909', '1.850', '0.2638']