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FEB_2303 29.11.24 13:18:55
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13:18:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:18:55:ST3_Shared:INFO: FEB-Microcable
13:18:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:18:56:febtest:INFO: Testing FEB with SN 2303
13:18:57:smx_tester:INFO: Scanning setup
13:18:57:elinks:INFO: Disabling clock on downlink 0
13:18:57:elinks:INFO: Disabling clock on downlink 1
13:18:57:elinks:INFO: Disabling clock on downlink 2
13:18:57:elinks:INFO: Disabling clock on downlink 3
13:18:57:elinks:INFO: Disabling clock on downlink 4
13:18:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:18:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:18:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:18:57:elinks:INFO: Disabling clock on downlink 0
13:18:57:elinks:INFO: Disabling clock on downlink 1
13:18:57:elinks:INFO: Disabling clock on downlink 2
13:18:57:elinks:INFO: Disabling clock on downlink 3
13:18:57:elinks:INFO: Disabling clock on downlink 4
13:18:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:18:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:18:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:18:57:elinks:INFO: Disabling clock on downlink 0
13:18:57:elinks:INFO: Disabling clock on downlink 1
13:18:57:elinks:INFO: Disabling clock on downlink 2
13:18:57:elinks:INFO: Disabling clock on downlink 3
13:18:57:elinks:INFO: Disabling clock on downlink 4
13:18:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:18:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:18:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:18:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:18:58:elinks:INFO: Disabling clock on downlink 0
13:18:58:elinks:INFO: Disabling clock on downlink 1
13:18:58:elinks:INFO: Disabling clock on downlink 2
13:18:58:elinks:INFO: Disabling clock on downlink 3
13:18:58:elinks:INFO: Disabling clock on downlink 4
13:18:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:18:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:18:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:18:58:elinks:INFO: Disabling clock on downlink 0
13:18:58:elinks:INFO: Disabling clock on downlink 1
13:18:58:elinks:INFO: Disabling clock on downlink 2
13:18:58:elinks:INFO: Disabling clock on downlink 3
13:18:58:elinks:INFO: Disabling clock on downlink 4
13:18:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:18:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:18:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:18:58:setup_element:INFO: Scanning clock phase
13:18:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:18:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:18:58:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:18:58:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:18:58:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:18:58:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:18:58:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:18:58:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:18:58:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:18:58:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:18:58:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:18:58:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:18:58:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:18:58:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:18:58:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:18:58:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:18:58:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:18:58:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:18:58:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:18:58:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
13:18:58:setup_element:INFO: Scanning data phases
13:18:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:18:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:19:03:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:19:03:setup_element:INFO: Eye window for uplink 16: XXXXX__________________________________X
Data delay found: 21
13:19:03:setup_element:INFO: Eye window for uplink 17: XX___________________________________XXX
Data delay found: 19
13:19:03:setup_element:INFO: Eye window for uplink 18: XX_______________________________XXXXXXX
Data delay found: 17
13:19:03:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXXXX
Data delay found: 16
13:19:03:setup_element:INFO: Eye window for uplink 20: XX_____________________________________X
Data delay found: 20
13:19:03:setup_element:INFO: Eye window for uplink 21: XX___________________________________XXX
Data delay found: 19
13:19:03:setup_element:INFO: Eye window for uplink 22: XXXX__________________________________XX
Data delay found: 20
13:19:03:setup_element:INFO: Eye window for uplink 23: XXXXXXX_____________________________XXXX
Data delay found: 21
13:19:03:setup_element:INFO: Eye window for uplink 24: __XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 0
13:19:03:setup_element:INFO: Eye window for uplink 25: __XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 0
13:19:03:setup_element:INFO: Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
13:19:03:setup_element:INFO: Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
13:19:03:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
13:19:03:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
13:19:03:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
13:19:03:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
13:19:03:setup_element:INFO: Setting the data phase to 21 for uplink 16
13:19:03:setup_element:INFO: Setting the data phase to 19 for uplink 17
13:19:03:setup_element:INFO: Setting the data phase to 17 for uplink 18
13:19:03:setup_element:INFO: Setting the data phase to 16 for uplink 19
13:19:03:setup_element:INFO: Setting the data phase to 20 for uplink 20
13:19:03:setup_element:INFO: Setting the data phase to 19 for uplink 21
13:19:03:setup_element:INFO: Setting the data phase to 20 for uplink 22
13:19:03:setup_element:INFO: Setting the data phase to 21 for uplink 23
13:19:03:setup_element:INFO: Setting the data phase to 0 for uplink 24
13:19:03:setup_element:INFO: Setting the data phase to 0 for uplink 25
13:19:03:setup_element:INFO: Setting the data phase to 30 for uplink 26
13:19:03:setup_element:INFO: Setting the data phase to 33 for uplink 27
13:19:03:setup_element:INFO: Setting the data phase to 35 for uplink 28
13:19:03:setup_element:INFO: Setting the data phase to 37 for uplink 29
13:19:03:setup_element:INFO: Setting the data phase to 37 for uplink 30
13:19:03:setup_element:INFO: Setting the data phase to 38 for uplink 31
==============================================OOO==============================================
13:19:03:setup_element:INFO: Beginning SMX ASICs map scan
13:19:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:19:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:19:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:19:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:19:04:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:19:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:19:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:19:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:19:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:19:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:19:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:19:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:19:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:19:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:19:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:19:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:19:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:19:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:19:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:19:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:19:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:19:06:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXX___
Uplink 17: _____________________________________________________________________XXXXXXXX___
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: _____________________________________________________________________XXXXXXXX___
Uplink 21: _____________________________________________________________________XXXXXXXX___
Uplink 22: _____________________________________________________________________XXXXXXXXX__
Uplink 23: _____________________________________________________________________XXXXXXXXX__
Uplink 24: ____________________________________________________________________XXXXXXXXX___
Uplink 25: ____________________________________________________________________XXXXXXXXX___
Uplink 26: ____________________________________________________________________XXXXXXXX____
Uplink 27: ____________________________________________________________________XXXXXXXX____
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: ______________________________________________________________________XXXXXXX___
Uplink 31: ______________________________________________________________________XXXXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 17:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 18:
Optimal Phase: 17
Window Length: 31
Eye Window: XX_______________________________XXXXXXX
Uplink 19:
Optimal Phase: 16
Window Length: 33
Eye Window: _________________________________XXXXXXX
Uplink 20:
Optimal Phase: 20
Window Length: 37
Eye Window: XX_____________________________________X
Uplink 21:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 22:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 23:
Optimal Phase: 21
Window Length: 29
Eye Window: XXXXXXX_____________________________XXXX
Uplink 24:
Optimal Phase: 0
Window Length: 2
Eye Window: __XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 25:
Optimal Phase: 0
Window Length: 2
Eye Window: __XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 26:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 27:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
==============================================OOO==============================================
13:19:06:setup_element:INFO: Performing Elink synchronization
13:19:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:19:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:19:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:19:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
13:19:06:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:19:06:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:19:07:febtest:INFO: Init all SMX (CSA): 30
13:19:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:19:21:febtest:INFO: 23-00 | XA-000-09-004-007-015-020-13 | 25.1 | 1177.4
13:19:21:febtest:INFO: 30-01 | XA-000-09-004-007-015-018-13 | 31.4 | 1153.7
13:19:21:febtest:INFO: 21-02 | XA-000-09-004-007-013-019-14 | 21.9 | 1183.3
13:19:21:febtest:INFO: 28-03 | XA-000-09-004-007-013-018-14 | 31.4 | 1153.7
13:19:22:febtest:INFO: 19-04 | XA-000-09-004-007-013-021-14 | 34.6 | 1147.8
13:19:22:febtest:INFO: 26-05 | XA-000-09-004-007-014-018-00 | 31.4 | 1147.8
13:19:22:febtest:INFO: 17-06 | XA-000-09-004-007-014-019-00 | 40.9 | 1135.9
13:19:22:febtest:INFO: 24-07 | XA-000-09-004-007-015-019-13 | 18.7 | 1195.1
13:19:23:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:19:25:ST3_smx:INFO: chip: 23-0 25.062742 C 1189.190035 mV
13:19:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:19:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:19:25:ST3_smx:INFO: Electrons
13:19:25:ST3_smx:INFO: # loops 0
13:19:27:ST3_smx:INFO: # loops 1
13:19:29:ST3_smx:INFO: # loops 2
13:19:30:ST3_smx:INFO: Total # of broken channels: 0
13:19:30:ST3_smx:INFO: List of broken channels: []
13:19:30:ST3_smx:INFO: Total # of broken channels: 38
13:19:30:ST3_smx:INFO: List of broken channels: [4, 6, 8, 10, 12, 16, 18, 22, 26, 28, 30, 32, 34, 38, 42, 44, 46, 48, 50, 52, 62, 68, 70, 72, 76, 78, 80, 84, 86, 88, 90, 92, 96, 98, 102, 108, 110, 120]
13:19:32:ST3_smx:INFO: chip: 30-1 31.389742 C 1165.571835 mV
13:19:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:19:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:19:32:ST3_smx:INFO: Electrons
13:19:32:ST3_smx:INFO: # loops 0
13:19:34:ST3_smx:INFO: # loops 1
13:19:35:ST3_smx:INFO: # loops 2
13:19:37:ST3_smx:INFO: Total # of broken channels: 0
13:19:37:ST3_smx:INFO: List of broken channels: []
13:19:37:ST3_smx:INFO: Total # of broken channels: 9
13:19:37:ST3_smx:INFO: List of broken channels: [4, 6, 8, 14, 18, 26, 28, 40, 76]
13:19:38:ST3_smx:INFO: chip: 21-2 21.902970 C 1195.082160 mV
13:19:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:19:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:19:38:ST3_smx:INFO: Electrons
13:19:38:ST3_smx:INFO: # loops 0
13:19:40:ST3_smx:INFO: # loops 1
13:19:41:ST3_smx:INFO: # loops 2
13:19:43:ST3_smx:INFO: Total # of broken channels: 0
13:19:43:ST3_smx:INFO: List of broken channels: []
13:19:43:ST3_smx:INFO: Total # of broken channels: 28
13:19:43:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 42, 44, 48, 52, 58, 60, 62, 64, 72, 94, 96]
13:19:45:ST3_smx:INFO: chip: 28-3 31.389742 C 1171.483840 mV
13:19:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:19:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:19:45:ST3_smx:INFO: Electrons
13:19:45:ST3_smx:INFO: # loops 0
13:19:46:ST3_smx:INFO: # loops 1
13:19:48:ST3_smx:INFO: # loops 2
13:19:49:ST3_smx:INFO: Total # of broken channels: 2
13:19:49:ST3_smx:INFO: List of broken channels: [4, 10]
13:19:49:ST3_smx:INFO: Total # of broken channels: 34
13:19:49:ST3_smx:INFO: List of broken channels: [4, 6, 7, 8, 10, 14, 16, 20, 22, 24, 26, 28, 30, 32, 36, 38, 40, 42, 44, 48, 50, 52, 58, 62, 64, 68, 74, 78, 82, 94, 98, 100, 112, 114]
13:19:51:ST3_smx:INFO: chip: 19-4 34.556970 C 1159.654860 mV
13:19:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:19:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:19:51:ST3_smx:INFO: Electrons
13:19:51:ST3_smx:INFO: # loops 0
13:19:52:ST3_smx:INFO: # loops 1
13:19:54:ST3_smx:INFO: # loops 2
13:19:55:ST3_smx:INFO: Total # of broken channels: 1
13:19:55:ST3_smx:INFO: List of broken channels: [112]
13:19:55:ST3_smx:INFO: Total # of broken channels: 42
13:19:55:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 42, 44, 46, 48, 50, 52, 54, 58, 64, 66, 68, 70, 72, 74, 76, 78, 86, 90, 92, 98, 108, 118]
13:19:57:ST3_smx:INFO: chip: 26-5 31.389742 C 1159.654860 mV
13:19:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:19:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:19:57:ST3_smx:INFO: Electrons
13:19:57:ST3_smx:INFO: # loops 0
13:19:58:ST3_smx:INFO: # loops 1
13:20:00:ST3_smx:INFO: # loops 2
13:20:01:ST3_smx:INFO: Total # of broken channels: 14
13:20:01:ST3_smx:INFO: List of broken channels: [4, 6, 8, 14, 16, 18, 24, 26, 34, 40, 42, 44, 48, 52]
13:20:01:ST3_smx:INFO: Total # of broken channels: 46
13:20:01:ST3_smx:INFO: List of broken channels: [2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 62, 64, 68, 74, 76, 80, 84, 86, 90, 92, 94, 96, 100, 104, 106, 112, 118, 120]
13:20:03:ST3_smx:INFO: chip: 17-6 40.898880 C 1147.806000 mV
13:20:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:20:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:20:03:ST3_smx:INFO: Electrons
13:20:03:ST3_smx:INFO: # loops 0
13:20:05:ST3_smx:INFO: # loops 1
13:20:06:ST3_smx:INFO: # loops 2
13:20:08:ST3_smx:INFO: Total # of broken channels: 0
13:20:08:ST3_smx:INFO: List of broken channels: []
13:20:08:ST3_smx:INFO: Total # of broken channels: 22
13:20:08:ST3_smx:INFO: List of broken channels: [4, 6, 8, 16, 18, 20, 24, 28, 30, 36, 38, 42, 48, 50, 52, 54, 60, 74, 76, 78, 106, 108]
13:20:09:ST3_smx:INFO: chip: 24-7 21.902970 C 1200.969315 mV
13:20:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:20:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:20:09:ST3_smx:INFO: Electrons
13:20:09:ST3_smx:INFO: # loops 0
13:20:11:ST3_smx:INFO: # loops 1
13:20:13:ST3_smx:INFO: # loops 2
13:20:14:ST3_smx:INFO: Total # of broken channels: 0
13:20:14:ST3_smx:INFO: List of broken channels: []
13:20:14:ST3_smx:INFO: Total # of broken channels: 30
13:20:14:ST3_smx:INFO: List of broken channels: [4, 6, 8, 10, 12, 16, 18, 20, 22, 24, 28, 30, 32, 34, 36, 38, 40, 46, 48, 50, 52, 56, 66, 68, 72, 74, 76, 80, 88, 96]
13:20:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:20:15:febtest:INFO: 23-00 | XA-000-09-004-007-015-020-13 | 25.1 | 1212.7
13:20:15:febtest:INFO: 30-01 | XA-000-09-004-007-015-018-13 | 31.4 | 1189.2
13:20:15:febtest:INFO: 21-02 | XA-000-09-004-007-013-019-14 | 21.9 | 1218.6
13:20:15:febtest:INFO: 28-03 | XA-000-09-004-007-013-018-14 | 31.4 | 1195.1
13:20:16:febtest:INFO: 19-04 | XA-000-09-004-007-013-021-14 | 34.6 | 1183.3
13:20:16:febtest:INFO: 26-05 | XA-000-09-004-007-014-018-00 | 31.4 | 1183.3
13:20:16:febtest:INFO: 17-06 | XA-000-09-004-007-014-019-00 | 40.9 | 1171.5
13:20:16:febtest:INFO: 24-07 | XA-000-09-004-007-015-019-13 | 21.9 | 1218.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_29-13_18_55
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2303| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : MUCH
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8900', '1.848', '2.3480']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0030', '1.850', '2.6050']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9780', '1.850', '0.5279']