Go Back
FEB_2303 05.12.24 11:26:01
TextEdit.txt
11:26:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:26:01:ST3_Shared:INFO: FEB-Sensor
11:26:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:26:03:ST3_Shared:INFO: STS mode selected
11:26:08:ST3_ModuleSelector:DEBUG: M3DR4B0000130A2
11:26:08:ST3_ModuleSelector:DEBUG: L3DR400013
11:26:08:ST3_ModuleSelector:DEBUG: 25442
11:26:08:ST3_ModuleSelector:DEBUG: 62x42
11:26:08:ST3_ModuleSelector:DEBUG: C
11:26:08:ST3_ModuleSelector:DEBUG: M3DR4B0000130A2
11:26:08:ST3_ModuleSelector:DEBUG: L3DR400013
11:26:08:ST3_ModuleSelector:DEBUG: 25442
11:26:08:ST3_ModuleSelector:DEBUG: 62x42
11:26:08:ST3_ModuleSelector:DEBUG: C
11:26:11:ST3_ModuleSelector:INFO: M3DR4B0000130A2
11:26:11:ST3_ModuleSelector:INFO: 25442
11:26:11:febtest:INFO: Testing FEB with SN 2303
11:26:13:smx_tester:INFO: Scanning setup
11:26:13:elinks:INFO: Disabling clock on downlink 0
11:26:13:elinks:INFO: Disabling clock on downlink 1
11:26:13:elinks:INFO: Disabling clock on downlink 2
11:26:13:elinks:INFO: Disabling clock on downlink 3
11:26:13:elinks:INFO: Disabling clock on downlink 4
11:26:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:26:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:26:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:26:13:elinks:INFO: Disabling clock on downlink 0
11:26:13:elinks:INFO: Disabling clock on downlink 1
11:26:13:elinks:INFO: Disabling clock on downlink 2
11:26:13:elinks:INFO: Disabling clock on downlink 3
11:26:13:elinks:INFO: Disabling clock on downlink 4
11:26:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:26:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:26:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:26:13:elinks:INFO: Disabling clock on downlink 0
11:26:13:elinks:INFO: Disabling clock on downlink 1
11:26:13:elinks:INFO: Disabling clock on downlink 2
11:26:13:elinks:INFO: Disabling clock on downlink 3
11:26:13:elinks:INFO: Disabling clock on downlink 4
11:26:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:26:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:26:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:26:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:26:13:elinks:INFO: Disabling clock on downlink 0
11:26:13:elinks:INFO: Disabling clock on downlink 1
11:26:13:elinks:INFO: Disabling clock on downlink 2
11:26:13:elinks:INFO: Disabling clock on downlink 3
11:26:13:elinks:INFO: Disabling clock on downlink 4
11:26:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:26:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:26:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:26:14:elinks:INFO: Disabling clock on downlink 0
11:26:14:elinks:INFO: Disabling clock on downlink 1
11:26:14:elinks:INFO: Disabling clock on downlink 2
11:26:14:elinks:INFO: Disabling clock on downlink 3
11:26:14:elinks:INFO: Disabling clock on downlink 4
11:26:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:26:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:26:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:26:14:setup_element:INFO: Scanning clock phase
11:26:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:26:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:26:14:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:26:14:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:26:14:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:26:14:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:26:14:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:26:14:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:26:14:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:26:14:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:26:14:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:26:14:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:26:14:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:26:14:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:26:14:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:26:14:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:26:14:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:26:14:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:26:14:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:26:14:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
11:26:14:setup_element:INFO: Scanning data phases
11:26:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:26:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:26:20:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:26:20:setup_element:INFO: Eye window for uplink 16: XXX____________________________________X
Data delay found: 20
11:26:20:setup_element:INFO: Eye window for uplink 17: XX__________________________________XXXX
Data delay found: 18
11:26:20:setup_element:INFO: Eye window for uplink 18: X_________________________________XXXXXX
Data delay found: 17
11:26:20:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXX__
Data delay found: 15
11:26:20:setup_element:INFO: Eye window for uplink 20: XX___________________________________XXX
Data delay found: 19
11:26:20:setup_element:INFO: Eye window for uplink 21: X___________________________________XXXX
Data delay found: 18
11:26:20:setup_element:INFO: Eye window for uplink 22: XXXX_________________________________XXX
Data delay found: 20
11:26:20:setup_element:INFO: Eye window for uplink 23: XXXXXXX_____________________________XXXX
Data delay found: 21
11:26:20:setup_element:INFO: Eye window for uplink 24: _________XXXXXX_________________________
Data delay found: 31
11:26:20:setup_element:INFO: Eye window for uplink 25: ____________XXXXX_______________________
Data delay found: 34
11:26:20:setup_element:INFO: Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
11:26:20:setup_element:INFO: Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
11:26:20:setup_element:INFO: Eye window for uplink 28: ____________XXXXXX______________________
Data delay found: 34
11:26:20:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
11:26:20:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
11:26:20:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
11:26:20:setup_element:INFO: Setting the data phase to 20 for uplink 16
11:26:20:setup_element:INFO: Setting the data phase to 18 for uplink 17
11:26:20:setup_element:INFO: Setting the data phase to 17 for uplink 18
11:26:20:setup_element:INFO: Setting the data phase to 15 for uplink 19
11:26:20:setup_element:INFO: Setting the data phase to 19 for uplink 20
11:26:20:setup_element:INFO: Setting the data phase to 18 for uplink 21
11:26:20:setup_element:INFO: Setting the data phase to 20 for uplink 22
11:26:20:setup_element:INFO: Setting the data phase to 21 for uplink 23
11:26:20:setup_element:INFO: Setting the data phase to 31 for uplink 24
11:26:20:setup_element:INFO: Setting the data phase to 34 for uplink 25
11:26:20:setup_element:INFO: Setting the data phase to 30 for uplink 26
11:26:20:setup_element:INFO: Setting the data phase to 33 for uplink 27
11:26:20:setup_element:INFO: Setting the data phase to 34 for uplink 28
11:26:20:setup_element:INFO: Setting the data phase to 37 for uplink 29
11:26:20:setup_element:INFO: Setting the data phase to 37 for uplink 30
11:26:20:setup_element:INFO: Setting the data phase to 38 for uplink 31
==============================================OOO==============================================
11:26:20:setup_element:INFO: Beginning SMX ASICs map scan
11:26:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:26:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:26:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:26:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:26:20:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:26:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:26:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:26:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:26:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:26:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:26:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:26:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:26:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:26:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:26:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:26:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:26:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:26:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:26:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:26:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:26:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:26:23:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 71
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXX___
Uplink 17: _____________________________________________________________________XXXXXXXX___
Uplink 18: _____________________________________________________________________XXXXXXX____
Uplink 19: _____________________________________________________________________XXXXXXX____
Uplink 20: _____________________________________________________________________XXXXXXXX___
Uplink 21: _____________________________________________________________________XXXXXXXX___
Uplink 22: _____________________________________________________________________XXXXXXXX___
Uplink 23: _____________________________________________________________________XXXXXXXX___
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: ____________________________________________________________________XXXXXXXX____
Uplink 27: ____________________________________________________________________XXXXXXXX____
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: ______________________________________________________________________XXXXXXX___
Uplink 31: ______________________________________________________________________XXXXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 36
Eye Window: XXX____________________________________X
Uplink 17:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 18:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 19:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 20:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 21:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 22:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 23:
Optimal Phase: 21
Window Length: 29
Eye Window: XXXXXXX_____________________________XXXX
Uplink 24:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 25:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 26:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 27:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 28:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 29:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
==============================================OOO==============================================
11:26:23:setup_element:INFO: Performing Elink synchronization
11:26:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:26:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:26:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:26:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
11:26:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:26:23:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:26:24:febtest:INFO: Init all SMX (CSA): 30
11:26:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:26:37:febtest:INFO: 23-00 | XA-000-09-004-007-015-020-13 | 25.1 | 1177.4
11:26:37:febtest:INFO: 30-01 | XA-000-09-004-007-015-018-13 | 31.4 | 1153.7
11:26:38:febtest:INFO: 21-02 | XA-000-09-004-007-013-019-14 | 18.7 | 1195.1
11:26:38:febtest:INFO: 28-03 | XA-000-09-004-007-013-018-14 | 31.4 | 1153.7
11:26:38:febtest:INFO: 19-04 | XA-000-09-004-007-013-021-14 | 37.7 | 1147.8
11:26:38:febtest:INFO: 26-05 | XA-000-09-004-007-014-018-00 | 31.4 | 1147.8
11:26:39:febtest:INFO: 17-06 | XA-000-09-004-007-014-019-00 | 40.9 | 1141.9
11:26:39:febtest:INFO: 24-07 | XA-000-09-004-007-015-019-13 | 21.9 | 1189.2
11:26:40:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:26:42:ST3_smx:INFO: chip: 23-0 25.062742 C 1189.190035 mV
11:26:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:42:ST3_smx:INFO: Electrons
11:26:42:ST3_smx:INFO: # loops 0
11:26:44:ST3_smx:INFO: # loops 1
11:26:45:ST3_smx:INFO: # loops 2
11:26:47:ST3_smx:INFO: # loops 3
11:26:48:ST3_smx:INFO: # loops 4
11:26:50:ST3_smx:INFO: Total # of broken channels: 0
11:26:50:ST3_smx:INFO: List of broken channels: []
11:26:50:ST3_smx:INFO: Total # of broken channels: 0
11:26:50:ST3_smx:INFO: List of broken channels: []
11:26:52:ST3_smx:INFO: chip: 30-1 31.389742 C 1165.571835 mV
11:26:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:52:ST3_smx:INFO: Electrons
11:26:52:ST3_smx:INFO: # loops 0
11:26:54:ST3_smx:INFO: # loops 1
11:26:55:ST3_smx:INFO: # loops 2
11:26:57:ST3_smx:INFO: # loops 3
11:26:58:ST3_smx:INFO: # loops 4
11:27:00:ST3_smx:INFO: Total # of broken channels: 0
11:27:00:ST3_smx:INFO: List of broken channels: []
11:27:00:ST3_smx:INFO: Total # of broken channels: 2
11:27:00:ST3_smx:INFO: List of broken channels: [0, 1]
11:27:02:ST3_smx:INFO: chip: 21-2 18.745682 C 1206.851500 mV
11:27:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:02:ST3_smx:INFO: Electrons
11:27:02:ST3_smx:INFO: # loops 0
11:27:03:ST3_smx:INFO: # loops 1
11:27:05:ST3_smx:INFO: # loops 2
11:27:06:ST3_smx:INFO: # loops 3
11:27:08:ST3_smx:INFO: # loops 4
11:27:09:ST3_smx:INFO: Total # of broken channels: 0
11:27:09:ST3_smx:INFO: List of broken channels: []
11:27:09:ST3_smx:INFO: Total # of broken channels: 0
11:27:09:ST3_smx:INFO: List of broken channels: []
11:27:11:ST3_smx:INFO: chip: 28-3 31.389742 C 1171.483840 mV
11:27:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:11:ST3_smx:INFO: Electrons
11:27:11:ST3_smx:INFO: # loops 0
11:27:13:ST3_smx:INFO: # loops 1
11:27:14:ST3_smx:INFO: # loops 2
11:27:16:ST3_smx:INFO: # loops 3
11:27:17:ST3_smx:INFO: # loops 4
11:27:19:ST3_smx:INFO: Total # of broken channels: 0
11:27:19:ST3_smx:INFO: List of broken channels: []
11:27:19:ST3_smx:INFO: Total # of broken channels: 1
11:27:19:ST3_smx:INFO: List of broken channels: [126]
11:27:20:ST3_smx:INFO: chip: 19-4 37.726682 C 1159.654860 mV
11:27:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:20:ST3_smx:INFO: Electrons
11:27:20:ST3_smx:INFO: # loops 0
11:27:22:ST3_smx:INFO: # loops 1
11:27:24:ST3_smx:INFO: # loops 2
11:27:25:ST3_smx:INFO: # loops 3
11:27:27:ST3_smx:INFO: # loops 4
11:27:28:ST3_smx:INFO: Total # of broken channels: 0
11:27:28:ST3_smx:INFO: List of broken channels: []
11:27:28:ST3_smx:INFO: Total # of broken channels: 0
11:27:28:ST3_smx:INFO: List of broken channels: []
11:27:30:ST3_smx:INFO: chip: 26-5 31.389742 C 1159.654860 mV
11:27:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:30:ST3_smx:INFO: Electrons
11:27:30:ST3_smx:INFO: # loops 0
11:27:31:ST3_smx:INFO: # loops 1
11:27:33:ST3_smx:INFO: # loops 2
11:27:34:ST3_smx:INFO: # loops 3
11:27:36:ST3_smx:INFO: # loops 4
11:27:38:ST3_smx:INFO: Total # of broken channels: 0
11:27:38:ST3_smx:INFO: List of broken channels: []
11:27:38:ST3_smx:INFO: Total # of broken channels: 1
11:27:38:ST3_smx:INFO: List of broken channels: [6]
11:27:39:ST3_smx:INFO: chip: 17-6 40.898880 C 1147.806000 mV
11:27:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:39:ST3_smx:INFO: Electrons
11:27:39:ST3_smx:INFO: # loops 0
11:27:41:ST3_smx:INFO: # loops 1
11:27:43:ST3_smx:INFO: # loops 2
11:27:44:ST3_smx:INFO: # loops 3
11:27:46:ST3_smx:INFO: # loops 4
11:27:47:ST3_smx:INFO: Total # of broken channels: 0
11:27:47:ST3_smx:INFO: List of broken channels: []
11:27:47:ST3_smx:INFO: Total # of broken channels: 0
11:27:47:ST3_smx:INFO: List of broken channels: []
11:27:49:ST3_smx:INFO: chip: 24-7 21.902970 C 1200.969315 mV
11:27:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:49:ST3_smx:INFO: Electrons
11:27:49:ST3_smx:INFO: # loops 0
11:27:50:ST3_smx:INFO: # loops 1
11:27:52:ST3_smx:INFO: # loops 2
11:27:54:ST3_smx:INFO: # loops 3
11:27:55:ST3_smx:INFO: # loops 4
11:27:57:ST3_smx:INFO: Total # of broken channels: 0
11:27:57:ST3_smx:INFO: List of broken channels: []
11:27:57:ST3_smx:INFO: Total # of broken channels: 0
11:27:57:ST3_smx:INFO: List of broken channels: []
11:27:57:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:27:57:febtest:INFO: 23-00 | XA-000-09-004-007-015-020-13 | 25.1 | 1212.7
11:27:57:febtest:INFO: 30-01 | XA-000-09-004-007-015-018-13 | 31.4 | 1183.3
11:27:58:febtest:INFO: 21-02 | XA-000-09-004-007-013-019-14 | 21.9 | 1230.3
11:27:58:febtest:INFO: 28-03 | XA-000-09-004-007-013-018-14 | 31.4 | 1189.2
11:27:58:febtest:INFO: 19-04 | XA-000-09-004-007-013-021-14 | 37.7 | 1177.4
11:27:58:febtest:INFO: 26-05 | XA-000-09-004-007-014-018-00 | 31.4 | 1183.3
11:27:59:febtest:INFO: 17-06 | XA-000-09-004-007-014-019-00 | 40.9 | 1171.5
11:27:59:febtest:INFO: 24-07 | XA-000-09-004-007-015-019-13 | 25.1 | 1224.5
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_12_05-11_26_01
OPERATOR : Kerstin S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2303| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 25442 | SIZE: 62x42 | GRADE: C
MODULE_NAME: M3DR4B0000130A2
LADDER_NAME: L3DR400013
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8830', '1.848', '2.4210']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0090', '1.850', '2.5530']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9770', '1.850', '0.5289']