09:28:31:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:28:31:ST3_Shared:INFO:	                       FEB-Microcable                       
09:28:31:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:28:32:ST3_Shared:INFO:	STS mode selected
09:28:32:febtest:INFO:	Testing FEB with SN 2304
09:28:34:smx_tester:INFO:	Scanning setup
09:28:34:elinks:INFO:	Disabling clock on downlink 0
09:28:34:elinks:INFO:	Disabling clock on downlink 1
09:28:34:elinks:INFO:	Disabling clock on downlink 2
09:28:34:elinks:INFO:	Disabling clock on downlink 3
09:28:34:elinks:INFO:	Disabling clock on downlink 4
09:28:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:28:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:28:34:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:28:34:elinks:INFO:	Disabling clock on downlink 0
09:28:34:elinks:INFO:	Disabling clock on downlink 1
09:28:34:elinks:INFO:	Disabling clock on downlink 2
09:28:34:elinks:INFO:	Disabling clock on downlink 3
09:28:34:elinks:INFO:	Disabling clock on downlink 4
09:28:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:28:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:28:34:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:28:34:elinks:INFO:	Disabling clock on downlink 0
09:28:34:elinks:INFO:	Disabling clock on downlink 1
09:28:34:elinks:INFO:	Disabling clock on downlink 2
09:28:34:elinks:INFO:	Disabling clock on downlink 3
09:28:34:elinks:INFO:	Disabling clock on downlink 4
09:28:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:28:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:28:34:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
09:28:34:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
09:28:34:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
09:28:34:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
09:28:34:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
09:28:34:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
09:28:34:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
09:28:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
09:28:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:28:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:28:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:28:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:28:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:28:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:28:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:28:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:28:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:28:35:elinks:INFO:	Disabling clock on downlink 0
09:28:35:elinks:INFO:	Disabling clock on downlink 1
09:28:35:elinks:INFO:	Disabling clock on downlink 2
09:28:35:elinks:INFO:	Disabling clock on downlink 3
09:28:35:elinks:INFO:	Disabling clock on downlink 4
09:28:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:28:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:28:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:28:35:elinks:INFO:	Disabling clock on downlink 0
09:28:35:elinks:INFO:	Disabling clock on downlink 1
09:28:35:elinks:INFO:	Disabling clock on downlink 2
09:28:35:elinks:INFO:	Disabling clock on downlink 3
09:28:35:elinks:INFO:	Disabling clock on downlink 4
09:28:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:28:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:28:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:28:35:setup_element:INFO:	Scanning clock phase
09:28:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:28:35:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:28:35:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:28:35:setup_element:INFO:	Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:28:35:setup_element:INFO:	Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:28:35:setup_element:INFO:	Eye window for uplink 18: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:28:35:setup_element:INFO:	Eye window for uplink 19: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:28:35:setup_element:INFO:	Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:28:35:setup_element:INFO:	Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:28:35:setup_element:INFO:	Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:28:35:setup_element:INFO:	Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:28:35:setup_element:INFO:	Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:28:35:setup_element:INFO:	Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:28:35:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:28:35:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:28:35:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:28:35:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:28:35:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:28:35:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:28:35:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
09:28:35:setup_element:INFO:	Scanning data phases
09:28:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:28:35:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:28:41:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:28:41:setup_element:INFO:	Eye window for uplink 16: XXX__________________________________XXX
Data delay found: 19
09:28:41:setup_element:INFO:	Eye window for uplink 17: X__________________________________XXXXX
Data delay found: 17
09:28:41:setup_element:INFO:	Eye window for uplink 18: __________________________________XXXXX_
Data delay found: 16
09:28:41:setup_element:INFO:	Eye window for uplink 19: ________________________________XXXXX___
Data delay found: 14
09:28:41:setup_element:INFO:	Eye window for uplink 20: XXXX___________________________________X
Data delay found: 21
09:28:41:setup_element:INFO:	Eye window for uplink 21: XXX__________________________________XXX
Data delay found: 19
09:28:41:setup_element:INFO:	Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
09:28:41:setup_element:INFO:	Eye window for uplink 23: XXXXXX_____________________________XXXXX
Data delay found: 20
09:28:41:setup_element:INFO:	Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
09:28:41:setup_element:INFO:	Eye window for uplink 25: __________XXXXXX________________________
Data delay found: 32
09:28:41:setup_element:INFO:	Eye window for uplink 26: _______XXXXXX___________________________
Data delay found: 29
09:28:41:setup_element:INFO:	Eye window for uplink 27: ___________XXXXXX_______________________
Data delay found: 33
09:28:41:setup_element:INFO:	Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
09:28:41:setup_element:INFO:	Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
09:28:41:setup_element:INFO:	Eye window for uplink 30: _________________XXXXXX____________XXXXX
Data delay found: 8
09:28:41:setup_element:INFO:	Eye window for uplink 31: _________________XXXXXXX___________XXXXX
Data delay found: 8
09:28:41:setup_element:INFO:	Setting the data phase to 19 for uplink 16
09:28:41:setup_element:INFO:	Setting the data phase to 17 for uplink 17
09:28:41:setup_element:INFO:	Setting the data phase to 16 for uplink 18
09:28:41:setup_element:INFO:	Setting the data phase to 14 for uplink 19
09:28:41:setup_element:INFO:	Setting the data phase to 21 for uplink 20
09:28:41:setup_element:INFO:	Setting the data phase to 19 for uplink 21
09:28:41:setup_element:INFO:	Setting the data phase to 18 for uplink 22
09:28:41:setup_element:INFO:	Setting the data phase to 20 for uplink 23
09:28:41:setup_element:INFO:	Setting the data phase to 30 for uplink 24
09:28:41:setup_element:INFO:	Setting the data phase to 32 for uplink 25
09:28:41:setup_element:INFO:	Setting the data phase to 29 for uplink 26
09:28:41:setup_element:INFO:	Setting the data phase to 33 for uplink 27
09:28:41:setup_element:INFO:	Setting the data phase to 35 for uplink 28
09:28:41:setup_element:INFO:	Setting the data phase to 37 for uplink 29
09:28:41:setup_element:INFO:	Setting the data phase to 8 for uplink 30
09:28:41:setup_element:INFO:	Setting the data phase to 8 for uplink 31
==============================================OOO==============================================
09:28:41:setup_element:INFO:	Beginning SMX ASICs map scan
09:28:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:28:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:28:41:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:28:41:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:28:41:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:28:41:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:28:41:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:28:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:28:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:28:41:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:28:41:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:28:41:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:28:41:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:28:41:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:28:42:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:28:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:28:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:28:42:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:28:42:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:28:42:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:28:42:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:28:43:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink 16: ______________________________________________________________________XXXXXXXX__
      Uplink 17: ______________________________________________________________________XXXXXXXX__
      Uplink 18: _____________________________________________________________________XXXXXXX____
      Uplink 19: _____________________________________________________________________XXXXXXX____
      Uplink 20: ______________________________________________________________________XXXXXXXX__
      Uplink 21: ______________________________________________________________________XXXXXXXX__
      Uplink 22: _____________________________________________________________________XXXXXXXXX__
      Uplink 23: _____________________________________________________________________XXXXXXXXX__
      Uplink 24: _____________________________________________________________________XXXXXXXXX__
      Uplink 25: _____________________________________________________________________XXXXXXXXX__
      Uplink 26: _____________________________________________________________________XXXXXXXX___
      Uplink 27: _____________________________________________________________________XXXXXXXX___
      Uplink 28: _____________________________________________________________________XXXXXXXX___
      Uplink 29: _____________________________________________________________________XXXXXXXX___
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 17:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 18:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 19:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 20:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 21:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 22:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 23:
      Optimal Phase: 20
      Window Length: 29
      Eye Window: XXXXXX_____________________________XXXXX
    Uplink 24:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 25:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 30:
      Optimal Phase: 8
      Window Length: 17
      Eye Window: _________________XXXXXX____________XXXXX
    Uplink 31:
      Optimal Phase: 8
      Window Length: 17
      Eye Window: _________________XXXXXXX___________XXXXX

==============================================OOO==============================================
09:28:43:setup_element:INFO:	Performing Elink synchronization
09:28:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:28:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:28:43:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:28:43:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
09:28:43:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:28:43:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:28:44:febtest:INFO:	Init all SMX (CSA): 30
09:29:05:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:29:05:febtest:INFO:	23-00 | XA-000-09-004-012-002-018-04 |  25.1 | 1212.7
09:29:05:febtest:INFO:	30-01 | XA-000-09-004-012-004-008-06 |  25.1 | 1183.3
09:29:05:febtest:INFO:	21-02 | XA-000-09-004-012-002-017-04 |  47.3 | 1118.1
09:29:06:febtest:INFO:	28-03 | XA-000-09-004-012-004-009-06 |  34.6 | 1165.6
09:29:06:febtest:INFO:	19-04 | XA-000-09-004-012-006-009-05 |  34.6 | 1165.6
09:29:06:febtest:INFO:	26-05 | XA-000-09-004-012-005-009-11 |  31.4 | 1165.6
09:29:06:febtest:INFO:	17-06 | XA-000-09-004-012-006-010-05 |  37.7 | 1159.7
09:29:07:febtest:INFO:	24-07 | XA-000-09-004-012-005-010-11 |  34.6 | 1165.6
09:29:08:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:29:10:ST3_smx:INFO:	chip: 23-0 	 25.062742 C 	 1236.187875 mV
09:29:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:10:ST3_smx:INFO:		Electrons
09:29:10:ST3_smx:INFO:	# loops 0
09:29:12:ST3_smx:INFO:	# loops 1
09:29:14:ST3_smx:INFO:	# loops 2
09:29:17:ST3_smx:INFO:	Total # of broken channels: 0
09:29:17:ST3_smx:INFO:	List of broken channels: []
09:29:17:ST3_smx:INFO:	Total # of broken channels: 0
09:29:17:ST3_smx:INFO:	List of broken channels: []
09:29:19:ST3_smx:INFO:	chip: 30-1 	 28.225000 C 	 1200.969315 mV
09:29:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:19:ST3_smx:INFO:		Electrons
09:29:19:ST3_smx:INFO:	# loops 0
09:29:21:ST3_smx:INFO:	# loops 1
09:29:24:ST3_smx:INFO:	# loops 2
09:29:26:ST3_smx:INFO:	Total # of broken channels: 0
09:29:26:ST3_smx:INFO:	List of broken channels: []
09:29:26:ST3_smx:INFO:	Total # of broken channels: 0
09:29:26:ST3_smx:INFO:	List of broken channels: []
09:29:28:ST3_smx:INFO:	chip: 21-2 	 47.250730 C 	 1129.995435 mV
09:29:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:28:ST3_smx:INFO:		Electrons
09:29:28:ST3_smx:INFO:	# loops 0
09:29:30:ST3_smx:INFO:	# loops 1
09:29:33:ST3_smx:INFO:	# loops 2
09:29:35:ST3_smx:INFO:	Total # of broken channels: 0
09:29:35:ST3_smx:INFO:	List of broken channels: []
09:29:35:ST3_smx:INFO:	Total # of broken channels: 0
09:29:35:ST3_smx:INFO:	List of broken channels: []
09:29:37:ST3_smx:INFO:	chip: 28-3 	 31.389742 C 	 1177.390875 mV
09:29:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:37:ST3_smx:INFO:		Electrons
09:29:37:ST3_smx:INFO:	# loops 0
09:29:40:ST3_smx:INFO:	# loops 1
09:29:42:ST3_smx:INFO:	# loops 2
09:29:44:ST3_smx:INFO:	Total # of broken channels: 0
09:29:44:ST3_smx:INFO:	List of broken channels: []
09:29:44:ST3_smx:INFO:	Total # of broken channels: 0
09:29:44:ST3_smx:INFO:	List of broken channels: []
09:29:47:ST3_smx:INFO:	chip: 19-4 	 34.556970 C 	 1177.390875 mV
09:29:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:47:ST3_smx:INFO:		Electrons
09:29:47:ST3_smx:INFO:	# loops 0
09:29:49:ST3_smx:INFO:	# loops 1
09:29:51:ST3_smx:INFO:	# loops 2
09:29:53:ST3_smx:INFO:	Total # of broken channels: 0
09:29:53:ST3_smx:INFO:	List of broken channels: []
09:29:53:ST3_smx:INFO:	Total # of broken channels: 0
09:29:53:ST3_smx:INFO:	List of broken channels: []
09:29:55:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1177.390875 mV
09:29:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:29:55:ST3_smx:INFO:		Electrons
09:29:55:ST3_smx:INFO:	# loops 0
09:29:58:ST3_smx:INFO:	# loops 1
09:30:00:ST3_smx:INFO:	# loops 2
09:30:02:ST3_smx:INFO:	Total # of broken channels: 0
09:30:02:ST3_smx:INFO:	List of broken channels: []
09:30:02:ST3_smx:INFO:	Total # of broken channels: 0
09:30:02:ST3_smx:INFO:	List of broken channels: []
09:30:04:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1165.571835 mV
09:30:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:30:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:30:04:ST3_smx:INFO:		Electrons
09:30:04:ST3_smx:INFO:	# loops 0
09:30:07:ST3_smx:INFO:	# loops 1
09:30:09:ST3_smx:INFO:	# loops 2
09:30:11:ST3_smx:INFO:	Total # of broken channels: 0
09:30:11:ST3_smx:INFO:	List of broken channels: []
09:30:11:ST3_smx:INFO:	Total # of broken channels: 0
09:30:11:ST3_smx:INFO:	List of broken channels: []
09:30:13:ST3_smx:INFO:	chip: 24-7 	 34.556970 C 	 1171.483840 mV
09:30:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:30:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:30:13:ST3_smx:INFO:		Electrons
09:30:13:ST3_smx:INFO:	# loops 0
09:30:16:ST3_smx:INFO:	# loops 1
09:30:18:ST3_smx:INFO:	# loops 2
09:30:20:ST3_smx:INFO:	Total # of broken channels: 0
09:30:20:ST3_smx:INFO:	List of broken channels: []
09:30:20:ST3_smx:INFO:	Total # of broken channels: 0
09:30:20:ST3_smx:INFO:	List of broken channels: []
09:30:20:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:30:21:febtest:INFO:	23-00 | XA-000-09-004-012-002-018-04 |  25.1 | 1533.9
09:30:21:febtest:INFO:	30-01 | XA-000-09-004-012-004-008-06 |  28.2 | 1218.6
09:30:21:febtest:INFO:	21-02 | XA-000-09-004-012-002-017-04 |  47.3 | 1153.7
09:30:21:febtest:INFO:	28-03 | XA-000-09-004-012-004-009-06 |  34.6 | 1201.0
09:30:22:febtest:INFO:	19-04 | XA-000-09-004-012-006-009-05 |  37.7 | 1195.1
09:30:22:febtest:INFO:	26-05 | XA-000-09-004-012-005-009-11 |  34.6 | 1201.0
09:30:22:febtest:INFO:	17-06 | XA-000-09-004-012-006-010-05 |  40.9 | 1189.2
09:30:22:febtest:INFO:	24-07 | XA-000-09-004-012-005-010-11 |  34.6 | 1195.1
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_12_06-09_28_31
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2304| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.3580', '1.848', '2.3020']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0360', '1.850', '2.5730']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9960', '1.850', '0.5242']