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FEB_2306 06.01.25 10:56:53
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10:56:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:56:53:ST3_Shared:INFO: FEB-Microcable
10:56:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:56:53:febtest:INFO: Testing FEB with SN 2306
10:56:54:smx_tester:INFO: Scanning setup
10:56:54:elinks:INFO: Disabling clock on downlink 0
10:56:54:elinks:INFO: Disabling clock on downlink 1
10:56:54:elinks:INFO: Disabling clock on downlink 2
10:56:54:elinks:INFO: Disabling clock on downlink 3
10:56:54:elinks:INFO: Disabling clock on downlink 4
10:56:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:56:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:55:elinks:INFO: Disabling clock on downlink 0
10:56:55:elinks:INFO: Disabling clock on downlink 1
10:56:55:elinks:INFO: Disabling clock on downlink 2
10:56:55:elinks:INFO: Disabling clock on downlink 3
10:56:55:elinks:INFO: Disabling clock on downlink 4
10:56:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:56:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:55:elinks:INFO: Disabling clock on downlink 0
10:56:55:elinks:INFO: Disabling clock on downlink 1
10:56:55:elinks:INFO: Disabling clock on downlink 2
10:56:55:elinks:INFO: Disabling clock on downlink 3
10:56:55:elinks:INFO: Disabling clock on downlink 4
10:56:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:56:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:56:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:55:elinks:INFO: Disabling clock on downlink 0
10:56:55:elinks:INFO: Disabling clock on downlink 1
10:56:55:elinks:INFO: Disabling clock on downlink 2
10:56:55:elinks:INFO: Disabling clock on downlink 3
10:56:55:elinks:INFO: Disabling clock on downlink 4
10:56:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:56:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:55:elinks:INFO: Disabling clock on downlink 0
10:56:55:elinks:INFO: Disabling clock on downlink 1
10:56:55:elinks:INFO: Disabling clock on downlink 2
10:56:55:elinks:INFO: Disabling clock on downlink 3
10:56:55:elinks:INFO: Disabling clock on downlink 4
10:56:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:56:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:56:55:setup_element:INFO: Scanning clock phase
10:56:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:56:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:56:55:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:56:55:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
10:56:55:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
10:56:55:setup_element:INFO: Eye window for uplink 18: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:56:55:setup_element:INFO: Eye window for uplink 19: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:56:55:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:56:55:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:56:55:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
10:56:55:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
10:56:55:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:56:55:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:56:55:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
10:56:55:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
10:56:56:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
10:56:56:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
10:56:56:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:56:56:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:56:56:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
10:56:56:setup_element:INFO: Scanning data phases
10:56:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:56:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:57:01:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:57:01:setup_element:INFO: Eye window for uplink 16: XX___________________________________XXX
Data delay found: 19
10:57:01:setup_element:INFO: Eye window for uplink 17: ___________________________________XXXX_
Data delay found: 16
10:57:01:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX
Data delay found: 19
10:57:01:setup_element:INFO: Eye window for uplink 19: X__________________________________XXXXX
Data delay found: 17
10:57:01:setup_element:INFO: Eye window for uplink 20: XX___________________________________XXX
Data delay found: 19
10:57:01:setup_element:INFO: Eye window for uplink 21: XXX________________________XXXXXXXXXXXXX
Data delay found: 14
10:57:01:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
10:57:01:setup_element:INFO: Eye window for uplink 23: XXXX_____________________________XXXXXXX
Data delay found: 18
10:57:01:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
10:57:01:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
10:57:01:setup_element:INFO: Eye window for uplink 26: ___________XXXXX________________________
Data delay found: 33
10:57:01:setup_element:INFO: Eye window for uplink 27: _______________XXXXX____________________
Data delay found: 37
10:57:01:setup_element:INFO: Eye window for uplink 28: ___________XXXXXX________________XXXXXXX
Data delay found: 24
10:57:01:setup_element:INFO: Eye window for uplink 29: _____________XXXXXX______________XXXXXXX
Data delay found: 25
10:57:01:setup_element:INFO: Eye window for uplink 30: __________________XXXXXXX_______________
Data delay found: 1
10:57:01:setup_element:INFO: Eye window for uplink 31: __________________XXXXXXXX______________
Data delay found: 1
10:57:01:setup_element:INFO: Setting the data phase to 19 for uplink 16
10:57:01:setup_element:INFO: Setting the data phase to 16 for uplink 17
10:57:01:setup_element:INFO: Setting the data phase to 19 for uplink 18
10:57:01:setup_element:INFO: Setting the data phase to 17 for uplink 19
10:57:01:setup_element:INFO: Setting the data phase to 19 for uplink 20
10:57:01:setup_element:INFO: Setting the data phase to 14 for uplink 21
10:57:01:setup_element:INFO: Setting the data phase to 18 for uplink 22
10:57:01:setup_element:INFO: Setting the data phase to 18 for uplink 23
10:57:01:setup_element:INFO: Setting the data phase to 28 for uplink 24
10:57:01:setup_element:INFO: Setting the data phase to 30 for uplink 25
10:57:01:setup_element:INFO: Setting the data phase to 33 for uplink 26
10:57:01:setup_element:INFO: Setting the data phase to 37 for uplink 27
10:57:01:setup_element:INFO: Setting the data phase to 24 for uplink 28
10:57:01:setup_element:INFO: Setting the data phase to 25 for uplink 29
10:57:01:setup_element:INFO: Setting the data phase to 1 for uplink 30
10:57:01:setup_element:INFO: Setting the data phase to 1 for uplink 31
==============================================OOO==============================================
10:57:01:setup_element:INFO: Beginning SMX ASICs map scan
10:57:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:57:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:57:01:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:57:01:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:57:01:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:57:01:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:57:01:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:57:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:57:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:57:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:57:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:57:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:57:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:57:02:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:57:02:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:57:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:57:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:57:02:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:57:02:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:57:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:57:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:57:04:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 68
Eye Windows:
Uplink 16: ________________________________________________________________________________
Uplink 17: ________________________________________________________________________________
Uplink 18: ____________________________________________________________________XXXXXXXXX___
Uplink 19: ____________________________________________________________________XXXXXXXXX___
Uplink 20: ____________________________________________________________________XXXXXXXXX___
Uplink 21: ____________________________________________________________________XXXXXXXXX___
Uplink 22: ________________________________________________________________________________
Uplink 23: ________________________________________________________________________________
Uplink 24: ___________________________________________________________________XXXXXXXX_____
Uplink 25: ___________________________________________________________________XXXXXXXX_____
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: ________________________________________________________________________________
Uplink 29: ________________________________________________________________________________
Uplink 30: _______________________________________________________________________XXXXXXXX_
Uplink 31: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 17:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 18:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 19:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 20:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 21:
Optimal Phase: 14
Window Length: 24
Eye Window: XXX________________________XXXXXXXXXXXXX
Uplink 22:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 23:
Optimal Phase: 18
Window Length: 29
Eye Window: XXXX_____________________________XXXXXXX
Uplink 24:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 27:
Optimal Phase: 37
Window Length: 35
Eye Window: _______________XXXXX____________________
Uplink 28:
Optimal Phase: 24
Window Length: 16
Eye Window: ___________XXXXXX________________XXXXXXX
Uplink 29:
Optimal Phase: 25
Window Length: 14
Eye Window: _____________XXXXXX______________XXXXXXX
Uplink 30:
Optimal Phase: 1
Window Length: 33
Eye Window: __________________XXXXXXX_______________
Uplink 31:
Optimal Phase: 1
Window Length: 32
Eye Window: __________________XXXXXXXX______________
==============================================OOO==============================================
10:57:04:setup_element:INFO: Performing Elink synchronization
10:57:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:57:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:57:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:57:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:57:04:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:57:04:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:57:05:febtest:INFO: Init all SMX (CSA): 30
10:57:19:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:57:20:febtest:INFO: 23-00 | XA-000-09-004-006-013-011-01 | 34.6 | 1159.7
10:57:20:febtest:INFO: 30-01 | XA-000-09-004-007-003-017-07 | 40.9 | 1135.9
10:57:20:febtest:INFO: 21-02 | XA-000-09-004-007-003-018-07 | 37.7 | 1147.8
10:57:20:febtest:INFO: 28-03 | XA-000-09-004-006-013-009-01 | 31.4 | 1153.7
10:57:21:febtest:INFO: 19-04 | XA-000-09-004-006-014-011-15 | 34.6 | 1153.7
10:57:21:febtest:INFO: 26-05 | XA-000-09-004-007-002-017-10 | 31.4 | 1159.7
10:57:21:febtest:INFO: 17-06 | XA-000-09-004-006-013-010-01 | 31.4 | 1171.5
10:57:21:febtest:INFO: 24-07 | XA-000-09-004-006-014-009-15 | 31.4 | 1165.6
10:57:22:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:57:24:ST3_smx:INFO: chip: 23-0 34.556970 C 1171.483840 mV
10:57:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:24:ST3_smx:INFO: Electrons
10:57:24:ST3_smx:INFO: # loops 0
10:57:26:ST3_smx:INFO: # loops 1
10:57:28:ST3_smx:INFO: # loops 2
10:57:29:ST3_smx:INFO: Total # of broken channels: 3
10:57:29:ST3_smx:INFO: List of broken channels: [60, 124, 126]
10:57:29:ST3_smx:INFO: Total # of broken channels: 18
10:57:29:ST3_smx:INFO: List of broken channels: [4, 6, 8, 14, 16, 18, 22, 24, 36, 60, 70, 78, 86, 92, 104, 116, 124, 126]
10:57:31:ST3_smx:INFO: chip: 30-1 40.898880 C 1147.806000 mV
10:57:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:31:ST3_smx:INFO: Electrons
10:57:31:ST3_smx:INFO: # loops 0
10:57:33:ST3_smx:INFO: # loops 1
10:57:34:ST3_smx:INFO: # loops 2
10:57:36:ST3_smx:INFO: Total # of broken channels: 1
10:57:36:ST3_smx:INFO: List of broken channels: [15]
10:57:36:ST3_smx:INFO: Total # of broken channels: 61
10:57:36:ST3_smx:INFO: List of broken channels: [4, 6, 8, 10, 12, 14, 15, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122]
10:57:38:ST3_smx:INFO: chip: 21-2 37.726682 C 1159.654860 mV
10:57:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:38:ST3_smx:INFO: Electrons
10:57:38:ST3_smx:INFO: # loops 0
10:57:39:ST3_smx:INFO: # loops 1
10:57:41:ST3_smx:INFO: # loops 2
10:57:43:ST3_smx:INFO: Total # of broken channels: 76
10:57:43:ST3_smx:INFO: List of broken channels: [1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 23, 25, 27, 29, 30, 31, 32, 33, 35, 37, 39, 40, 41, 43, 44, 45, 46, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123]
10:57:43:ST3_smx:INFO: Total # of broken channels: 124
10:57:43:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 125]
10:57:44:ST3_smx:INFO: chip: 28-3 31.389742 C 1171.483840 mV
10:57:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:44:ST3_smx:INFO: Electrons
10:57:44:ST3_smx:INFO: # loops 0
10:57:46:ST3_smx:INFO: # loops 1
10:57:48:ST3_smx:INFO: # loops 2
10:57:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:49:ST3_smx:INFO: Total # of broken channels: 217
10:57:49:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 43, 44, 45, 46, 47, 48, 49, 50, 51, 53, 54, 55, 56, 57, 59, 60, 61, 63, 64, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123]
10:57:49:ST3_smx:INFO: Total # of broken channels: 240
10:57:49:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 69, 70, 71, 72, 73, 74, 75, 77, 78, 79, 80, 81, 83, 84, 85, 86, 87, 89, 91, 93, 95, 97, 98, 99, 100, 101, 103, 104, 105, 106, 107, 108, 109, 111, 113, 115, 116, 117, 119, 120, 121, 123, 125, 127]
10:57:51:ST3_smx:INFO: chip: 19-4 34.556970 C 1165.571835 mV
10:57:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:51:ST3_smx:INFO: Electrons
10:57:51:ST3_smx:INFO: # loops 0
10:57:52:ST3_smx:INFO: # loops 1
10:57:54:ST3_smx:INFO: # loops 2
10:57:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:56:ST3_smx:INFO: Total # of broken channels: 190
10:57:56:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
10:57:56:ST3_smx:INFO: Total # of broken channels: 220
10:57:56:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 1, 3, 4, 5, 6, 7, 8, 9, 11, 13, 14, 15, 16, 17, 18, 19, 20, 21, 23, 25, 27, 29, 30, 31, 33, 35, 36, 37, 39, 40, 41, 42, 43, 45, 47, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 61, 63, 65, 67, 69, 71, 73, 74, 75, 76, 77, 78, 79, 80, 81, 83, 84, 85, 87, 88, 89, 90, 91, 93, 95, 96, 97, 98, 99, 101, 103, 105, 106, 107, 109, 111, 112, 113, 115, 117, 119, 121, 122, 123, 125, 127]
10:57:57:ST3_smx:INFO: chip: 26-5 28.225000 C 1171.483840 mV
10:57:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:57:ST3_smx:INFO: Electrons
10:57:57:ST3_smx:INFO: # loops 0
10:57:59:ST3_smx:INFO: # loops 1
10:58:01:ST3_smx:INFO: # loops 2
10:58:02:ST3_smx:INFO: Total # of broken channels: 72
10:58:02:ST3_smx:INFO: List of broken channels: [1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 25, 27, 29, 30, 31, 32, 33, 35, 36, 37, 39, 40, 41, 42, 43, 45, 46, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115]
10:58:02:ST3_smx:INFO: Total # of broken channels: 118
10:58:02:ST3_smx:INFO: List of broken channels: [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 85, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 99, 100, 101, 102, 103, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 117, 118, 119, 120, 121, 123, 125]
10:58:04:ST3_smx:INFO: chip: 17-6 31.389742 C 1177.390875 mV
10:58:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:04:ST3_smx:INFO: Electrons
10:58:04:ST3_smx:INFO: # loops 0
10:58:06:ST3_smx:INFO: # loops 1
10:58:07:ST3_smx:INFO: # loops 2
10:58:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:09:ST3_smx:INFO: Total # of broken channels: 154
10:58:09:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 9, 11, 13, 15, 17, 19, 21, 23, 25, 31, 33, 35, 37, 39, 85, 87, 89, 91, 93, 97, 99, 103, 105, 109, 111, 113]
10:58:09:ST3_smx:INFO: Total # of broken channels: 224
10:58:09:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 67, 68, 69, 71, 73, 75, 76, 77, 78, 79, 81, 83, 84, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
10:58:10:ST3_smx:INFO: chip: 24-7 31.389742 C 1171.483840 mV
10:58:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:10:ST3_smx:INFO: Electrons
10:58:11:ST3_smx:INFO: # loops 0
10:58:12:ST3_smx:INFO: # loops 1
10:58:14:ST3_smx:INFO: # loops 2
10:58:15:ST3_smx:INFO: Total # of broken channels: 1
10:58:15:ST3_smx:INFO: List of broken channels: [37]
10:58:15:ST3_smx:INFO: Total # of broken channels: 79
10:58:15:ST3_smx:INFO: List of broken channels: [1, 3, 4, 5, 6, 7, 8, 9, 11, 13, 15, 16, 17, 19, 21, 22, 23, 25, 26, 27, 29, 31, 33, 35, 36, 37, 38, 39, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 59, 60, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123]
10:58:16:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:58:16:febtest:INFO: 23-00 | XA-000-09-004-006-013-011-01 | 34.6 | 1195.1
10:58:16:febtest:INFO: 30-01 | XA-000-09-004-007-003-017-07 | 40.9 | 1165.6
10:58:16:febtest:INFO: 21-02 | XA-000-09-004-007-003-018-07 | 37.7 | 1183.3
10:58:16:febtest:INFO: 28-03 | XA-000-09-004-006-013-009-01 | 31.4 | 1195.1
10:58:17:febtest:INFO: 19-04 | XA-000-09-004-006-014-011-15 | 34.6 | 1189.2
10:58:17:febtest:INFO: 26-05 | XA-000-09-004-007-002-017-10 | 31.4 | 1195.1
10:58:17:febtest:INFO: 17-06 | XA-000-09-004-006-013-010-01 | 34.6 | 1195.1
10:58:17:febtest:INFO: 24-07 | XA-000-09-004-006-014-009-15 | 31.4 | 1195.1
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_06-10_56_53
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2306| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : MUCH
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.6190', '1.848', '2.8370']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0060', '1.850', '2.5300']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9750', '1.850', '0.5235']