07:46:59:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:46:59:ST3_Shared:INFO:	                         FEB-Sensor                         
07:46:59:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:47:02:ST3_Shared:INFO:	STS mode selected
07:47:11:ST3_ModuleSelector:DEBUG:	M4UR1B2011312B2
07:47:11:ST3_ModuleSelector:DEBUG:	L4UR101131
07:47:11:ST3_ModuleSelector:DEBUG:	07292
07:47:11:ST3_ModuleSelector:DEBUG:	62x42
07:47:11:ST3_ModuleSelector:DEBUG:	A
07:47:11:ST3_ModuleSelector:DEBUG:	M4UR1B2011312B2
07:47:11:ST3_ModuleSelector:DEBUG:	L4UR101131
07:47:11:ST3_ModuleSelector:DEBUG:	07292
07:47:11:ST3_ModuleSelector:DEBUG:	62x42
07:47:11:ST3_ModuleSelector:DEBUG:	A
07:47:16:ST3_ModuleSelector:INFO:	M4UR1B2011312B2
07:47:16:ST3_ModuleSelector:INFO:	07292
07:47:16:febtest:INFO:	Testing FEB with SN 2308
07:47:18:smx_tester:INFO:	Scanning setup
07:47:18:elinks:INFO:	Disabling clock on downlink 0
07:47:18:elinks:INFO:	Disabling clock on downlink 1
07:47:18:elinks:INFO:	Disabling clock on downlink 2
07:47:18:elinks:INFO:	Disabling clock on downlink 3
07:47:18:elinks:INFO:	Disabling clock on downlink 4
07:47:18:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:47:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:47:18:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:47:18:elinks:INFO:	Disabling clock on downlink 0
07:47:18:elinks:INFO:	Disabling clock on downlink 1
07:47:18:elinks:INFO:	Disabling clock on downlink 2
07:47:18:elinks:INFO:	Disabling clock on downlink 3
07:47:18:elinks:INFO:	Disabling clock on downlink 4
07:47:18:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:47:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:47:18:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:47:18:elinks:INFO:	Disabling clock on downlink 0
07:47:18:elinks:INFO:	Disabling clock on downlink 1
07:47:18:elinks:INFO:	Disabling clock on downlink 2
07:47:18:elinks:INFO:	Disabling clock on downlink 3
07:47:18:elinks:INFO:	Disabling clock on downlink 4
07:47:18:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:47:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
07:47:18:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
07:47:18:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:47:18:elinks:INFO:	Disabling clock on downlink 0
07:47:18:elinks:INFO:	Disabling clock on downlink 1
07:47:18:elinks:INFO:	Disabling clock on downlink 2
07:47:18:elinks:INFO:	Disabling clock on downlink 3
07:47:18:elinks:INFO:	Disabling clock on downlink 4
07:47:18:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:47:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:47:18:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:47:18:elinks:INFO:	Disabling clock on downlink 0
07:47:18:elinks:INFO:	Disabling clock on downlink 1
07:47:18:elinks:INFO:	Disabling clock on downlink 2
07:47:18:elinks:INFO:	Disabling clock on downlink 3
07:47:18:elinks:INFO:	Disabling clock on downlink 4
07:47:18:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:47:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
07:47:18:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
07:47:18:setup_element:INFO:	Scanning clock phase
07:47:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:47:19:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:47:19:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
07:47:19:setup_element:INFO:	Eye window for uplink 16: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
07:47:19:setup_element:INFO:	Eye window for uplink 17: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
07:47:19:setup_element:INFO:	Eye window for uplink 18: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
07:47:19:setup_element:INFO:	Eye window for uplink 19: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
07:47:19:setup_element:INFO:	Eye window for uplink 20: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
07:47:19:setup_element:INFO:	Eye window for uplink 21: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
07:47:19:setup_element:INFO:	Eye window for uplink 22: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
07:47:19:setup_element:INFO:	Eye window for uplink 23: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
07:47:19:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
07:47:19:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
07:47:19:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
07:47:19:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
07:47:19:setup_element:INFO:	Eye window for uplink 28: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
07:47:19:setup_element:INFO:	Eye window for uplink 29: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
07:47:19:setup_element:INFO:	Eye window for uplink 30: ____________________________________________________________________XXXXXXXXXX__
Clock Delay: 32
07:47:19:setup_element:INFO:	Eye window for uplink 31: ____________________________________________________________________XXXXXXXXXX__
Clock Delay: 32
07:47:19:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 2
==============================================OOO==============================================
07:47:19:setup_element:INFO:	Scanning data phases
07:47:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:47:19:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:47:24:setup_element:INFO:	Data phase scan results for group 0, downlink 2
07:47:24:setup_element:INFO:	Eye window for uplink 16: XXXX_X_______________________________XXX
Data delay found: 21
07:47:24:setup_element:INFO:	Eye window for uplink 17: XXX_______________________________XXXXXX
Data delay found: 18
07:47:24:setup_element:INFO:	Eye window for uplink 18: XXXX________________________________XXXX
Data delay found: 19
07:47:24:setup_element:INFO:	Eye window for uplink 19: XXXX_____________________________XXXXXXX
Data delay found: 18
07:47:24:setup_element:INFO:	Eye window for uplink 20: X________________________________X_XXXXX
Data delay found: 16
07:47:24:setup_element:INFO:	Eye window for uplink 21: _________________________________XXXXXXX
Data delay found: 16
07:47:25:setup_element:INFO:	Eye window for uplink 22: XXX_______________________________XXXXXX
Data delay found: 18
07:47:25:setup_element:INFO:	Eye window for uplink 23: XXXXXX____________________________XXXXXX
Data delay found: 19
07:47:25:setup_element:INFO:	Eye window for uplink 24: ________XXXXXXX_________________________
Data delay found: 31
07:47:25:setup_element:INFO:	Eye window for uplink 25: ________XXXXXXXXX_______________________
Data delay found: 32
07:47:25:setup_element:INFO:	Eye window for uplink 26: ________XXXXXXX_________________________
Data delay found: 31
07:47:25:setup_element:INFO:	Eye window for uplink 27: ___________XXXXXXXX_____________________
Data delay found: 34
07:47:25:setup_element:INFO:	Eye window for uplink 28: _____________XXXXXX_____________________
Data delay found: 35
07:47:25:setup_element:INFO:	Eye window for uplink 29: ______________XXXXXXXX__________________
Data delay found: 37
07:47:25:setup_element:INFO:	Eye window for uplink 30: _______________XXXXXXXXXXX______________
Data delay found: 0
07:47:25:setup_element:INFO:	Eye window for uplink 31: _______________XXXXXXXXXXXX_____________
Data delay found: 0
07:47:25:setup_element:INFO:	Setting the data phase to 21 for uplink 16
07:47:25:setup_element:INFO:	Setting the data phase to 18 for uplink 17
07:47:25:setup_element:INFO:	Setting the data phase to 19 for uplink 18
07:47:25:setup_element:INFO:	Setting the data phase to 18 for uplink 19
07:47:25:setup_element:INFO:	Setting the data phase to 16 for uplink 20
07:47:25:setup_element:INFO:	Setting the data phase to 16 for uplink 21
07:47:25:setup_element:INFO:	Setting the data phase to 18 for uplink 22
07:47:25:setup_element:INFO:	Setting the data phase to 19 for uplink 23
07:47:25:setup_element:INFO:	Setting the data phase to 31 for uplink 24
07:47:25:setup_element:INFO:	Setting the data phase to 32 for uplink 25
07:47:25:setup_element:INFO:	Setting the data phase to 31 for uplink 26
07:47:25:setup_element:INFO:	Setting the data phase to 34 for uplink 27
07:47:25:setup_element:INFO:	Setting the data phase to 35 for uplink 28
07:47:25:setup_element:INFO:	Setting the data phase to 37 for uplink 29
07:47:25:setup_element:INFO:	Setting the data phase to 0 for uplink 30
07:47:25:setup_element:INFO:	Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
07:47:25:setup_element:INFO:	Beginning SMX ASICs map scan
07:47:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:47:25:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:47:25:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
07:47:25:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
07:47:25:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:47:25:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
07:47:25:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
07:47:25:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:47:25:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:47:25:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
07:47:25:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
07:47:25:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:47:25:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:47:25:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
07:47:25:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
07:47:26:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:47:26:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:47:26:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
07:47:26:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
07:47:26:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:47:26:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:47:27:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 68
    Eye Windows:
      Uplink 16: __________________________________________________________________XXXXXXXXX_____
      Uplink 17: __________________________________________________________________XXXXXXXXX_____
      Uplink 18: ___________________________________________________________________XXXXXXXXX____
      Uplink 19: ___________________________________________________________________XXXXXXXXX____
      Uplink 20: __________________________________________________________________XXXXXXXXX_____
      Uplink 21: __________________________________________________________________XXXXXXXXX_____
      Uplink 22: ___________________________________________________________________XXXXXXXXX____
      Uplink 23: ___________________________________________________________________XXXXXXXXX____
      Uplink 24: ___________________________________________________________________XXXXXXXX_____
      Uplink 25: ___________________________________________________________________XXXXXXXX_____
      Uplink 26: ___________________________________________________________________XXXXXXXX_____
      Uplink 27: ___________________________________________________________________XXXXXXXX_____
      Uplink 28: __________________________________________________________________XXXXXXXXX_____
      Uplink 29: __________________________________________________________________XXXXXXXXX_____
      Uplink 30: ____________________________________________________________________XXXXXXXXXX__
      Uplink 31: ____________________________________________________________________XXXXXXXXXX__
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 21
      Window Length: 31
      Eye Window: XXXX_X_______________________________XXX
    Uplink 17:
      Optimal Phase: 18
      Window Length: 31
      Eye Window: XXX_______________________________XXXXXX
    Uplink 18:
      Optimal Phase: 19
      Window Length: 32
      Eye Window: XXXX________________________________XXXX
    Uplink 19:
      Optimal Phase: 18
      Window Length: 29
      Eye Window: XXXX_____________________________XXXXXXX
    Uplink 20:
      Optimal Phase: 16
      Window Length: 32
      Eye Window: X________________________________X_XXXXX
    Uplink 21:
      Optimal Phase: 16
      Window Length: 33
      Eye Window: _________________________________XXXXXXX
    Uplink 22:
      Optimal Phase: 18
      Window Length: 31
      Eye Window: XXX_______________________________XXXXXX
    Uplink 23:
      Optimal Phase: 19
      Window Length: 28
      Eye Window: XXXXXX____________________________XXXXXX
    Uplink 24:
      Optimal Phase: 31
      Window Length: 33
      Eye Window: ________XXXXXXX_________________________
    Uplink 25:
      Optimal Phase: 32
      Window Length: 31
      Eye Window: ________XXXXXXXXX_______________________
    Uplink 26:
      Optimal Phase: 31
      Window Length: 33
      Eye Window: ________XXXXXXX_________________________
    Uplink 27:
      Optimal Phase: 34
      Window Length: 32
      Eye Window: ___________XXXXXXXX_____________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 32
      Eye Window: ______________XXXXXXXX__________________
    Uplink 30:
      Optimal Phase: 0
      Window Length: 29
      Eye Window: _______________XXXXXXXXXXX______________
    Uplink 31:
      Optimal Phase: 0
      Window Length: 28
      Eye Window: _______________XXXXXXXXXXXX_____________

==============================================OOO==============================================
07:47:27:setup_element:INFO:	Performing Elink synchronization
07:47:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:47:27:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:47:27:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
07:47:27:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
07:47:27:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
07:47:27:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
07:47:28:febtest:INFO:	Init all SMX (CSA): 30
07:47:42:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:47:42:febtest:INFO:	23-00 | XA-000-09-004-002-018-009-02 |  37.7 | 1141.9
07:47:43:febtest:INFO:	30-01 | XA-000-09-004-002-018-014-02 |  37.7 | 1141.9
07:47:43:febtest:INFO:	21-02 | XA-000-09-004-002-016-017-06 |  31.4 | 1159.7
07:47:43:febtest:INFO:	28-03 | XA-000-09-004-002-018-015-02 |  18.7 | 1206.9
07:47:43:febtest:INFO:	19-04 | XA-000-09-004-002-016-020-06 |  28.2 | 1171.5
07:47:43:febtest:INFO:	26-05 | XA-000-09-004-002-017-009-12 |  31.4 | 1165.6
07:47:44:febtest:INFO:	17-06 | XA-000-09-004-002-018-016-05 |  21.9 | 1212.7
07:47:44:febtest:INFO:	24-07 | XA-000-09-004-002-016-023-06 |  37.7 | 1141.9
07:47:45:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:47:47:ST3_smx:INFO:	chip: 23-0 	 37.726682 C 	 1147.806000 mV
07:47:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:47:ST3_smx:INFO:		Electrons
07:47:47:ST3_smx:INFO:	# loops 0
07:47:48:ST3_smx:INFO:	# loops 1
07:47:50:ST3_smx:INFO:	# loops 2
07:47:52:ST3_smx:INFO:	# loops 3
07:47:53:ST3_smx:INFO:	# loops 4
07:47:55:ST3_smx:INFO:	Total # of broken channels: 0
07:47:55:ST3_smx:INFO:	List of broken channels: []
07:47:55:ST3_smx:INFO:	Total # of broken channels: 0
07:47:55:ST3_smx:INFO:	List of broken channels: []
07:47:57:ST3_smx:INFO:	chip: 30-1 	 37.726682 C 	 1153.732915 mV
07:47:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:47:57:ST3_smx:INFO:		Electrons
07:47:57:ST3_smx:INFO:	# loops 0
07:47:58:ST3_smx:INFO:	# loops 1
07:48:00:ST3_smx:INFO:	# loops 2
07:48:01:ST3_smx:INFO:	# loops 3
07:48:03:ST3_smx:INFO:	# loops 4
07:48:04:ST3_smx:INFO:	Total # of broken channels: 0
07:48:04:ST3_smx:INFO:	List of broken channels: []
07:48:04:ST3_smx:INFO:	Total # of broken channels: 1
07:48:04:ST3_smx:INFO:	List of broken channels: [31]
07:48:06:ST3_smx:INFO:	chip: 21-2 	 31.389742 C 	 1171.483840 mV
07:48:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:06:ST3_smx:INFO:		Electrons
07:48:06:ST3_smx:INFO:	# loops 0
07:48:08:ST3_smx:INFO:	# loops 1
07:48:09:ST3_smx:INFO:	# loops 2
07:48:11:ST3_smx:INFO:	# loops 3
07:48:12:ST3_smx:INFO:	# loops 4
07:48:13:ST3_smx:INFO:	Total # of broken channels: 0
07:48:13:ST3_smx:INFO:	List of broken channels: []
07:48:13:ST3_smx:INFO:	Total # of broken channels: 0
07:48:13:ST3_smx:INFO:	List of broken channels: []
07:48:15:ST3_smx:INFO:	chip: 28-3 	 18.745682 C 	 1224.468235 mV
07:48:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:15:ST3_smx:INFO:		Electrons
07:48:15:ST3_smx:INFO:	# loops 0
07:48:17:ST3_smx:INFO:	# loops 1
07:48:18:ST3_smx:INFO:	# loops 2
07:48:20:ST3_smx:INFO:	# loops 3
07:48:21:ST3_smx:INFO:	# loops 4
07:48:23:ST3_smx:INFO:	Total # of broken channels: 0
07:48:23:ST3_smx:INFO:	List of broken channels: []
07:48:23:ST3_smx:INFO:	Total # of broken channels: 1
07:48:23:ST3_smx:INFO:	List of broken channels: [14]
07:48:25:ST3_smx:INFO:	chip: 19-4 	 28.225000 C 	 1183.292940 mV
07:48:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:25:ST3_smx:INFO:		Electrons
07:48:25:ST3_smx:INFO:	# loops 0
07:48:26:ST3_smx:INFO:	# loops 1
07:48:28:ST3_smx:INFO:	# loops 2
07:48:29:ST3_smx:INFO:	# loops 3
07:48:31:ST3_smx:INFO:	# loops 4
07:48:32:ST3_smx:INFO:	Total # of broken channels: 0
07:48:32:ST3_smx:INFO:	List of broken channels: []
07:48:32:ST3_smx:INFO:	Total # of broken channels: 0
07:48:32:ST3_smx:INFO:	List of broken channels: []
07:48:34:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1183.292940 mV
07:48:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:34:ST3_smx:INFO:		Electrons
07:48:34:ST3_smx:INFO:	# loops 0
07:48:36:ST3_smx:INFO:	# loops 1
07:48:37:ST3_smx:INFO:	# loops 2
07:48:39:ST3_smx:INFO:	# loops 3
07:48:40:ST3_smx:INFO:	# loops 4
07:48:42:ST3_smx:INFO:	Total # of broken channels: 0
07:48:42:ST3_smx:INFO:	List of broken channels: []
07:48:42:ST3_smx:INFO:	Total # of broken channels: 0
07:48:42:ST3_smx:INFO:	List of broken channels: []
07:48:43:ST3_smx:INFO:	chip: 17-6 	 21.902970 C 	 1230.330540 mV
07:48:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:43:ST3_smx:INFO:		Electrons
07:48:43:ST3_smx:INFO:	# loops 0
07:48:45:ST3_smx:INFO:	# loops 1
07:48:46:ST3_smx:INFO:	# loops 2
07:48:48:ST3_smx:INFO:	# loops 3
07:48:49:ST3_smx:INFO:	# loops 4
07:48:51:ST3_smx:INFO:	Total # of broken channels: 0
07:48:51:ST3_smx:INFO:	List of broken channels: []
07:48:51:ST3_smx:INFO:	Total # of broken channels: 0
07:48:51:ST3_smx:INFO:	List of broken channels: []
07:48:53:ST3_smx:INFO:	chip: 24-7 	 40.898880 C 	 1153.732915 mV
07:48:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:53:ST3_smx:INFO:		Electrons
07:48:53:ST3_smx:INFO:	# loops 0
07:48:54:ST3_smx:INFO:	# loops 1
07:48:56:ST3_smx:INFO:	# loops 2
07:48:57:ST3_smx:INFO:	# loops 3
07:48:59:ST3_smx:INFO:	# loops 4
07:49:00:ST3_smx:INFO:	Total # of broken channels: 0
07:49:00:ST3_smx:INFO:	List of broken channels: []
07:49:00:ST3_smx:INFO:	Total # of broken channels: 1
07:49:00:ST3_smx:INFO:	List of broken channels: [126]
07:49:01:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:49:01:febtest:INFO:	23-00 | XA-000-09-004-002-018-009-02 |  37.7 | 1171.5
07:49:01:febtest:INFO:	30-01 | XA-000-09-004-002-018-014-02 |  37.7 | 1177.4
07:49:01:febtest:INFO:	21-02 | XA-000-09-004-002-016-017-06 |  31.4 | 1189.2
07:49:02:febtest:INFO:	28-03 | XA-000-09-004-002-018-015-02 |  18.7 | 1242.0
07:49:02:febtest:INFO:	19-04 | XA-000-09-004-002-016-020-06 |  31.4 | 1206.9
07:49:02:febtest:INFO:	26-05 | XA-000-09-004-002-017-009-12 |  31.4 | 1201.0
07:49:02:febtest:INFO:	17-06 | XA-000-09-004-002-018-016-05 |  18.7 | 1265.4
07:49:03:febtest:INFO:	24-07 | XA-000-09-004-002-016-023-06 |  40.9 | 1171.5
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_01_15-07_46_59
OPERATOR  : Robert V.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2308| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 07292 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M4UR1B2011312B2
LADDER_NAME: L4UR101131
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.3860', '1.848', '1.9990']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9890', '1.850', '2.4430']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9590', '1.850', '0.5220']