Go Back
FEB_2309 06.12.24 13:16:23
TextEdit.txt
13:16:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:16:23:ST3_Shared:INFO: FEB-Microcable
13:16:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:16:25:ST3_Shared:INFO: STS mode selected
13:16:25:febtest:INFO: Testing FEB with SN 2309
13:16:26:smx_tester:INFO: Scanning setup
13:16:26:elinks:INFO: Disabling clock on downlink 0
13:16:26:elinks:INFO: Disabling clock on downlink 1
13:16:26:elinks:INFO: Disabling clock on downlink 2
13:16:26:elinks:INFO: Disabling clock on downlink 3
13:16:26:elinks:INFO: Disabling clock on downlink 4
13:16:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:16:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:27:elinks:INFO: Disabling clock on downlink 0
13:16:27:elinks:INFO: Disabling clock on downlink 1
13:16:27:elinks:INFO: Disabling clock on downlink 2
13:16:27:elinks:INFO: Disabling clock on downlink 3
13:16:27:elinks:INFO: Disabling clock on downlink 4
13:16:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:16:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:27:elinks:INFO: Disabling clock on downlink 0
13:16:27:elinks:INFO: Disabling clock on downlink 1
13:16:27:elinks:INFO: Disabling clock on downlink 2
13:16:27:elinks:INFO: Disabling clock on downlink 3
13:16:27:elinks:INFO: Disabling clock on downlink 4
13:16:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:16:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:16:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:27:elinks:INFO: Disabling clock on downlink 0
13:16:27:elinks:INFO: Disabling clock on downlink 1
13:16:27:elinks:INFO: Disabling clock on downlink 2
13:16:27:elinks:INFO: Disabling clock on downlink 3
13:16:27:elinks:INFO: Disabling clock on downlink 4
13:16:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:16:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:27:elinks:INFO: Disabling clock on downlink 0
13:16:27:elinks:INFO: Disabling clock on downlink 1
13:16:27:elinks:INFO: Disabling clock on downlink 2
13:16:27:elinks:INFO: Disabling clock on downlink 3
13:16:27:elinks:INFO: Disabling clock on downlink 4
13:16:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:16:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:16:27:setup_element:INFO: Scanning clock phase
13:16:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:16:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:16:28:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:16:28:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:16:28:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:16:28:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:16:28:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:16:28:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:16:28:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:16:28:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:16:28:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:16:28:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
13:16:28:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
13:16:28:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
13:16:28:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
13:16:28:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:16:28:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:16:28:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:16:28:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:16:28:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
13:16:28:setup_element:INFO: Scanning data phases
13:16:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:16:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:16:33:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:16:33:setup_element:INFO: Eye window for uplink 16: ___________________________________XXXXX
Data delay found: 17
13:16:33:setup_element:INFO: Eye window for uplink 17: _________________________________XXXX___
Data delay found: 14
13:16:33:setup_element:INFO: Eye window for uplink 18: XX_________________________________XXXXX
Data delay found: 18
13:16:33:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXXX_
Data delay found: 15
13:16:33:setup_element:INFO: Eye window for uplink 20: X__________________________________XXXXX
Data delay found: 17
13:16:33:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
13:16:33:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXXX
Data delay found: 17
13:16:33:setup_element:INFO: Eye window for uplink 23: XXXXX____________________________XXXXXXX
Data delay found: 18
13:16:33:setup_element:INFO: Eye window for uplink 24: ________XXXXX___________________________
Data delay found: 30
13:16:33:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
13:16:33:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
13:16:33:setup_element:INFO: Eye window for uplink 27: __________XXXXX_________________________
Data delay found: 32
13:16:33:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
13:16:33:setup_element:INFO: Eye window for uplink 29: ______________XXXXXX____________________
Data delay found: 36
13:16:33:setup_element:INFO: Eye window for uplink 30: _________________XXXXX__________________
Data delay found: 39
13:16:33:setup_element:INFO: Eye window for uplink 31: _________________XXXXXX_________________
Data delay found: 39
13:16:33:setup_element:INFO: Setting the data phase to 17 for uplink 16
13:16:33:setup_element:INFO: Setting the data phase to 14 for uplink 17
13:16:33:setup_element:INFO: Setting the data phase to 18 for uplink 18
13:16:33:setup_element:INFO: Setting the data phase to 15 for uplink 19
13:16:33:setup_element:INFO: Setting the data phase to 17 for uplink 20
13:16:33:setup_element:INFO: Setting the data phase to 16 for uplink 21
13:16:33:setup_element:INFO: Setting the data phase to 17 for uplink 22
13:16:33:setup_element:INFO: Setting the data phase to 18 for uplink 23
13:16:33:setup_element:INFO: Setting the data phase to 30 for uplink 24
13:16:33:setup_element:INFO: Setting the data phase to 32 for uplink 25
13:16:33:setup_element:INFO: Setting the data phase to 29 for uplink 26
13:16:33:setup_element:INFO: Setting the data phase to 32 for uplink 27
13:16:33:setup_element:INFO: Setting the data phase to 34 for uplink 28
13:16:33:setup_element:INFO: Setting the data phase to 36 for uplink 29
13:16:33:setup_element:INFO: Setting the data phase to 39 for uplink 30
13:16:33:setup_element:INFO: Setting the data phase to 39 for uplink 31
==============================================OOO==============================================
13:16:33:setup_element:INFO: Beginning SMX ASICs map scan
13:16:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:16:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:16:33:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:16:33:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:16:33:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:16:33:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:16:33:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:16:33:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:16:33:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:16:33:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:16:33:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:16:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:16:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:16:34:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:16:34:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:16:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:16:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:16:34:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:16:34:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:16:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:16:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:16:36:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXX____
Uplink 17: _____________________________________________________________________XXXXXXX____
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: ____________________________________________________________________XXXXXXXXX___
Uplink 21: ____________________________________________________________________XXXXXXXXX___
Uplink 22: _____________________________________________________________________XXXXXXX____
Uplink 23: _____________________________________________________________________XXXXXXX____
Uplink 24: ________________________________________________________________________________
Uplink 25: ________________________________________________________________________________
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: _____________________________________________________________________XXXXXXXXX__
Uplink 31: _____________________________________________________________________XXXXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 17:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 18:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 19:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 20:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 21:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 22:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 23:
Optimal Phase: 18
Window Length: 28
Eye Window: XXXXX____________________________XXXXXXX
Uplink 24:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 25:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 28:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 29:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 30:
Optimal Phase: 39
Window Length: 35
Eye Window: _________________XXXXX__________________
Uplink 31:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
==============================================OOO==============================================
13:16:36:setup_element:INFO: Performing Elink synchronization
13:16:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:16:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:16:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:16:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
13:16:36:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:16:36:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:16:36:febtest:INFO: Init all SMX (CSA): 30
13:16:51:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:16:51:febtest:INFO: 23-00 | XA-000-09-004-012-008-024-11 | 28.2 | 1195.1
13:16:52:febtest:INFO: 30-01 | XA-000-09-004-012-007-017-15 | 47.3 | 1118.1
13:16:52:febtest:INFO: 21-02 | XA-000-09-004-012-009-024-06 | 28.2 | 1189.2
13:16:52:febtest:INFO: 28-03 | XA-000-09-004-012-009-018-06 | 47.3 | 1112.1
13:16:52:febtest:INFO: 19-04 | XA-000-09-004-002-011-003-15 | 40.9 | 1153.7
13:16:53:febtest:INFO: 26-05 | XA-000-09-004-012-008-018-11 | 37.7 | 1147.8
13:16:53:febtest:INFO: 17-06 | XA-000-09-004-012-007-015-08 | 50.4 | 1124.0
13:16:53:febtest:INFO: 24-07 | XA-000-09-004-012-008-017-11 | 50.4 | 1106.2
13:16:54:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:16:56:ST3_smx:INFO: chip: 23-0 28.225000 C 1206.851500 mV
13:16:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:16:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:16:56:ST3_smx:INFO: Electrons
13:16:56:ST3_smx:INFO: # loops 0
13:16:58:ST3_smx:INFO: # loops 1
13:16:59:ST3_smx:INFO: # loops 2
13:17:01:ST3_smx:INFO: Total # of broken channels: 0
13:17:01:ST3_smx:INFO: List of broken channels: []
13:17:01:ST3_smx:INFO: Total # of broken channels: 0
13:17:01:ST3_smx:INFO: List of broken channels: []
13:17:03:ST3_smx:INFO: chip: 30-1 47.250730 C 1135.937260 mV
13:17:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:03:ST3_smx:INFO: Electrons
13:17:03:ST3_smx:INFO: # loops 0
13:17:05:ST3_smx:INFO: # loops 1
13:17:06:ST3_smx:INFO: # loops 2
13:17:08:ST3_smx:INFO: Total # of broken channels: 0
13:17:08:ST3_smx:INFO: List of broken channels: []
13:17:08:ST3_smx:INFO: Total # of broken channels: 0
13:17:08:ST3_smx:INFO: List of broken channels: []
13:17:10:ST3_smx:INFO: chip: 21-2 28.225000 C 1200.969315 mV
13:17:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:10:ST3_smx:INFO: Electrons
13:17:10:ST3_smx:INFO: # loops 0
13:17:11:ST3_smx:INFO: # loops 1
13:17:13:ST3_smx:INFO: # loops 2
13:17:15:ST3_smx:INFO: Total # of broken channels: 0
13:17:15:ST3_smx:INFO: List of broken channels: []
13:17:15:ST3_smx:INFO: Total # of broken channels: 18
13:17:15:ST3_smx:INFO: List of broken channels: [82, 84, 86, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120]
13:17:17:ST3_smx:INFO: chip: 28-3 47.250730 C 1129.995435 mV
13:17:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:17:ST3_smx:INFO: Electrons
13:17:17:ST3_smx:INFO: # loops 0
13:17:18:ST3_smx:INFO: # loops 1
13:17:20:ST3_smx:INFO: # loops 2
13:17:22:ST3_smx:INFO: Total # of broken channels: 0
13:17:22:ST3_smx:INFO: List of broken channels: []
13:17:22:ST3_smx:INFO: Total # of broken channels: 0
13:17:22:ST3_smx:INFO: List of broken channels: []
13:17:23:ST3_smx:INFO: chip: 19-4 40.898880 C 1159.654860 mV
13:17:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:23:ST3_smx:INFO: Electrons
13:17:24:ST3_smx:INFO: # loops 0
13:17:25:ST3_smx:INFO: # loops 1
13:17:27:ST3_smx:INFO: # loops 2
13:17:29:ST3_smx:INFO: Total # of broken channels: 0
13:17:29:ST3_smx:INFO: List of broken channels: []
13:17:29:ST3_smx:INFO: Total # of broken channels: 0
13:17:29:ST3_smx:INFO: List of broken channels: []
13:17:30:ST3_smx:INFO: chip: 26-5 37.726682 C 1159.654860 mV
13:17:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:30:ST3_smx:INFO: Electrons
13:17:30:ST3_smx:INFO: # loops 0
13:17:32:ST3_smx:INFO: # loops 1
13:17:35:ST3_smx:INFO: # loops 2
13:17:38:ST3_smx:INFO: Total # of broken channels: 0
13:17:38:ST3_smx:INFO: List of broken channels: []
13:17:38:ST3_smx:INFO: Total # of broken channels: 0
13:17:38:ST3_smx:INFO: List of broken channels: []
13:17:40:ST3_smx:INFO: chip: 17-6 50.430383 C 1129.995435 mV
13:17:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:40:ST3_smx:INFO: Electrons
13:17:40:ST3_smx:INFO: # loops 0
13:17:41:ST3_smx:INFO: # loops 1
13:17:43:ST3_smx:INFO: # loops 2
13:17:45:ST3_smx:INFO: Total # of broken channels: 0
13:17:45:ST3_smx:INFO: List of broken channels: []
13:17:45:ST3_smx:INFO: Total # of broken channels: 0
13:17:45:ST3_smx:INFO: List of broken channels: []
13:17:47:ST3_smx:INFO: chip: 24-7 50.430383 C 1118.096875 mV
13:17:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:17:47:ST3_smx:INFO: Electrons
13:17:47:ST3_smx:INFO: # loops 0
13:17:49:ST3_smx:INFO: # loops 1
13:17:51:ST3_smx:INFO: # loops 2
13:17:52:ST3_smx:INFO: Total # of broken channels: 0
13:17:52:ST3_smx:INFO: List of broken channels: []
13:17:52:ST3_smx:INFO: Total # of broken channels: 0
13:17:52:ST3_smx:INFO: List of broken channels: []
13:17:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:17:53:febtest:INFO: 23-00 | XA-000-09-004-012-008-024-11 | 28.2 | 1224.5
13:17:53:febtest:INFO: 30-01 | XA-000-09-004-012-007-017-15 | 47.3 | 1171.5
13:17:53:febtest:INFO: 21-02 | XA-000-09-004-012-009-024-06 | 31.4 | 1218.6
13:17:54:febtest:INFO: 28-03 | XA-000-09-004-012-009-018-06 | 47.3 | 1147.8
13:17:54:febtest:INFO: 19-04 | XA-000-09-004-002-011-003-15 | 40.9 | 1183.3
13:17:54:febtest:INFO: 26-05 | XA-000-09-004-012-008-018-11 | 37.7 | 1177.4
13:17:54:febtest:INFO: 17-06 | XA-000-09-004-012-007-015-08 | 50.4 | 1153.7
13:17:55:febtest:INFO: 24-07 | XA-000-09-004-012-008-017-11 | 50.4 | 1135.9
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_12_06-13_16_23
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2309| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5160', '1.848', '2.5110']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0500', '1.849', '2.5070']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0000', '1.850', '0.5314']