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FEB_2310 21.01.25 10:44:30
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10:44:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:44:30:ST3_Shared:INFO: FEB-Sensor
10:44:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:44:57:ST3_ModuleSelector:DEBUG: M4UR5B1011331B2
10:44:57:ST3_ModuleSelector:DEBUG:
10:44:57:ST3_ModuleSelector:DEBUG:
10:44:57:ST3_ModuleSelector:DEBUG:
10:44:57:ST3_ModuleSelector:DEBUG:
10:44:57:ST3_ModuleSelector:DEBUG: M4UR5B1011331B2
10:44:57:ST3_ModuleSelector:DEBUG:
10:44:57:ST3_ModuleSelector:DEBUG:
10:44:57:ST3_ModuleSelector:DEBUG:
10:44:57:ST3_ModuleSelector:DEBUG:
10:45:17:ST3_ModuleSelector:DEBUG: M4UR5B1011331B2
10:45:17:ST3_ModuleSelector:DEBUG:
10:45:17:ST3_ModuleSelector:DEBUG:
10:45:17:ST3_ModuleSelector:DEBUG:
10:45:17:ST3_ModuleSelector:DEBUG:
10:45:21:ST3_ModuleSelector:DEBUG: M4UR5B1011331B2
10:45:21:ST3_ModuleSelector:DEBUG:
10:45:21:ST3_ModuleSelector:DEBUG: 17143
10:45:21:ST3_ModuleSelector:DEBUG:
10:45:21:ST3_ModuleSelector:DEBUG:
10:45:30:ST3_ModuleSelector:INFO: M4UR5B1011331B2
10:45:30:ST3_ModuleSelector:INFO: 17143
10:45:31:febtest:INFO: Testing FEB with SN 2310
10:45:32:smx_tester:INFO: Scanning setup
10:45:32:elinks:INFO: Disabling clock on downlink 0
10:45:32:elinks:INFO: Disabling clock on downlink 1
10:45:32:elinks:INFO: Disabling clock on downlink 2
10:45:32:elinks:INFO: Disabling clock on downlink 3
10:45:32:elinks:INFO: Disabling clock on downlink 4
10:45:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:45:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:45:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:45:32:elinks:INFO: Disabling clock on downlink 0
10:45:32:elinks:INFO: Disabling clock on downlink 1
10:45:32:elinks:INFO: Disabling clock on downlink 2
10:45:32:elinks:INFO: Disabling clock on downlink 3
10:45:32:elinks:INFO: Disabling clock on downlink 4
10:45:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:45:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:45:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:45:32:elinks:INFO: Disabling clock on downlink 0
10:45:32:elinks:INFO: Disabling clock on downlink 1
10:45:32:elinks:INFO: Disabling clock on downlink 2
10:45:32:elinks:INFO: Disabling clock on downlink 3
10:45:32:elinks:INFO: Disabling clock on downlink 4
10:45:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:45:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:45:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:45:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:45:33:elinks:INFO: Disabling clock on downlink 0
10:45:33:elinks:INFO: Disabling clock on downlink 1
10:45:33:elinks:INFO: Disabling clock on downlink 2
10:45:33:elinks:INFO: Disabling clock on downlink 3
10:45:33:elinks:INFO: Disabling clock on downlink 4
10:45:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:45:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:45:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:45:33:elinks:INFO: Disabling clock on downlink 0
10:45:33:elinks:INFO: Disabling clock on downlink 1
10:45:33:elinks:INFO: Disabling clock on downlink 2
10:45:33:elinks:INFO: Disabling clock on downlink 3
10:45:33:elinks:INFO: Disabling clock on downlink 4
10:45:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:45:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:45:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:45:33:setup_element:INFO: Scanning clock phase
10:45:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:45:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:45:33:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:45:33:setup_element:INFO: Eye window for uplink 16: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
10:45:33:setup_element:INFO: Eye window for uplink 17: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
10:45:33:setup_element:INFO: Eye window for uplink 18: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:45:33:setup_element:INFO: Eye window for uplink 19: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:45:33:setup_element:INFO: Eye window for uplink 20: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
10:45:33:setup_element:INFO: Eye window for uplink 21: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
10:45:33:setup_element:INFO: Eye window for uplink 22: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
10:45:33:setup_element:INFO: Eye window for uplink 23: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
10:45:33:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXXXXXX____
Clock Delay: 30
10:45:33:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXXXXXX____
Clock Delay: 30
10:45:33:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
10:45:33:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
10:45:33:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:45:33:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:45:33:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXXXXXXX___
Clock Delay: 31
10:45:33:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXXXXXXX___
Clock Delay: 31
10:45:33:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 2
==============================================OOO==============================================
10:45:33:setup_element:INFO: Scanning data phases
10:45:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:45:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:45:39:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:45:39:setup_element:INFO: Eye window for uplink 16: X_______________________________XXXXXXXX
Data delay found: 16
10:45:39:setup_element:INFO: Eye window for uplink 17: ______________________________XXXXXXXXX_
Data delay found: 14
10:45:39:setup_element:INFO: Eye window for uplink 18: XXXXX______________________________XXXXX
Data delay found: 19
10:45:39:setup_element:INFO: Eye window for uplink 19: XXXX____________________________XXXXXXXX
Data delay found: 17
10:45:39:setup_element:INFO: Eye window for uplink 20: XXX________________________________XXXXX
Data delay found: 18
10:45:39:setup_element:INFO: Eye window for uplink 21: XX_______________________________XXXXXXX
Data delay found: 17
10:45:39:setup_element:INFO: Eye window for uplink 22: XXX______________________________XXXXXXX
Data delay found: 17
10:45:39:setup_element:INFO: Eye window for uplink 23: XXXXXX___________________________XXXXXXX
Data delay found: 19
10:45:39:setup_element:INFO: Eye window for uplink 24: _____XXXXXXXXXX_________________________
Data delay found: 29
10:45:39:setup_element:INFO: Eye window for uplink 25: ______XXXXXXXXXXXX______________________
Data delay found: 31
10:45:39:setup_element:INFO: Eye window for uplink 26: _______XXXXXXXXXXX______________________
Data delay found: 32
10:45:39:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXXXXXX__________________
Data delay found: 36
10:45:39:setup_element:INFO: Eye window for uplink 28: ______________XXXXXXXXXX________________
Data delay found: 38
10:45:39:setup_element:INFO: Eye window for uplink 29: _________________XXXXXXXXX______________
Data delay found: 1
10:45:39:setup_element:INFO: Eye window for uplink 30: _______________XXXXXXXXXXX______________
Data delay found: 0
10:45:39:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXXXXX______________
Data delay found: 0
10:45:39:setup_element:INFO: Setting the data phase to 16 for uplink 16
10:45:39:setup_element:INFO: Setting the data phase to 14 for uplink 17
10:45:39:setup_element:INFO: Setting the data phase to 19 for uplink 18
10:45:39:setup_element:INFO: Setting the data phase to 17 for uplink 19
10:45:39:setup_element:INFO: Setting the data phase to 18 for uplink 20
10:45:39:setup_element:INFO: Setting the data phase to 17 for uplink 21
10:45:39:setup_element:INFO: Setting the data phase to 17 for uplink 22
10:45:39:setup_element:INFO: Setting the data phase to 19 for uplink 23
10:45:39:setup_element:INFO: Setting the data phase to 29 for uplink 24
10:45:39:setup_element:INFO: Setting the data phase to 31 for uplink 25
10:45:39:setup_element:INFO: Setting the data phase to 32 for uplink 26
10:45:39:setup_element:INFO: Setting the data phase to 36 for uplink 27
10:45:39:setup_element:INFO: Setting the data phase to 38 for uplink 28
10:45:39:setup_element:INFO: Setting the data phase to 1 for uplink 29
10:45:39:setup_element:INFO: Setting the data phase to 0 for uplink 30
10:45:39:setup_element:INFO: Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
10:45:39:setup_element:INFO: Beginning SMX ASICs map scan
10:45:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:45:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:45:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:45:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:45:39:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:45:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:45:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:45:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:45:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:45:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:45:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:45:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:45:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:45:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:45:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:45:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:45:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:45:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:45:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:45:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:45:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:45:42:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 30
Window Length: 68
Eye Windows:
Uplink 16: _________________________________________________________________XXXXXXXXX______
Uplink 17: _________________________________________________________________XXXXXXXXX______
Uplink 18: ___________________________________________________________________XXXXXXXX_____
Uplink 19: ___________________________________________________________________XXXXXXXX_____
Uplink 20: __________________________________________________________________XXXXXXXXX_____
Uplink 21: __________________________________________________________________XXXXXXXXX_____
Uplink 22: _________________________________________________________________XXXXXXXXX______
Uplink 23: _________________________________________________________________XXXXXXXXX______
Uplink 24: __________________________________________________________________XXXXXXXXXX____
Uplink 25: __________________________________________________________________XXXXXXXXXX____
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: ____________________________________________________________________XXXXXXXXX___
Uplink 29: ____________________________________________________________________XXXXXXXXX___
Uplink 30: ___________________________________________________________________XXXXXXXXXX___
Uplink 31: ___________________________________________________________________XXXXXXXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 16
Window Length: 31
Eye Window: X_______________________________XXXXXXXX
Uplink 17:
Optimal Phase: 14
Window Length: 31
Eye Window: ______________________________XXXXXXXXX_
Uplink 18:
Optimal Phase: 19
Window Length: 30
Eye Window: XXXXX______________________________XXXXX
Uplink 19:
Optimal Phase: 17
Window Length: 28
Eye Window: XXXX____________________________XXXXXXXX
Uplink 20:
Optimal Phase: 18
Window Length: 32
Eye Window: XXX________________________________XXXXX
Uplink 21:
Optimal Phase: 17
Window Length: 31
Eye Window: XX_______________________________XXXXXXX
Uplink 22:
Optimal Phase: 17
Window Length: 30
Eye Window: XXX______________________________XXXXXXX
Uplink 23:
Optimal Phase: 19
Window Length: 27
Eye Window: XXXXXX___________________________XXXXXXX
Uplink 24:
Optimal Phase: 29
Window Length: 30
Eye Window: _____XXXXXXXXXX_________________________
Uplink 25:
Optimal Phase: 31
Window Length: 28
Eye Window: ______XXXXXXXXXXXX______________________
Uplink 26:
Optimal Phase: 32
Window Length: 29
Eye Window: _______XXXXXXXXXXX______________________
Uplink 27:
Optimal Phase: 36
Window Length: 29
Eye Window: ___________XXXXXXXXXXX__________________
Uplink 28:
Optimal Phase: 38
Window Length: 30
Eye Window: ______________XXXXXXXXXX________________
Uplink 29:
Optimal Phase: 1
Window Length: 31
Eye Window: _________________XXXXXXXXX______________
Uplink 30:
Optimal Phase: 0
Window Length: 29
Eye Window: _______________XXXXXXXXXXX______________
Uplink 31:
Optimal Phase: 0
Window Length: 30
Eye Window: ________________XXXXXXXXXX______________
==============================================OOO==============================================
10:45:42:setup_element:INFO: Performing Elink synchronization
10:45:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:45:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:45:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:45:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:45:42:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:45:42:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:45:43:febtest:INFO: Init all SMX (CSA): 30
10:45:57:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:45:57:febtest:INFO: 23-00 | XA-000-09-004-006-015-010-02 | 31.4 | 1177.4
10:45:58:febtest:INFO: 30-01 | XA-000-09-004-006-016-007-10 | 28.2 | 1195.1
10:45:58:febtest:INFO: 21-02 | XA-000-09-004-006-016-011-10 | 37.7 | 1147.8
10:45:58:febtest:INFO: 28-03 | XA-000-09-004-006-018-011-09 | 37.7 | 1165.6
10:45:58:febtest:INFO: 19-04 | XA-000-09-004-006-017-011-07 | 34.6 | 1183.3
10:45:58:febtest:INFO: 26-05 | XA-000-09-004-006-018-010-09 | 37.7 | 1153.7
10:45:59:febtest:INFO: 17-06 | XA-000-09-004-006-014-010-15 | 21.9 | 1212.7
10:45:59:febtest:INFO: 24-07 | XA-000-09-004-006-017-010-07 | 34.6 | 1165.6
10:46:00:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:46:02:ST3_smx:INFO: chip: 23-0 31.389742 C 1183.292940 mV
10:46:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:02:ST3_smx:INFO: Electrons
10:46:02:ST3_smx:INFO: # loops 0
10:46:03:ST3_smx:INFO: # loops 1
10:46:05:ST3_smx:INFO: # loops 2
10:46:07:ST3_smx:INFO: # loops 3
10:46:08:ST3_smx:INFO: # loops 4
10:46:10:ST3_smx:INFO: Total # of broken channels: 0
10:46:10:ST3_smx:INFO: List of broken channels: []
10:46:10:ST3_smx:INFO: Total # of broken channels: 0
10:46:10:ST3_smx:INFO: List of broken channels: []
10:46:12:ST3_smx:INFO: chip: 30-1 28.225000 C 1206.851500 mV
10:46:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:12:ST3_smx:INFO: Electrons
10:46:12:ST3_smx:INFO: # loops 0
10:46:13:ST3_smx:INFO: # loops 1
10:46:15:ST3_smx:INFO: # loops 2
10:46:17:ST3_smx:INFO: # loops 3
10:46:18:ST3_smx:INFO: # loops 4
10:46:20:ST3_smx:INFO: Total # of broken channels: 1
10:46:20:ST3_smx:INFO: List of broken channels: [119]
10:46:20:ST3_smx:INFO: Total # of broken channels: 1
10:46:20:ST3_smx:INFO: List of broken channels: [119]
10:46:22:ST3_smx:INFO: chip: 21-2 40.898880 C 1159.654860 mV
10:46:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:22:ST3_smx:INFO: Electrons
10:46:22:ST3_smx:INFO: # loops 0
10:46:23:ST3_smx:INFO: # loops 1
10:46:25:ST3_smx:INFO: # loops 2
10:46:26:ST3_smx:INFO: # loops 3
10:46:28:ST3_smx:INFO: # loops 4
10:46:30:ST3_smx:INFO: Total # of broken channels: 0
10:46:30:ST3_smx:INFO: List of broken channels: []
10:46:30:ST3_smx:INFO: Total # of broken channels: 0
10:46:30:ST3_smx:INFO: List of broken channels: []
10:46:31:ST3_smx:INFO: chip: 28-3 37.726682 C 1183.292940 mV
10:46:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:31:ST3_smx:INFO: Electrons
10:46:31:ST3_smx:INFO: # loops 0
10:46:33:ST3_smx:INFO: # loops 1
10:46:35:ST3_smx:INFO: # loops 2
10:46:37:ST3_smx:INFO: # loops 3
10:46:38:ST3_smx:INFO: # loops 4
10:46:40:ST3_smx:INFO: Total # of broken channels: 0
10:46:40:ST3_smx:INFO: List of broken channels: []
10:46:40:ST3_smx:INFO: Total # of broken channels: 0
10:46:40:ST3_smx:INFO: List of broken channels: []
10:46:42:ST3_smx:INFO: chip: 19-4 34.556970 C 1195.082160 mV
10:46:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:42:ST3_smx:INFO: Electrons
10:46:42:ST3_smx:INFO: # loops 0
10:46:43:ST3_smx:INFO: # loops 1
10:46:45:ST3_smx:INFO: # loops 2
10:46:47:ST3_smx:INFO: # loops 3
10:46:48:ST3_smx:INFO: # loops 4
10:46:50:ST3_smx:INFO: Total # of broken channels: 0
10:46:50:ST3_smx:INFO: List of broken channels: []
10:46:50:ST3_smx:INFO: Total # of broken channels: 0
10:46:50:ST3_smx:INFO: List of broken channels: []
10:46:51:ST3_smx:INFO: chip: 26-5 40.898880 C 1165.571835 mV
10:46:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:46:51:ST3_smx:INFO: Electrons
10:46:52:ST3_smx:INFO: # loops 0
10:46:53:ST3_smx:INFO: # loops 1
10:46:55:ST3_smx:INFO: # loops 2
10:46:56:ST3_smx:INFO: # loops 3
10:46:58:ST3_smx:INFO: # loops 4
10:47:00:ST3_smx:INFO: Total # of broken channels: 0
10:47:00:ST3_smx:INFO: List of broken channels: []
10:47:00:ST3_smx:INFO: Total # of broken channels: 1
10:47:00:ST3_smx:INFO: List of broken channels: [17]
10:47:01:ST3_smx:INFO: chip: 17-6 21.902970 C 1224.468235 mV
10:47:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:47:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:47:01:ST3_smx:INFO: Electrons
10:47:01:ST3_smx:INFO: # loops 0
10:47:03:ST3_smx:INFO: # loops 1
10:47:04:ST3_smx:INFO: # loops 2
10:47:06:ST3_smx:INFO: # loops 3
10:47:08:ST3_smx:INFO: # loops 4
10:47:09:ST3_smx:INFO: Total # of broken channels: 0
10:47:09:ST3_smx:INFO: List of broken channels: []
10:47:09:ST3_smx:INFO: Total # of broken channels: 0
10:47:09:ST3_smx:INFO: List of broken channels: []
10:47:11:ST3_smx:INFO: chip: 24-7 34.556970 C 1171.483840 mV
10:47:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:47:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:47:11:ST3_smx:INFO: Electrons
10:47:11:ST3_smx:INFO: # loops 0
10:47:13:ST3_smx:INFO: # loops 1
10:47:14:ST3_smx:INFO: # loops 2
10:47:16:ST3_smx:INFO: # loops 3
10:47:18:ST3_smx:INFO: # loops 4
10:47:19:ST3_smx:INFO: Total # of broken channels: 0
10:47:19:ST3_smx:INFO: List of broken channels: []
10:47:19:ST3_smx:INFO: Total # of broken channels: 1
10:47:19:ST3_smx:INFO: List of broken channels: [108]
10:47:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:47:20:febtest:INFO: 23-00 | XA-000-09-004-006-015-010-02 | 34.6 | 1206.9
10:47:20:febtest:INFO: 30-01 | XA-000-09-004-006-016-007-10 | 31.4 | 1230.3
10:47:20:febtest:INFO: 21-02 | XA-000-09-004-006-016-011-10 | 40.9 | 1177.4
10:47:20:febtest:INFO: 28-03 | XA-000-09-004-006-018-011-09 | 37.7 | 1212.7
10:47:21:febtest:INFO: 19-04 | XA-000-09-004-006-017-011-07 | 34.6 | 1224.5
10:47:21:febtest:INFO: 26-05 | XA-000-09-004-006-018-010-09 | 40.9 | 1195.1
10:47:21:febtest:INFO: 17-06 | XA-000-09-004-006-014-010-15 | 25.1 | 1242.0
10:47:21:febtest:INFO: 24-07 | XA-000-09-004-006-017-010-07 | 34.6 | 1189.2
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_01_21-10_44_30
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2310| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 17143
| SIZE: | GRADE:
MODULE_NAME: M4UR5B1011331B2
LADDER_NAME:
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8330', '1.848', '2.3950']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0100', '1.850', '2.4700']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9690', '1.850', '0.5202']