09:52:50:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:52:50:ST3_Shared:INFO:	                       FEB-Microcable                       
09:52:50:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:52:52:ST3_Shared:INFO:	STS mode selected
09:52:52:febtest:INFO:	Testing FEB with SN 2311
09:52:54:smx_tester:INFO:	Scanning setup
09:52:54:elinks:INFO:	Disabling clock on downlink 0
09:52:54:elinks:INFO:	Disabling clock on downlink 1
09:52:54:elinks:INFO:	Disabling clock on downlink 2
09:52:54:elinks:INFO:	Disabling clock on downlink 3
09:52:54:elinks:INFO:	Disabling clock on downlink 4
09:52:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:52:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:52:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:52:54:elinks:INFO:	Disabling clock on downlink 0
09:52:54:elinks:INFO:	Disabling clock on downlink 1
09:52:54:elinks:INFO:	Disabling clock on downlink 2
09:52:54:elinks:INFO:	Disabling clock on downlink 3
09:52:54:elinks:INFO:	Disabling clock on downlink 4
09:52:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:52:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:52:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:52:54:elinks:INFO:	Disabling clock on downlink 0
09:52:54:elinks:INFO:	Disabling clock on downlink 1
09:52:54:elinks:INFO:	Disabling clock on downlink 2
09:52:54:elinks:INFO:	Disabling clock on downlink 3
09:52:54:elinks:INFO:	Disabling clock on downlink 4
09:52:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:52:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:52:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:52:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:52:54:elinks:INFO:	Disabling clock on downlink 0
09:52:54:elinks:INFO:	Disabling clock on downlink 1
09:52:54:elinks:INFO:	Disabling clock on downlink 2
09:52:54:elinks:INFO:	Disabling clock on downlink 3
09:52:54:elinks:INFO:	Disabling clock on downlink 4
09:52:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:52:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:52:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:52:55:elinks:INFO:	Disabling clock on downlink 0
09:52:55:elinks:INFO:	Disabling clock on downlink 1
09:52:55:elinks:INFO:	Disabling clock on downlink 2
09:52:55:elinks:INFO:	Disabling clock on downlink 3
09:52:55:elinks:INFO:	Disabling clock on downlink 4
09:52:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:52:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:52:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:52:55:setup_element:INFO:	Scanning clock phase
09:52:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:52:55:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:52:55:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:52:55:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:52:55:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:52:55:setup_element:INFO:	Eye window for uplink 18: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:52:55:setup_element:INFO:	Eye window for uplink 19: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:52:55:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
09:52:55:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
09:52:55:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:52:55:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:52:55:setup_element:INFO:	Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:52:55:setup_element:INFO:	Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:52:55:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:52:55:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:52:55:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:52:55:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:52:55:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:52:55:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:52:55:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
09:52:55:setup_element:INFO:	Scanning data phases
09:52:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:52:55:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:53:00:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:53:00:setup_element:INFO:	Eye window for uplink 16: XXX__________________________________XXX
Data delay found: 19
09:53:00:setup_element:INFO:	Eye window for uplink 17: X___________________________________XXX_
Data delay found: 18
09:53:00:setup_element:INFO:	Eye window for uplink 18: X________________________________XXXXXXX
Data delay found: 16
09:53:00:setup_element:INFO:	Eye window for uplink 19: ________________________________XXXXXXXX
Data delay found: 15
09:53:00:setup_element:INFO:	Eye window for uplink 20: X___________________________________XXXX
Data delay found: 18
09:53:00:setup_element:INFO:	Eye window for uplink 21: X_________________________________XXXXXX
Data delay found: 17
09:53:00:setup_element:INFO:	Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
09:53:00:setup_element:INFO:	Eye window for uplink 23: XXXXXX_____________________________XXXXX
Data delay found: 20
09:53:00:setup_element:INFO:	Eye window for uplink 24: __________XXXXX_________________________
Data delay found: 32
09:53:00:setup_element:INFO:	Eye window for uplink 25: ____________XXXXX_______________________
Data delay found: 34
09:53:01:setup_element:INFO:	Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
09:53:01:setup_element:INFO:	Eye window for uplink 27: ____________XXXXX_______________________
Data delay found: 34
09:53:01:setup_element:INFO:	Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
09:53:01:setup_element:INFO:	Eye window for uplink 29: ______________XXXXXX____________________
Data delay found: 36
09:53:01:setup_element:INFO:	Eye window for uplink 30: __________________XXXXXX________________
Data delay found: 0
09:53:01:setup_element:INFO:	Eye window for uplink 31: _________________XXXXXXX________________
Data delay found: 0
09:53:01:setup_element:INFO:	Setting the data phase to 19 for uplink 16
09:53:01:setup_element:INFO:	Setting the data phase to 18 for uplink 17
09:53:01:setup_element:INFO:	Setting the data phase to 16 for uplink 18
09:53:01:setup_element:INFO:	Setting the data phase to 15 for uplink 19
09:53:01:setup_element:INFO:	Setting the data phase to 18 for uplink 20
09:53:01:setup_element:INFO:	Setting the data phase to 17 for uplink 21
09:53:01:setup_element:INFO:	Setting the data phase to 19 for uplink 22
09:53:01:setup_element:INFO:	Setting the data phase to 20 for uplink 23
09:53:01:setup_element:INFO:	Setting the data phase to 32 for uplink 24
09:53:01:setup_element:INFO:	Setting the data phase to 34 for uplink 25
09:53:01:setup_element:INFO:	Setting the data phase to 30 for uplink 26
09:53:01:setup_element:INFO:	Setting the data phase to 34 for uplink 27
09:53:01:setup_element:INFO:	Setting the data phase to 34 for uplink 28
09:53:01:setup_element:INFO:	Setting the data phase to 36 for uplink 29
09:53:01:setup_element:INFO:	Setting the data phase to 0 for uplink 30
09:53:01:setup_element:INFO:	Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
09:53:01:setup_element:INFO:	Beginning SMX ASICs map scan
09:53:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:53:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:53:01:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:53:01:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:53:01:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:53:01:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:53:01:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:53:01:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:53:01:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:53:01:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:53:01:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:53:01:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:53:01:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:53:01:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:53:01:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:53:02:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:53:02:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:53:02:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:53:02:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:53:02:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:53:02:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:53:03:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 69
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXXX___
      Uplink 17: _____________________________________________________________________XXXXXXXX___
      Uplink 18: ____________________________________________________________________XXXXXXXX____
      Uplink 19: ____________________________________________________________________XXXXXXXX____
      Uplink 20: ________________________________________________________________________________
      Uplink 21: ________________________________________________________________________________
      Uplink 22: ____________________________________________________________________XXXXXXXXX___
      Uplink 23: ____________________________________________________________________XXXXXXXXX___
      Uplink 24: _____________________________________________________________________XXXXXXXX___
      Uplink 25: _____________________________________________________________________XXXXXXXX___
      Uplink 26: _____________________________________________________________________XXXXXXX____
      Uplink 27: _____________________________________________________________________XXXXXXX____
      Uplink 28: ____________________________________________________________________XXXXXXXX____
      Uplink 29: ____________________________________________________________________XXXXXXXX____
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 17:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXX_
    Uplink 18:
      Optimal Phase: 16
      Window Length: 32
      Eye Window: X________________________________XXXXXXX
    Uplink 19:
      Optimal Phase: 15
      Window Length: 32
      Eye Window: ________________________________XXXXXXXX
    Uplink 20:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 21:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 22:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 23:
      Optimal Phase: 20
      Window Length: 29
      Eye Window: XXXXXX_____________________________XXXXX
    Uplink 24:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 25:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 26:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 27:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 28:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 29:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 30:
      Optimal Phase: 0
      Window Length: 34
      Eye Window: __________________XXXXXX________________
    Uplink 31:
      Optimal Phase: 0
      Window Length: 33
      Eye Window: _________________XXXXXXX________________

==============================================OOO==============================================
09:53:03:setup_element:INFO:	Performing Elink synchronization
09:53:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:53:03:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:53:03:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:53:03:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
09:53:03:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:53:03:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:53:04:febtest:INFO:	Init all SMX (CSA): 30
09:53:18:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:53:19:febtest:INFO:	23-00 | XA-000-09-004-012-007-013-08 |  47.3 | 1135.9
09:53:19:febtest:INFO:	30-01 | XA-000-09-004-007-015-004-10 |  47.3 | 1124.0
09:53:19:febtest:INFO:	21-02 | XA-000-09-004-012-009-016-06 |  47.3 | 1124.0
09:53:19:febtest:INFO:	28-03 | XA-000-09-004-007-015-009-10 |  37.7 | 1159.7
09:53:20:febtest:INFO:	19-04 | XA-000-09-004-012-008-015-12 |  37.7 | 1159.7
09:53:20:febtest:INFO:	26-05 | XA-000-09-004-007-013-008-09 |  34.6 | 1171.5
09:53:20:febtest:INFO:	17-06 | XA-000-09-004-012-008-016-11 |  44.1 | 1141.9
09:53:20:febtest:INFO:	24-07 | XA-000-09-004-007-015-005-10 |  50.4 | 1118.1
09:53:21:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:53:23:ST3_smx:INFO:	chip: 23-0 	 47.250730 C 	 1147.806000 mV
09:53:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:23:ST3_smx:INFO:		Electrons
09:53:23:ST3_smx:INFO:	# loops 0
09:53:25:ST3_smx:INFO:	# loops 1
09:53:27:ST3_smx:INFO:	# loops 2
09:53:28:ST3_smx:INFO:	Total # of broken channels: 0
09:53:28:ST3_smx:INFO:	List of broken channels: []
09:53:28:ST3_smx:INFO:	Total # of broken channels: 0
09:53:28:ST3_smx:INFO:	List of broken channels: []
09:53:30:ST3_smx:INFO:	chip: 30-1 	 47.250730 C 	 1141.874115 mV
09:53:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:30:ST3_smx:INFO:		Electrons
09:53:30:ST3_smx:INFO:	# loops 0
09:53:32:ST3_smx:INFO:	# loops 1
09:53:33:ST3_smx:INFO:	# loops 2
09:53:35:ST3_smx:INFO:	Total # of broken channels: 0
09:53:35:ST3_smx:INFO:	List of broken channels: []
09:53:35:ST3_smx:INFO:	Total # of broken channels: 0
09:53:35:ST3_smx:INFO:	List of broken channels: []
09:53:37:ST3_smx:INFO:	chip: 21-2 	 50.430383 C 	 1135.937260 mV
09:53:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:37:ST3_smx:INFO:		Electrons
09:53:37:ST3_smx:INFO:	# loops 0
09:53:39:ST3_smx:INFO:	# loops 1
09:53:40:ST3_smx:INFO:	# loops 2
09:53:42:ST3_smx:INFO:	Total # of broken channels: 0
09:53:42:ST3_smx:INFO:	List of broken channels: []
09:53:42:ST3_smx:INFO:	Total # of broken channels: 1
09:53:42:ST3_smx:INFO:	List of broken channels: [1]
09:53:43:ST3_smx:INFO:	chip: 28-3 	 37.726682 C 	 1171.483840 mV
09:53:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:43:ST3_smx:INFO:		Electrons
09:53:43:ST3_smx:INFO:	# loops 0
09:53:45:ST3_smx:INFO:	# loops 1
09:53:47:ST3_smx:INFO:	# loops 2
09:53:48:ST3_smx:INFO:	Total # of broken channels: 0
09:53:48:ST3_smx:INFO:	List of broken channels: []
09:53:48:ST3_smx:INFO:	Total # of broken channels: 0
09:53:48:ST3_smx:INFO:	List of broken channels: []
09:53:50:ST3_smx:INFO:	chip: 19-4 	 37.726682 C 	 1171.483840 mV
09:53:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:50:ST3_smx:INFO:		Electrons
09:53:50:ST3_smx:INFO:	# loops 0
09:53:52:ST3_smx:INFO:	# loops 1
09:53:53:ST3_smx:INFO:	# loops 2
09:53:55:ST3_smx:INFO:	Total # of broken channels: 0
09:53:55:ST3_smx:INFO:	List of broken channels: []
09:53:55:ST3_smx:INFO:	Total # of broken channels: 0
09:53:55:ST3_smx:INFO:	List of broken channels: []
09:53:57:ST3_smx:INFO:	chip: 26-5 	 34.556970 C 	 1183.292940 mV
09:53:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:57:ST3_smx:INFO:		Electrons
09:53:57:ST3_smx:INFO:	# loops 0
09:53:58:ST3_smx:INFO:	# loops 1
09:54:00:ST3_smx:INFO:	# loops 2
09:54:02:ST3_smx:INFO:	Total # of broken channels: 0
09:54:02:ST3_smx:INFO:	List of broken channels: []
09:54:02:ST3_smx:INFO:	Total # of broken channels: 0
09:54:02:ST3_smx:INFO:	List of broken channels: []
09:54:03:ST3_smx:INFO:	chip: 17-6 	 44.073563 C 	 1147.806000 mV
09:54:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:54:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:54:03:ST3_smx:INFO:		Electrons
09:54:03:ST3_smx:INFO:	# loops 0
09:54:05:ST3_smx:INFO:	# loops 1
09:54:06:ST3_smx:INFO:	# loops 2
09:54:08:ST3_smx:INFO:	Total # of broken channels: 0
09:54:08:ST3_smx:INFO:	List of broken channels: []
09:54:08:ST3_smx:INFO:	Total # of broken channels: 0
09:54:08:ST3_smx:INFO:	List of broken channels: []
09:54:10:ST3_smx:INFO:	chip: 24-7 	 50.430383 C 	 1124.048640 mV
09:54:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:54:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:54:10:ST3_smx:INFO:		Electrons
09:54:10:ST3_smx:INFO:	# loops 0
09:54:12:ST3_smx:INFO:	# loops 1
09:54:13:ST3_smx:INFO:	# loops 2
09:54:15:ST3_smx:INFO:	Total # of broken channels: 0
09:54:15:ST3_smx:INFO:	List of broken channels: []
09:54:15:ST3_smx:INFO:	Total # of broken channels: 0
09:54:15:ST3_smx:INFO:	List of broken channels: []
09:54:15:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:54:15:febtest:INFO:	23-00 | XA-000-09-004-012-007-013-08 |  47.3 | 1165.6
09:54:16:febtest:INFO:	30-01 | XA-000-09-004-007-015-004-10 |  47.3 | 1165.6
09:54:16:febtest:INFO:	21-02 | XA-000-09-004-012-009-016-06 |  50.4 | 1159.7
09:54:16:febtest:INFO:	28-03 | XA-000-09-004-007-015-009-10 |  37.7 | 1212.7
09:54:16:febtest:INFO:	19-04 | XA-000-09-004-012-008-015-12 |  40.9 | 1189.2
09:54:17:febtest:INFO:	26-05 | XA-000-09-004-007-013-008-09 |  34.6 | 1201.0
09:54:17:febtest:INFO:	17-06 | XA-000-09-004-012-008-016-11 |  44.1 | 1171.5
09:54:17:febtest:INFO:	24-07 | XA-000-09-004-007-015-005-10 |  50.4 | 1147.8
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_12_04-09_52_50
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2311| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5010', '1.848', '2.0990']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0230', '1.850', '2.6050']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9950', '1.850', '0.5294']