13:17:56:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:17:56:ST3_Shared:INFO:	                       FEB-Microcable                       
13:17:56:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:17:58:ST3_Shared:INFO:	STS mode selected
13:17:58:febtest:INFO:	Testing FEB with SN 2314
13:17:59:smx_tester:INFO:	Scanning setup
13:17:59:elinks:INFO:	Disabling clock on downlink 0
13:17:59:elinks:INFO:	Disabling clock on downlink 1
13:17:59:elinks:INFO:	Disabling clock on downlink 2
13:17:59:elinks:INFO:	Disabling clock on downlink 3
13:17:59:elinks:INFO:	Disabling clock on downlink 4
13:17:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:17:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:17:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:17:59:elinks:INFO:	Disabling clock on downlink 0
13:17:59:elinks:INFO:	Disabling clock on downlink 1
13:17:59:elinks:INFO:	Disabling clock on downlink 2
13:17:59:elinks:INFO:	Disabling clock on downlink 3
13:17:59:elinks:INFO:	Disabling clock on downlink 4
13:17:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:17:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:18:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:18:00:elinks:INFO:	Disabling clock on downlink 0
13:18:00:elinks:INFO:	Disabling clock on downlink 1
13:18:00:elinks:INFO:	Disabling clock on downlink 2
13:18:00:elinks:INFO:	Disabling clock on downlink 3
13:18:00:elinks:INFO:	Disabling clock on downlink 4
13:18:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:18:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:18:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:18:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:18:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:18:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:18:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:18:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:18:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:18:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:18:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:18:00:elinks:INFO:	Disabling clock on downlink 0
13:18:00:elinks:INFO:	Disabling clock on downlink 1
13:18:00:elinks:INFO:	Disabling clock on downlink 2
13:18:00:elinks:INFO:	Disabling clock on downlink 3
13:18:00:elinks:INFO:	Disabling clock on downlink 4
13:18:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:18:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:18:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:18:00:elinks:INFO:	Disabling clock on downlink 0
13:18:00:elinks:INFO:	Disabling clock on downlink 1
13:18:00:elinks:INFO:	Disabling clock on downlink 2
13:18:00:elinks:INFO:	Disabling clock on downlink 3
13:18:00:elinks:INFO:	Disabling clock on downlink 4
13:18:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:18:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:18:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:18:00:setup_element:INFO:	Scanning clock phase
13:18:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:18:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:18:00:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:18:00:setup_element:INFO:	Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
13:18:00:setup_element:INFO:	Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
13:18:00:setup_element:INFO:	Eye window for uplink 26: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
13:18:00:setup_element:INFO:	Eye window for uplink 27: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
13:18:00:setup_element:INFO:	Eye window for uplink 28: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
13:18:00:setup_element:INFO:	Eye window for uplink 29: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
13:18:00:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:18:00:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:18:00:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 2
==============================================OOO==============================================
13:18:00:setup_element:INFO:	Scanning data phases
13:18:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:18:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:18:05:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:18:05:setup_element:INFO:	Eye window for uplink 24: __________XXXXXX________________________
Data delay found: 32
13:18:05:setup_element:INFO:	Eye window for uplink 25: _____________XXXXX______________________
Data delay found: 35
13:18:05:setup_element:INFO:	Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
13:18:05:setup_element:INFO:	Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
13:18:05:setup_element:INFO:	Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
13:18:05:setup_element:INFO:	Eye window for uplink 29: ______________XXXXXX____________________
Data delay found: 36
13:18:05:setup_element:INFO:	Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
13:18:05:setup_element:INFO:	Eye window for uplink 31: _________________XXXXXX_________________
Data delay found: 39
13:18:05:setup_element:INFO:	Setting the data phase to 32 for uplink 24
13:18:05:setup_element:INFO:	Setting the data phase to 35 for uplink 25
13:18:05:setup_element:INFO:	Setting the data phase to 30 for uplink 26
13:18:05:setup_element:INFO:	Setting the data phase to 33 for uplink 27
13:18:05:setup_element:INFO:	Setting the data phase to 34 for uplink 28
13:18:05:setup_element:INFO:	Setting the data phase to 36 for uplink 29
13:18:05:setup_element:INFO:	Setting the data phase to 39 for uplink 30
13:18:06:setup_element:INFO:	Setting the data phase to 39 for uplink 31
==============================================OOO==============================================
13:18:06:setup_element:INFO:	Beginning SMX ASICs map scan
13:18:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:18:06:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:18:06:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:18:06:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:18:06:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:18:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:18:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:18:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:18:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:18:06:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:18:06:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:18:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:18:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:18:08:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 70
    Eye Windows:
      Uplink 24: ________________________________________________________________________________
      Uplink 25: ________________________________________________________________________________
      Uplink 26: __________________________________________________________________XXXXXXXXX_____
      Uplink 27: __________________________________________________________________XXXXXXXXX_____
      Uplink 28: __________________________________________________________________XXXXXXXXX_____
      Uplink 29: __________________________________________________________________XXXXXXXXX_____
      Uplink 30: ___________________________________________________________________XXXXXXXXX____
      Uplink 31: ___________________________________________________________________XXXXXXXXX____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 25:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 26:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 29:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 30:
      Optimal Phase: 39
      Window Length: 34
      Eye Window: _________________XXXXXX_________________
    Uplink 31:
      Optimal Phase: 39
      Window Length: 34
      Eye Window: _________________XXXXXX_________________

==============================================OOO==============================================
13:18:08:setup_element:INFO:	Performing Elink synchronization
13:18:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:18:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:18:08:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:18:08:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
13:18:08:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:18:08:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
13:18:09:febtest:INFO:	Init all SMX (CSA): 30
13:18:16:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:18:16:febtest:INFO:	30-01 | XA-000-09-004-007-014-010-07 |  31.4 | 1165.6
13:18:17:febtest:INFO:	28-03 | XA-000-09-004-007-013-012-09 |  31.4 | 1159.7
13:18:17:febtest:INFO:	26-05 | XA-000-09-004-007-014-012-07 |  28.2 | 1171.5
13:18:17:febtest:INFO:	24-07 | XA-000-09-004-007-015-011-10 |  31.4 | 1165.6
13:18:18:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:18:20:ST3_smx:INFO:	chip: 30-1 	 31.389742 C 	 1177.390875 mV
13:18:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:20:ST3_smx:INFO:		Electrons
13:18:20:ST3_smx:INFO:	# loops 0
13:18:22:ST3_smx:INFO:	# loops 1
13:18:23:ST3_smx:INFO:	# loops 2
13:18:25:ST3_smx:INFO:	Total # of broken channels: 0
13:18:25:ST3_smx:INFO:	List of broken channels: []
13:18:25:ST3_smx:INFO:	Total # of broken channels: 0
13:18:25:ST3_smx:INFO:	List of broken channels: []
13:18:27:ST3_smx:INFO:	chip: 28-3 	 31.389742 C 	 1165.571835 mV
13:18:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:27:ST3_smx:INFO:		Electrons
13:18:27:ST3_smx:INFO:	# loops 0
13:18:28:ST3_smx:INFO:	# loops 1
13:18:30:ST3_smx:INFO:	# loops 2
13:18:31:ST3_smx:INFO:	Total # of broken channels: 0
13:18:31:ST3_smx:INFO:	List of broken channels: []
13:18:31:ST3_smx:INFO:	Total # of broken channels: 0
13:18:31:ST3_smx:INFO:	List of broken channels: []
13:18:33:ST3_smx:INFO:	chip: 26-5 	 28.225000 C 	 1177.390875 mV
13:18:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:33:ST3_smx:INFO:		Electrons
13:18:33:ST3_smx:INFO:	# loops 0
13:18:35:ST3_smx:INFO:	# loops 1
13:18:36:ST3_smx:INFO:	# loops 2
13:18:38:ST3_smx:INFO:	Total # of broken channels: 0
13:18:38:ST3_smx:INFO:	List of broken channels: []
13:18:38:ST3_smx:INFO:	Total # of broken channels: 0
13:18:38:ST3_smx:INFO:	List of broken channels: []
13:18:40:ST3_smx:INFO:	chip: 24-7 	 31.389742 C 	 1171.483840 mV
13:18:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:18:40:ST3_smx:INFO:		Electrons
13:18:40:ST3_smx:INFO:	# loops 0
13:18:42:ST3_smx:INFO:	# loops 1
13:18:43:ST3_smx:INFO:	# loops 2
13:18:45:ST3_smx:INFO:	Total # of broken channels: 0
13:18:45:ST3_smx:INFO:	List of broken channels: []
13:18:45:ST3_smx:INFO:	Total # of broken channels: 0
13:18:45:ST3_smx:INFO:	List of broken channels: []
13:18:45:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:18:45:febtest:INFO:	30-01 | XA-000-09-004-007-014-010-07 |  31.4 | 1206.9
13:18:46:febtest:INFO:	28-03 | XA-000-09-004-007-013-012-09 |  31.4 | 1189.2
13:18:46:febtest:INFO:	26-05 | XA-000-09-004-007-014-012-07 |  31.4 | 1201.0
13:18:46:febtest:INFO:	24-07 | XA-000-09-004-007-015-011-10 |  31.4 | 1195.1
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_28-13_17_56
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2314| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9809', '1.848', '1.2280']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0010', '1.850', '1.3010']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9950', '1.850', '0.2664']