
FEB_2316 29.01.25 09:59:47
TextEdit.txt
09:59:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:59:47:ST3_Shared:INFO: FEB-Sensor 09:59:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:59:57:ST3_ModuleSelector:DEBUG: M4UR5T2011332A2 09:59:57:ST3_ModuleSelector:DEBUG: L4UR501133 09:59:57:ST3_ModuleSelector:DEBUG: 29194 09:59:57:ST3_ModuleSelector:DEBUG: 62x124 09:59:57:ST3_ModuleSelector:DEBUG: C 09:59:57:ST3_ModuleSelector:DEBUG: M4UR5T2011332A2 09:59:57:ST3_ModuleSelector:DEBUG: L4UR501133 09:59:57:ST3_ModuleSelector:DEBUG: 29194 09:59:57:ST3_ModuleSelector:DEBUG: 62x124 09:59:57:ST3_ModuleSelector:DEBUG: C 10:00:09:ST3_ModuleSelector:INFO: M4UR5T2011332A2 10:00:09:ST3_ModuleSelector:INFO: 29194 10:00:09:febtest:INFO: Testing FEB with SN 2316 10:00:10:smx_tester:INFO: Scanning setup 10:00:10:elinks:INFO: Disabling clock on downlink 0 10:00:10:elinks:INFO: Disabling clock on downlink 1 10:00:10:elinks:INFO: Disabling clock on downlink 2 10:00:10:elinks:INFO: Disabling clock on downlink 3 10:00:10:elinks:INFO: Disabling clock on downlink 4 10:00:10:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:00:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:00:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:00:11:elinks:INFO: Disabling clock on downlink 0 10:00:11:elinks:INFO: Disabling clock on downlink 1 10:00:11:elinks:INFO: Disabling clock on downlink 2 10:00:11:elinks:INFO: Disabling clock on downlink 3 10:00:11:elinks:INFO: Disabling clock on downlink 4 10:00:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:00:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:00:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:00:11:elinks:INFO: Disabling clock on downlink 0 10:00:11:elinks:INFO: Disabling clock on downlink 1 10:00:11:elinks:INFO: Disabling clock on downlink 2 10:00:11:elinks:INFO: Disabling clock on downlink 3 10:00:11:elinks:INFO: Disabling clock on downlink 4 10:00:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:00:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 10:00:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 10:00:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:00:11:elinks:INFO: Disabling clock on downlink 0 10:00:11:elinks:INFO: Disabling clock on downlink 1 10:00:11:elinks:INFO: Disabling clock on downlink 2 10:00:11:elinks:INFO: Disabling clock on downlink 3 10:00:11:elinks:INFO: Disabling clock on downlink 4 10:00:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:00:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:00:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:00:11:elinks:INFO: Disabling clock on downlink 0 10:00:11:elinks:INFO: Disabling clock on downlink 1 10:00:11:elinks:INFO: Disabling clock on downlink 2 10:00:11:elinks:INFO: Disabling clock on downlink 3 10:00:11:elinks:INFO: Disabling clock on downlink 4 10:00:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:00:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:00:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 10:00:11:setup_element:INFO: Scanning clock phase 10:00:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:00:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:00:12:setup_element:INFO: Clock phase scan results for group 0, downlink 2 10:00:12:setup_element:INFO: Eye window for uplink 16: __________________________________________________________________XXXXXXXXX_____ Clock Delay: 30 10:00:12:setup_element:INFO: Eye window for uplink 17: __________________________________________________________________XXXXXXXXX_____ Clock Delay: 30 10:00:12:setup_element:INFO: Eye window for uplink 18: __________________________________________________________________XXXXXXX_______ Clock Delay: 29 10:00:12:setup_element:INFO: Eye window for uplink 19: __________________________________________________________________XXXXXXX_______ Clock Delay: 29 10:00:12:setup_element:INFO: Eye window for uplink 20: _________________________________________________________________XXXXXXXXX______ Clock Delay: 29 10:00:12:setup_element:INFO: Eye window for uplink 21: _________________________________________________________________XXXXXXXXX______ Clock Delay: 29 10:00:12:setup_element:INFO: Eye window for uplink 22: _________________________________________________________________XXXXXXXX_______ Clock Delay: 28 10:00:12:setup_element:INFO: Eye window for uplink 23: _________________________________________________________________XXXXXXXX_______ Clock Delay: 28 10:00:12:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXXXX________ Clock Delay: 28 10:00:12:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXXXX________ Clock Delay: 28 10:00:12:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________ Clock Delay: 40 10:00:12:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________ Clock Delay: 40 10:00:12:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXXXXXX___ Clock Delay: 31 10:00:12:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXXXXXX___ Clock Delay: 31 10:00:12:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 10:00:12:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 10:00:12:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 2 ==============================================OOO============================================== 10:00:12:setup_element:INFO: Scanning data phases 10:00:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:00:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:00:17:setup_element:INFO: Data phase scan results for group 0, downlink 2 10:00:17:setup_element:INFO: Eye window for uplink 16: XX______________________________XXXXXXXX Data delay found: 16 10:00:17:setup_element:INFO: Eye window for uplink 17: _____________________________XXXXXXXXXXX Data delay found: 14 10:00:17:setup_element:INFO: Eye window for uplink 18: XXX______________________________XXXXXXX Data delay found: 17 10:00:17:setup_element:INFO: Eye window for uplink 19: X_______________________________XXXXXXX_ Data delay found: 16 10:00:17:setup_element:INFO: Eye window for uplink 20: X__________________________________XXXXX Data delay found: 17 10:00:17:setup_element:INFO: Eye window for uplink 21: X_________________________________XXXXXX Data delay found: 17 10:00:17:setup_element:INFO: Eye window for uplink 22: _______________________________XXXXXXXX_ Data delay found: 14 10:00:17:setup_element:INFO: Eye window for uplink 23: XX____________________________XXXXXXXXXX Data delay found: 15 10:00:17:setup_element:INFO: Eye window for uplink 24: ___XXXXXXXX_____________________________ Data delay found: 26 10:00:17:setup_element:INFO: Eye window for uplink 25: ____X_XXXXXXXX__________________________ Data delay found: 28 10:00:17:setup_element:INFO: Eye window for uplink 26: ______XXXXXX____________________________ Data delay found: 28 10:00:17:setup_element:INFO: Eye window for uplink 27: ________X_XXXXX_________________________ Data delay found: 31 10:00:17:setup_element:INFO: Eye window for uplink 28: ____________XX_XXXXXXXX_________________ Data delay found: 37 10:00:17:setup_element:INFO: Eye window for uplink 29: _______________XXXXXXXXXX_______________ Data delay found: 39 10:00:17:setup_element:INFO: Eye window for uplink 30: _____________X_XXXXXXXXX________________ Data delay found: 38 10:00:17:setup_element:INFO: Eye window for uplink 31: _____________XXXXXXXXXXX________________ Data delay found: 38 10:00:17:setup_element:INFO: Setting the data phase to 16 for uplink 16 10:00:17:setup_element:INFO: Setting the data phase to 14 for uplink 17 10:00:17:setup_element:INFO: Setting the data phase to 17 for uplink 18 10:00:17:setup_element:INFO: Setting the data phase to 16 for uplink 19 10:00:17:setup_element:INFO: Setting the data phase to 17 for uplink 20 10:00:17:setup_element:INFO: Setting the data phase to 17 for uplink 21 10:00:17:setup_element:INFO: Setting the data phase to 14 for uplink 22 10:00:17:setup_element:INFO: Setting the data phase to 15 for uplink 23 10:00:17:setup_element:INFO: Setting the data phase to 26 for uplink 24 10:00:17:setup_element:INFO: Setting the data phase to 28 for uplink 25 10:00:17:setup_element:INFO: Setting the data phase to 28 for uplink 26 10:00:17:setup_element:INFO: Setting the data phase to 31 for uplink 27 10:00:17:setup_element:INFO: Setting the data phase to 37 for uplink 28 10:00:17:setup_element:INFO: Setting the data phase to 39 for uplink 29 10:00:17:setup_element:INFO: Setting the data phase to 38 for uplink 30 10:00:17:setup_element:INFO: Setting the data phase to 38 for uplink 31 ==============================================OOO============================================== 10:00:17:setup_element:INFO: Beginning SMX ASICs map scan 10:00:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:00:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:00:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:00:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:00:17:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:00:17:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 10:00:17:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 10:00:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 10:00:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 10:00:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 10:00:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 10:00:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 10:00:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 10:00:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 10:00:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 10:00:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 10:00:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 10:00:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 10:00:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 10:00:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 10:00:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 10:00:20:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 30 Window Length: 68 Eye Windows: Uplink 16: __________________________________________________________________XXXXXXXXX_____ Uplink 17: __________________________________________________________________XXXXXXXXX_____ Uplink 18: __________________________________________________________________XXXXXXX_______ Uplink 19: __________________________________________________________________XXXXXXX_______ Uplink 20: _________________________________________________________________XXXXXXXXX______ Uplink 21: _________________________________________________________________XXXXXXXXX______ Uplink 22: _________________________________________________________________XXXXXXXX_______ Uplink 23: _________________________________________________________________XXXXXXXX_______ Uplink 24: _________________________________________________________________XXXXXXX________ Uplink 25: _________________________________________________________________XXXXXXX________ Uplink 26: ________________________________________________________________________________ Uplink 27: ________________________________________________________________________________ Uplink 28: ___________________________________________________________________XXXXXXXXXX___ Uplink 29: ___________________________________________________________________XXXXXXXXXX___ Uplink 30: ___________________________________________________________________XXXXXXXXX____ Uplink 31: ___________________________________________________________________XXXXXXXXX____ Data phase characteristics: Uplink 16: Optimal Phase: 16 Window Length: 30 Eye Window: XX______________________________XXXXXXXX Uplink 17: Optimal Phase: 14 Window Length: 29 Eye Window: _____________________________XXXXXXXXXXX Uplink 18: Optimal Phase: 17 Window Length: 30 Eye Window: XXX______________________________XXXXXXX Uplink 19: Optimal Phase: 16 Window Length: 31 Eye Window: X_______________________________XXXXXXX_ Uplink 20: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 21: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXXX Uplink 22: Optimal Phase: 14 Window Length: 32 Eye Window: _______________________________XXXXXXXX_ Uplink 23: Optimal Phase: 15 Window Length: 28 Eye Window: XX____________________________XXXXXXXXXX Uplink 24: Optimal Phase: 26 Window Length: 32 Eye Window: ___XXXXXXXX_____________________________ Uplink 25: Optimal Phase: 28 Window Length: 30 Eye Window: ____X_XXXXXXXX__________________________ Uplink 26: Optimal Phase: 28 Window Length: 34 Eye Window: ______XXXXXX____________________________ Uplink 27: Optimal Phase: 31 Window Length: 33 Eye Window: ________X_XXXXX_________________________ Uplink 28: Optimal Phase: 37 Window Length: 29 Eye Window: ____________XX_XXXXXXXX_________________ Uplink 29: Optimal Phase: 39 Window Length: 30 Eye Window: _______________XXXXXXXXXX_______________ Uplink 30: Optimal Phase: 38 Window Length: 29 Eye Window: _____________X_XXXXXXXXX________________ Uplink 31: Optimal Phase: 38 Window Length: 29 Eye Window: _____________XXXXXXXXXXX________________ ==============================================OOO============================================== 10:00:20:setup_element:INFO: Performing Elink synchronization 10:00:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:00:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:00:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:00:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 10:00:20:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 10:00:20:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 10:00:20:febtest:INFO: Init all SMX (CSA): 30 10:00:35:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:00:35:febtest:INFO: 23-00 | XA-000-09-004-006-013-012-01 | 25.1 | 1159.7 10:00:36:febtest:INFO: 30-01 | XA-000-09-004-006-016-013-10 | 31.4 | 1147.8 10:00:36:febtest:INFO: 21-02 | XA-000-09-004-006-015-013-02 | 28.2 | 1147.8 10:00:36:febtest:INFO: 28-03 | XA-000-09-004-006-017-013-07 | 25.1 | 1159.7 10:00:36:febtest:INFO: 19-04 | XA-000-09-004-006-013-013-01 | 28.2 | 1165.6 10:00:36:febtest:INFO: 26-05 | XA-000-09-004-006-015-012-02 | 21.9 | 1171.5 10:00:37:febtest:INFO: 17-06 | XA-000-09-004-006-016-015-10 | 12.4 | 1218.6 10:00:37:febtest:INFO: 24-07 | XA-000-09-004-006-014-012-15 | 31.4 | 1141.9 10:00:38:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 10:00:40:ST3_smx:INFO: chip: 23-0 25.062742 C 1171.483840 mV 10:00:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:00:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:00:40:ST3_smx:INFO: Electrons 10:00:40:ST3_smx:INFO: # loops 0 10:00:41:ST3_smx:INFO: # loops 1 10:00:43:ST3_smx:INFO: # loops 2 10:00:45:ST3_smx:INFO: # loops 3 10:00:46:ST3_smx:INFO: # loops 4 10:00:48:ST3_smx:INFO: Total # of broken channels: 0 10:00:48:ST3_smx:INFO: List of broken channels: [] 10:00:48:ST3_smx:INFO: Total # of broken channels: 0 10:00:48:ST3_smx:INFO: List of broken channels: [] 10:00:50:ST3_smx:INFO: chip: 30-1 31.389742 C 1159.654860 mV 10:00:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:00:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:00:50:ST3_smx:INFO: Electrons 10:00:50:ST3_smx:INFO: # loops 0 10:00:52:ST3_smx:INFO: # loops 1 10:00:53:ST3_smx:INFO: # loops 2 10:00:55:ST3_smx:INFO: # loops 3 10:00:57:ST3_smx:INFO: # loops 4 10:00:58:ST3_smx:INFO: Total # of broken channels: 0 10:00:58:ST3_smx:INFO: List of broken channels: [] 10:00:58:ST3_smx:INFO: Total # of broken channels: 1 10:00:58:ST3_smx:INFO: List of broken channels: [1] 10:01:00:ST3_smx:INFO: chip: 21-2 28.225000 C 1159.654860 mV 10:01:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:01:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:01:00:ST3_smx:INFO: Electrons 10:01:00:ST3_smx:INFO: # loops 0 10:01:01:ST3_smx:INFO: # loops 1 10:01:03:ST3_smx:INFO: # loops 2 10:01:05:ST3_smx:INFO: # loops 3 10:01:07:ST3_smx:INFO: # loops 4 10:01:08:ST3_smx:INFO: Total # of broken channels: 0 10:01:08:ST3_smx:INFO: List of broken channels: [] 10:01:08:ST3_smx:INFO: Total # of broken channels: 1 10:01:08:ST3_smx:INFO: List of broken channels: [78] 10:01:10:ST3_smx:INFO: chip: 28-3 25.062742 C 1171.483840 mV 10:01:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:01:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:01:10:ST3_smx:INFO: Electrons 10:01:10:ST3_smx:INFO: # loops 0 10:01:12:ST3_smx:INFO: # loops 1 10:01:13:ST3_smx:INFO: # loops 2 10:01:15:ST3_smx:INFO: # loops 3 10:01:16:ST3_smx:INFO: # loops 4 10:01:18:ST3_smx:INFO: Total # of broken channels: 0 10:01:18:ST3_smx:INFO: List of broken channels: [] 10:01:18:ST3_smx:INFO: Total # of broken channels: 2 10:01:18:ST3_smx:INFO: List of broken channels: [75, 80] 10:01:20:ST3_smx:INFO: chip: 19-4 28.225000 C 1183.292940 mV 10:01:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:01:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:01:20:ST3_smx:INFO: Electrons 10:01:20:ST3_smx:INFO: # loops 0 10:01:21:ST3_smx:INFO: # loops 1 10:01:23:ST3_smx:INFO: # loops 2 10:01:25:ST3_smx:INFO: # loops 3 10:01:26:ST3_smx:INFO: # loops 4 10:01:28:ST3_smx:INFO: Total # of broken channels: 0 10:01:28:ST3_smx:INFO: List of broken channels: [] 10:01:28:ST3_smx:INFO: Total # of broken channels: 1 10:01:28:ST3_smx:INFO: List of broken channels: [40] 10:01:30:ST3_smx:INFO: chip: 26-5 25.062742 C 1183.292940 mV 10:01:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:01:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:01:30:ST3_smx:INFO: Electrons 10:01:30:ST3_smx:INFO: # loops 0 10:01:31:ST3_smx:INFO: # loops 1 10:01:33:ST3_smx:INFO: # loops 2 10:01:35:ST3_smx:INFO: # loops 3 10:01:36:ST3_smx:INFO: # loops 4 10:01:38:ST3_smx:INFO: Total # of broken channels: 0 10:01:38:ST3_smx:INFO: List of broken channels: [] 10:01:38:ST3_smx:INFO: Total # of broken channels: 0 10:01:38:ST3_smx:INFO: List of broken channels: [] 10:01:39:ST3_smx:INFO: chip: 17-6 12.438562 C 1230.330540 mV 10:01:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:01:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:01:39:ST3_smx:INFO: Electrons 10:01:39:ST3_smx:INFO: # loops 0 10:01:41:ST3_smx:INFO: # loops 1 10:01:43:ST3_smx:INFO: # loops 2 10:01:44:ST3_smx:INFO: # loops 3 10:01:46:ST3_smx:INFO: # loops 4 10:01:48:ST3_smx:INFO: Total # of broken channels: 0 10:01:48:ST3_smx:INFO: List of broken channels: [] 10:01:48:ST3_smx:INFO: Total # of broken channels: 0 10:01:48:ST3_smx:INFO: List of broken channels: [] 10:01:49:ST3_smx:INFO: chip: 24-7 34.556970 C 1153.732915 mV 10:01:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:01:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:01:49:ST3_smx:INFO: Electrons 10:01:49:ST3_smx:INFO: # loops 0 10:01:51:ST3_smx:INFO: # loops 1 10:01:52:ST3_smx:INFO: # loops 2 10:01:54:ST3_smx:INFO: # loops 3 10:01:56:ST3_smx:INFO: # loops 4 10:01:57:ST3_smx:INFO: Total # of broken channels: 0 10:01:57:ST3_smx:INFO: List of broken channels: [] 10:01:57:ST3_smx:INFO: Total # of broken channels: 0 10:01:57:ST3_smx:INFO: List of broken channels: [] 10:01:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:01:58:febtest:INFO: 23-00 | XA-000-09-004-006-013-012-01 | 28.2 | 1189.2 10:01:58:febtest:INFO: 30-01 | XA-000-09-004-006-016-013-10 | 31.4 | 1177.4 10:01:58:febtest:INFO: 21-02 | XA-000-09-004-006-015-013-02 | 31.4 | 1183.3 10:01:59:febtest:INFO: 28-03 | XA-000-09-004-006-017-013-07 | 25.1 | 1189.2 10:01:59:febtest:INFO: 19-04 | XA-000-09-004-006-013-013-01 | 31.4 | 1212.7 10:01:59:febtest:INFO: 26-05 | XA-000-09-004-006-015-012-02 | 25.1 | 1206.9 10:01:59:febtest:INFO: 17-06 | XA-000-09-004-006-016-015-10 | 15.6 | 1247.9 10:02:00:febtest:INFO: 24-07 | XA-000-09-004-006-014-012-15 | 37.7 | 1171.5 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 25_01_29-09_59_47 OPERATOR : Alois Alzheimer SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2316| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ SENSOR_NAME: 29194 | SIZE: 62x124 | GRADE: C MODULE_NAME: M4UR5T2011332A2 LADDER_NAME: L4UR501133 ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4490', '1.848', '1.5590'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0480', '1.850', '2.5800'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9940', '1.850', '0.5313']