09:48:25:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:48:25:ST3_Shared:INFO:	                         FEB-Sensor                         
09:48:25:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:48:27:ST3_Shared:INFO:	STS mode selected
09:48:41:ST3_ModuleSelector:DEBUG:	M4UR5T0011330A2

09:48:41:ST3_ModuleSelector:DEBUG:	
09:48:41:ST3_ModuleSelector:DEBUG:	
09:48:41:ST3_ModuleSelector:DEBUG:	
09:48:41:ST3_ModuleSelector:DEBUG:	
09:48:41:ST3_ModuleSelector:DEBUG:	M4UR5T0011330A2

09:48:41:ST3_ModuleSelector:DEBUG:	
09:48:41:ST3_ModuleSelector:DEBUG:	
09:48:41:ST3_ModuleSelector:DEBUG:	
09:48:41:ST3_ModuleSelector:DEBUG:	
09:48:58:ST3_ModuleSelector:INFO:	New Sensor ID: 03462
09:48:58:ST3_ModuleSelector:DEBUG:	M4UR5T0011330A2

09:48:58:ST3_ModuleSelector:DEBUG:	
09:48:58:ST3_ModuleSelector:DEBUG:	03462
09:48:58:ST3_ModuleSelector:DEBUG:	62x42
09:48:58:ST3_ModuleSelector:DEBUG:	
09:49:09:ST3_ModuleSelector:INFO:	M4UR5T0011330A2

09:49:09:ST3_ModuleSelector:INFO:	03462
09:49:09:febtest:INFO:	Testing FEB with SN 2318
09:49:10:smx_tester:INFO:	Scanning setup
09:49:10:elinks:INFO:	Disabling clock on downlink 0
09:49:10:elinks:INFO:	Disabling clock on downlink 1
09:49:10:elinks:INFO:	Disabling clock on downlink 2
09:49:10:elinks:INFO:	Disabling clock on downlink 3
09:49:10:elinks:INFO:	Disabling clock on downlink 4
09:49:10:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:49:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:49:10:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:49:10:elinks:INFO:	Disabling clock on downlink 0
09:49:10:elinks:INFO:	Disabling clock on downlink 1
09:49:10:elinks:INFO:	Disabling clock on downlink 2
09:49:10:elinks:INFO:	Disabling clock on downlink 3
09:49:10:elinks:INFO:	Disabling clock on downlink 4
09:49:10:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:49:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:49:10:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:49:10:elinks:INFO:	Disabling clock on downlink 0
09:49:10:elinks:INFO:	Disabling clock on downlink 1
09:49:10:elinks:INFO:	Disabling clock on downlink 2
09:49:10:elinks:INFO:	Disabling clock on downlink 3
09:49:10:elinks:INFO:	Disabling clock on downlink 4
09:49:10:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:49:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:49:11:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:49:11:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:49:11:elinks:INFO:	Disabling clock on downlink 0
09:49:11:elinks:INFO:	Disabling clock on downlink 1
09:49:11:elinks:INFO:	Disabling clock on downlink 2
09:49:11:elinks:INFO:	Disabling clock on downlink 3
09:49:11:elinks:INFO:	Disabling clock on downlink 4
09:49:11:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:49:11:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:49:11:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:49:11:elinks:INFO:	Disabling clock on downlink 0
09:49:11:elinks:INFO:	Disabling clock on downlink 1
09:49:11:elinks:INFO:	Disabling clock on downlink 2
09:49:11:elinks:INFO:	Disabling clock on downlink 3
09:49:11:elinks:INFO:	Disabling clock on downlink 4
09:49:11:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:49:11:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:49:11:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:49:11:setup_element:INFO:	Scanning clock phase
09:49:11:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:49:11:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:49:11:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:49:11:setup_element:INFO:	Eye window for uplink 16: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:49:11:setup_element:INFO:	Eye window for uplink 17: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:49:11:setup_element:INFO:	Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:49:11:setup_element:INFO:	Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:49:11:setup_element:INFO:	Eye window for uplink 20: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:49:11:setup_element:INFO:	Eye window for uplink 21: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:49:11:setup_element:INFO:	Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:49:11:setup_element:INFO:	Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:49:11:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:49:11:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:49:11:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:49:11:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:49:11:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:49:11:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:49:11:setup_element:INFO:	Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:49:11:setup_element:INFO:	Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:49:11:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
09:49:11:setup_element:INFO:	Scanning data phases
09:49:11:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:49:11:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:49:17:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:49:17:setup_element:INFO:	Eye window for uplink 16: XXXXX_________________________________XX
Data delay found: 21
09:49:17:setup_element:INFO:	Eye window for uplink 17: XXX________________________________XXXXX
Data delay found: 18
09:49:17:setup_element:INFO:	Eye window for uplink 18: XXX__________________________________XXX
Data delay found: 19
09:49:17:setup_element:INFO:	Eye window for uplink 19: XX________________________________X_XXXX
Data delay found: 17
09:49:17:setup_element:INFO:	Eye window for uplink 20: XXX______________________________XXXXXXX
Data delay found: 17
09:49:17:setup_element:INFO:	Eye window for uplink 21: X________________________________XXXXXXX
Data delay found: 16
09:49:17:setup_element:INFO:	Eye window for uplink 22: XXXX________________________________XXXX
Data delay found: 19
09:49:17:setup_element:INFO:	Eye window for uplink 23: XXXXXXX____________________________XXXXX
Data delay found: 20
09:49:17:setup_element:INFO:	Eye window for uplink 24: ____XXXXXXXXXXX_________________________
Data delay found: 29
09:49:17:setup_element:INFO:	Eye window for uplink 25: ____X__XXXXXXXXXX_______________________
Data delay found: 30
09:49:17:setup_element:INFO:	Eye window for uplink 26: ______XXXXXXXXXX________________________
Data delay found: 30
09:49:17:setup_element:INFO:	Eye window for uplink 27: _________X_XXXXXXXX_____________________
Data delay found: 33
09:49:17:setup_element:INFO:	Eye window for uplink 28: _________XXXXXXXXXXXX___________________
Data delay found: 34
09:49:17:setup_element:INFO:	Eye window for uplink 29: ____________XXX_XXXXXXXX________________
Data delay found: 37
09:49:17:setup_element:INFO:	Eye window for uplink 30: _________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 4
09:49:17:setup_element:INFO:	Eye window for uplink 31: _________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 4
09:49:17:setup_element:INFO:	Setting the data phase to 21 for uplink 16
09:49:17:setup_element:INFO:	Setting the data phase to 18 for uplink 17
09:49:17:setup_element:INFO:	Setting the data phase to 19 for uplink 18
09:49:17:setup_element:INFO:	Setting the data phase to 17 for uplink 19
09:49:17:setup_element:INFO:	Setting the data phase to 17 for uplink 20
09:49:17:setup_element:INFO:	Setting the data phase to 16 for uplink 21
09:49:17:setup_element:INFO:	Setting the data phase to 19 for uplink 22
09:49:17:setup_element:INFO:	Setting the data phase to 20 for uplink 23
09:49:17:setup_element:INFO:	Setting the data phase to 29 for uplink 24
09:49:17:setup_element:INFO:	Setting the data phase to 30 for uplink 25
09:49:17:setup_element:INFO:	Setting the data phase to 30 for uplink 26
09:49:17:setup_element:INFO:	Setting the data phase to 33 for uplink 27
09:49:17:setup_element:INFO:	Setting the data phase to 34 for uplink 28
09:49:17:setup_element:INFO:	Setting the data phase to 37 for uplink 29
09:49:17:setup_element:INFO:	Setting the data phase to 4 for uplink 30
09:49:17:setup_element:INFO:	Setting the data phase to 4 for uplink 31
==============================================OOO==============================================
09:49:17:setup_element:INFO:	Beginning SMX ASICs map scan
09:49:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:49:17:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:49:17:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:49:17:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:49:17:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:49:17:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:49:17:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:49:17:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:49:17:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:49:17:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:49:17:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:49:17:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:49:17:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:49:17:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:49:17:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:49:18:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:49:18:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:49:18:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:49:18:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:49:18:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:49:18:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:49:19:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink 16: _______________________________________________________________________XXXXXXX__
      Uplink 17: _______________________________________________________________________XXXXXXX__
      Uplink 18: ______________________________________________________________________XXXXXXXX__
      Uplink 19: ______________________________________________________________________XXXXXXXX__
      Uplink 20: _____________________________________________________________________XXXXXXXXX__
      Uplink 21: _____________________________________________________________________XXXXXXXXX__
      Uplink 22: _____________________________________________________________________XXXXXXXXX__
      Uplink 23: _____________________________________________________________________XXXXXXXXX__
      Uplink 24: ______________________________________________________________________XXXXXXXX__
      Uplink 25: ______________________________________________________________________XXXXXXXX__
      Uplink 26: _____________________________________________________________________XXXXXXXXX__
      Uplink 27: _____________________________________________________________________XXXXXXXXX__
      Uplink 28: _______________________________________________________________________XXXXXXXX_
      Uplink 29: _______________________________________________________________________XXXXXXXX_
      Uplink 30: ______________________________________________________________________XXXXXXXX__
      Uplink 31: ______________________________________________________________________XXXXXXXX__
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXXXX_________________________________XX
    Uplink 17:
      Optimal Phase: 18
      Window Length: 32
      Eye Window: XXX________________________________XXXXX
    Uplink 18:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 19:
      Optimal Phase: 17
      Window Length: 32
      Eye Window: XX________________________________X_XXXX
    Uplink 20:
      Optimal Phase: 17
      Window Length: 30
      Eye Window: XXX______________________________XXXXXXX
    Uplink 21:
      Optimal Phase: 16
      Window Length: 32
      Eye Window: X________________________________XXXXXXX
    Uplink 22:
      Optimal Phase: 19
      Window Length: 32
      Eye Window: XXXX________________________________XXXX
    Uplink 23:
      Optimal Phase: 20
      Window Length: 28
      Eye Window: XXXXXXX____________________________XXXXX
    Uplink 24:
      Optimal Phase: 29
      Window Length: 29
      Eye Window: ____XXXXXXXXXXX_________________________
    Uplink 25:
      Optimal Phase: 30
      Window Length: 27
      Eye Window: ____X__XXXXXXXXXX_______________________
    Uplink 26:
      Optimal Phase: 30
      Window Length: 30
      Eye Window: ______XXXXXXXXXX________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 30
      Eye Window: _________X_XXXXXXXX_____________________
    Uplink 28:
      Optimal Phase: 34
      Window Length: 28
      Eye Window: _________XXXXXXXXXXXX___________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 28
      Eye Window: ____________XXX_XXXXXXXX________________
    Uplink 30:
      Optimal Phase: 4
      Window Length: 9
      Eye Window: _________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 31:
      Optimal Phase: 4
      Window Length: 9
      Eye Window: _________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

==============================================OOO==============================================
09:49:19:setup_element:INFO:	Performing Elink synchronization
09:49:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:49:19:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:49:19:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:49:19:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
09:49:19:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:49:19:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:49:20:febtest:INFO:	Init all SMX (CSA): 30
09:49:34:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:49:34:febtest:INFO:	23-00 | XA-000-09-004-012-004-020-01 |  40.9 | 1171.5
09:49:35:febtest:INFO:	30-01 | XA-000-09-004-012-006-024-02 |  40.9 | 1165.6
09:49:35:febtest:INFO:	21-02 | XA-000-09-004-012-004-019-01 |  40.9 | 1159.7
09:49:35:febtest:INFO:	28-03 | XA-000-09-004-012-006-025-02 |  47.3 | 1135.9
09:49:35:febtest:INFO:	19-04 | XA-000-09-004-012-007-025-15 |  40.9 | 1159.7
09:49:35:febtest:INFO:	26-05 | XA-000-09-004-012-008-026-11 |  47.3 | 1135.9
09:49:36:febtest:INFO:	17-06 | XA-000-09-004-012-009-025-06 |  40.9 | 1165.6
09:49:36:febtest:INFO:	24-07 | XA-000-09-004-012-009-026-06 |  44.1 | 1141.9
09:49:37:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:49:39:ST3_smx:INFO:	chip: 23-0 	 40.898880 C 	 1183.292940 mV
09:49:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:49:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:49:39:ST3_smx:INFO:		Electrons
09:49:39:ST3_smx:INFO:	# loops 0
09:49:40:ST3_smx:INFO:	# loops 1
09:49:42:ST3_smx:INFO:	# loops 2
09:49:44:ST3_smx:INFO:	# loops 3
09:49:45:ST3_smx:INFO:	# loops 4
09:49:47:ST3_smx:INFO:	Total # of broken channels: 0
09:49:47:ST3_smx:INFO:	List of broken channels: []
09:49:47:ST3_smx:INFO:	Total # of broken channels: 0
09:49:47:ST3_smx:INFO:	List of broken channels: []
09:49:48:ST3_smx:INFO:	chip: 30-1 	 40.898880 C 	 1177.390875 mV
09:49:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:49:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:49:48:ST3_smx:INFO:		Electrons
09:49:48:ST3_smx:INFO:	# loops 0
09:49:50:ST3_smx:INFO:	# loops 1
09:49:52:ST3_smx:INFO:	# loops 2
09:49:53:ST3_smx:INFO:	# loops 3
09:49:55:ST3_smx:INFO:	# loops 4
09:49:56:ST3_smx:INFO:	Total # of broken channels: 0
09:49:56:ST3_smx:INFO:	List of broken channels: []
09:49:56:ST3_smx:INFO:	Total # of broken channels: 1
09:49:56:ST3_smx:INFO:	List of broken channels: [0]
09:49:58:ST3_smx:INFO:	chip: 21-2 	 44.073563 C 	 1171.483840 mV
09:49:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:49:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:49:58:ST3_smx:INFO:		Electrons
09:49:58:ST3_smx:INFO:	# loops 0
09:50:00:ST3_smx:INFO:	# loops 1
09:50:01:ST3_smx:INFO:	# loops 2
09:50:03:ST3_smx:INFO:	# loops 3
09:50:04:ST3_smx:INFO:	# loops 4
09:50:06:ST3_smx:INFO:	Total # of broken channels: 0
09:50:06:ST3_smx:INFO:	List of broken channels: []
09:50:06:ST3_smx:INFO:	Total # of broken channels: 1
09:50:06:ST3_smx:INFO:	List of broken channels: [126]
09:50:07:ST3_smx:INFO:	chip: 28-3 	 50.430383 C 	 1147.806000 mV
09:50:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:50:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:50:07:ST3_smx:INFO:		Electrons
09:50:07:ST3_smx:INFO:	# loops 0
09:50:09:ST3_smx:INFO:	# loops 1
09:50:11:ST3_smx:INFO:	# loops 2
09:50:12:ST3_smx:INFO:	# loops 3
09:50:14:ST3_smx:INFO:	# loops 4
09:50:15:ST3_smx:INFO:	Total # of broken channels: 0
09:50:15:ST3_smx:INFO:	List of broken channels: []
09:50:15:ST3_smx:INFO:	Total # of broken channels: 1
09:50:15:ST3_smx:INFO:	List of broken channels: [127]
09:50:17:ST3_smx:INFO:	chip: 19-4 	 40.898880 C 	 1171.483840 mV
09:50:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:50:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:50:17:ST3_smx:INFO:		Electrons
09:50:17:ST3_smx:INFO:	# loops 0
09:50:19:ST3_smx:INFO:	# loops 1
09:50:20:ST3_smx:INFO:	# loops 2
09:50:22:ST3_smx:INFO:	# loops 3
09:50:23:ST3_smx:INFO:	# loops 4
09:50:25:ST3_smx:INFO:	Total # of broken channels: 0
09:50:25:ST3_smx:INFO:	List of broken channels: []
09:50:25:ST3_smx:INFO:	Total # of broken channels: 0
09:50:25:ST3_smx:INFO:	List of broken channels: []
09:50:26:ST3_smx:INFO:	chip: 26-5 	 50.430383 C 	 1153.732915 mV
09:50:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:50:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:50:26:ST3_smx:INFO:		Electrons
09:50:26:ST3_smx:INFO:	# loops 0
09:50:28:ST3_smx:INFO:	# loops 1
09:50:30:ST3_smx:INFO:	# loops 2
09:50:31:ST3_smx:INFO:	# loops 3
09:50:33:ST3_smx:INFO:	# loops 4
09:50:34:ST3_smx:INFO:	Total # of broken channels: 1
09:50:34:ST3_smx:INFO:	List of broken channels: [0]
09:50:34:ST3_smx:INFO:	Total # of broken channels: 1
09:50:34:ST3_smx:INFO:	List of broken channels: [0]
09:50:36:ST3_smx:INFO:	chip: 17-6 	 44.073563 C 	 1206.851500 mV
09:50:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:50:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:50:36:ST3_smx:INFO:		Electrons
09:50:36:ST3_smx:INFO:	# loops 0
09:50:37:ST3_smx:INFO:	# loops 1
09:50:39:ST3_smx:INFO:	# loops 2
09:50:41:ST3_smx:INFO:	# loops 3
09:50:42:ST3_smx:INFO:	# loops 4
09:50:44:ST3_smx:INFO:	Total # of broken channels: 0
09:50:44:ST3_smx:INFO:	List of broken channels: []
09:50:44:ST3_smx:INFO:	Total # of broken channels: 0
09:50:44:ST3_smx:INFO:	List of broken channels: []
09:50:45:ST3_smx:INFO:	chip: 24-7 	 47.250730 C 	 1153.732915 mV
09:50:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:50:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:50:45:ST3_smx:INFO:		Electrons
09:50:45:ST3_smx:INFO:	# loops 0
09:50:47:ST3_smx:INFO:	# loops 1
09:50:48:ST3_smx:INFO:	# loops 2
09:50:50:ST3_smx:INFO:	# loops 3
09:50:51:ST3_smx:INFO:	# loops 4
09:50:53:ST3_smx:INFO:	Total # of broken channels: 1
09:50:53:ST3_smx:INFO:	List of broken channels: [22]
09:50:53:ST3_smx:INFO:	Total # of broken channels: 1
09:50:53:ST3_smx:INFO:	List of broken channels: [22]
09:50:53:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:50:53:febtest:INFO:	23-00 | XA-000-09-004-012-004-020-01 |  47.3 | 1201.0
09:50:54:febtest:INFO:	30-01 | XA-000-09-004-012-006-024-02 |  44.1 | 1201.0
09:50:54:febtest:INFO:	21-02 | XA-000-09-004-012-004-019-01 |  47.3 | 1189.2
09:50:54:febtest:INFO:	28-03 | XA-000-09-004-012-006-025-02 |  53.6 | 1171.5
09:50:54:febtest:INFO:	19-04 | XA-000-09-004-012-007-025-15 |  44.1 | 1189.2
09:50:55:febtest:INFO:	26-05 | XA-000-09-004-012-008-026-11 |  50.4 | 1171.5
09:50:55:febtest:INFO:	17-06 | XA-000-09-004-012-009-025-06 |  40.9 | 1578.5
09:50:55:febtest:INFO:	24-07 | XA-000-09-004-012-009-026-06 |  47.3 | 1171.5
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_01_20-09_48_25
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2318| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 03462 | SIZE: 62x42 | GRADE: 
MODULE_NAME: M4UR5T0011330A2

LADDER_NAME: 
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4820', '1.848', '2.4850']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0150', '1.850', '2.5570']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9830', '1.850', '0.5310']