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FEB_2319 30.01.25 08:45:31
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08:45:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:45:31:ST3_Shared:INFO: FEB-Sensor
08:45:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:45:39:ST3_ModuleSelector:DEBUG: M4UR3B1011311B2
08:45:39:ST3_ModuleSelector:DEBUG: L4UR301131
08:45:39:ST3_ModuleSelector:DEBUG: 17382
08:45:39:ST3_ModuleSelector:DEBUG: 62x42
08:45:39:ST3_ModuleSelector:DEBUG: A
08:45:39:ST3_ModuleSelector:DEBUG: M4UR3B1011311B2
08:45:39:ST3_ModuleSelector:DEBUG: L4UR301131
08:45:39:ST3_ModuleSelector:DEBUG: 17382
08:45:39:ST3_ModuleSelector:DEBUG: 62x42
08:45:39:ST3_ModuleSelector:DEBUG: A
08:45:45:ST3_ModuleSelector:INFO: M4UR3B1011311B2
08:45:45:ST3_ModuleSelector:INFO: 17382
08:45:45:febtest:INFO: Testing FEB with SN 2319
08:45:47:smx_tester:INFO: Scanning setup
08:45:47:elinks:INFO: Disabling clock on downlink 0
08:45:47:elinks:INFO: Disabling clock on downlink 1
08:45:47:elinks:INFO: Disabling clock on downlink 2
08:45:47:elinks:INFO: Disabling clock on downlink 3
08:45:47:elinks:INFO: Disabling clock on downlink 4
08:45:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:45:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:45:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:45:47:elinks:INFO: Disabling clock on downlink 0
08:45:47:elinks:INFO: Disabling clock on downlink 1
08:45:47:elinks:INFO: Disabling clock on downlink 2
08:45:47:elinks:INFO: Disabling clock on downlink 3
08:45:47:elinks:INFO: Disabling clock on downlink 4
08:45:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:45:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:45:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:45:47:elinks:INFO: Disabling clock on downlink 0
08:45:47:elinks:INFO: Disabling clock on downlink 1
08:45:47:elinks:INFO: Disabling clock on downlink 2
08:45:47:elinks:INFO: Disabling clock on downlink 3
08:45:47:elinks:INFO: Disabling clock on downlink 4
08:45:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:45:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:45:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:45:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:45:48:elinks:INFO: Disabling clock on downlink 0
08:45:48:elinks:INFO: Disabling clock on downlink 1
08:45:48:elinks:INFO: Disabling clock on downlink 2
08:45:48:elinks:INFO: Disabling clock on downlink 3
08:45:48:elinks:INFO: Disabling clock on downlink 4
08:45:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:45:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:45:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:45:48:elinks:INFO: Disabling clock on downlink 0
08:45:48:elinks:INFO: Disabling clock on downlink 1
08:45:48:elinks:INFO: Disabling clock on downlink 2
08:45:48:elinks:INFO: Disabling clock on downlink 3
08:45:48:elinks:INFO: Disabling clock on downlink 4
08:45:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:45:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:45:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:45:48:setup_element:INFO: Scanning clock phase
08:45:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:45:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:45:48:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:45:48:setup_element:INFO: Eye window for uplink 16: X__________________________________________________________________________XXXXX
Clock Delay: 37
08:45:48:setup_element:INFO: Eye window for uplink 17: X__________________________________________________________________________XXXXX
Clock Delay: 37
08:45:48:setup_element:INFO: Eye window for uplink 18: _________________________________________________________________________XXXXXXX
Clock Delay: 36
08:45:48:setup_element:INFO: Eye window for uplink 19: _________________________________________________________________________XXXXXXX
Clock Delay: 36
08:45:48:setup_element:INFO: Eye window for uplink 20: X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:45:48:setup_element:INFO: Eye window for uplink 21: X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:45:48:setup_element:INFO: Eye window for uplink 22: X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:45:48:setup_element:INFO: Eye window for uplink 23: X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:45:48:setup_element:INFO: Eye window for uplink 24: X________________________________________________________________________XXXXXXX
Clock Delay: 36
08:45:48:setup_element:INFO: Eye window for uplink 25: X________________________________________________________________________XXXXXXX
Clock Delay: 36
08:45:48:setup_element:INFO: Eye window for uplink 26: X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:45:48:setup_element:INFO: Eye window for uplink 27: X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:45:48:setup_element:INFO: Eye window for uplink 28: X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:45:48:setup_element:INFO: Eye window for uplink 29: X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:45:48:setup_element:INFO: Eye window for uplink 30: X__________________________________________________________________________XXXXX
Clock Delay: 37
08:45:48:setup_element:INFO: Eye window for uplink 31: X__________________________________________________________________________XXXXX
Clock Delay: 37
08:45:48:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 2
==============================================OOO==============================================
08:45:48:setup_element:INFO: Scanning data phases
08:45:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:45:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:45:53:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:45:53:setup_element:INFO: Eye window for uplink 16: XXXX_________________________________XXX
Data delay found: 20
08:45:53:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_
Data delay found: 16
08:45:53:setup_element:INFO: Eye window for uplink 18: __________________________________XXXX__
Data delay found: 15
08:45:54:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXXX__
Data delay found: 14
08:45:54:setup_element:INFO: Eye window for uplink 20: X__________________________________XXXXX
Data delay found: 17
08:45:54:setup_element:INFO: Eye window for uplink 21: ___________________________________XXXXX
Data delay found: 17
08:45:54:setup_element:INFO: Eye window for uplink 22: XX_________________________________XXXXX
Data delay found: 18
08:45:54:setup_element:INFO: Eye window for uplink 23: __________________________________XXXXXX
Data delay found: 16
08:45:54:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
08:45:54:setup_element:INFO: Eye window for uplink 25: _______XXXXXX___________________________
Data delay found: 29
08:45:54:setup_element:INFO: Eye window for uplink 26: ______XXXXXX____________________________
Data delay found: 28
08:45:54:setup_element:INFO: Eye window for uplink 27: __________XXXX__________________________
Data delay found: 31
08:45:54:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
08:45:54:setup_element:INFO: Eye window for uplink 29: _____________XXXXXX_____________________
Data delay found: 35
08:45:54:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
08:45:54:setup_element:INFO: Eye window for uplink 31: _______________XXXXX____________________
Data delay found: 37
08:45:54:setup_element:INFO: Setting the data phase to 20 for uplink 16
08:45:54:setup_element:INFO: Setting the data phase to 16 for uplink 17
08:45:54:setup_element:INFO: Setting the data phase to 15 for uplink 18
08:45:54:setup_element:INFO: Setting the data phase to 14 for uplink 19
08:45:54:setup_element:INFO: Setting the data phase to 17 for uplink 20
08:45:54:setup_element:INFO: Setting the data phase to 17 for uplink 21
08:45:54:setup_element:INFO: Setting the data phase to 18 for uplink 22
08:45:54:setup_element:INFO: Setting the data phase to 16 for uplink 23
08:45:54:setup_element:INFO: Setting the data phase to 27 for uplink 24
08:45:54:setup_element:INFO: Setting the data phase to 29 for uplink 25
08:45:54:setup_element:INFO: Setting the data phase to 28 for uplink 26
08:45:54:setup_element:INFO: Setting the data phase to 31 for uplink 27
08:45:54:setup_element:INFO: Setting the data phase to 34 for uplink 28
08:45:54:setup_element:INFO: Setting the data phase to 35 for uplink 29
08:45:54:setup_element:INFO: Setting the data phase to 39 for uplink 30
08:45:54:setup_element:INFO: Setting the data phase to 37 for uplink 31
==============================================OOO==============================================
08:45:54:setup_element:INFO: Beginning SMX ASICs map scan
08:45:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:45:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:45:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:45:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:45:54:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:45:54:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:45:54:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:45:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:45:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:45:54:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:45:54:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:45:54:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:45:54:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:45:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:45:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:45:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:45:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:45:55:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:45:55:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:45:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:45:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:45:56:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 72
Eye Windows:
Uplink 16: X__________________________________________________________________________XXXXX
Uplink 17: X__________________________________________________________________________XXXXX
Uplink 18: _________________________________________________________________________XXXXXXX
Uplink 19: _________________________________________________________________________XXXXXXX
Uplink 20: X_________________________________________________________________________XXXXXX
Uplink 21: X_________________________________________________________________________XXXXXX
Uplink 22: X_________________________________________________________________________XXXXXX
Uplink 23: X_________________________________________________________________________XXXXXX
Uplink 24: X________________________________________________________________________XXXXXXX
Uplink 25: X________________________________________________________________________XXXXXXX
Uplink 26: X_________________________________________________________________________XXXXXX
Uplink 27: X_________________________________________________________________________XXXXXX
Uplink 28: X_________________________________________________________________________XXXXXX
Uplink 29: X_________________________________________________________________________XXXXXX
Uplink 30: X__________________________________________________________________________XXXXX
Uplink 31: X__________________________________________________________________________XXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 17:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 18:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 19:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 20:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 21:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 22:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 23:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 26:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 28:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 30:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 31:
Optimal Phase: 37
Window Length: 35
Eye Window: _______________XXXXX____________________
==============================================OOO==============================================
08:45:56:setup_element:INFO: Performing Elink synchronization
08:45:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:45:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:45:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:45:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
08:45:56:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:45:56:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:45:57:febtest:INFO: Init all SMX (CSA): 30
08:46:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:46:12:febtest:INFO: 23-00 | XA-000-09-004-007-005-005-05 | 47.3 | 1124.0
08:46:12:febtest:INFO: 30-01 | XA-000-09-004-007-004-011-08 | 25.1 | 1189.2
08:46:12:febtest:INFO: 21-02 | XA-000-09-004-007-006-005-11 | 34.6 | 1159.7
08:46:13:febtest:INFO: 28-03 | XA-000-09-004-007-005-011-05 | 37.7 | 1159.7
08:46:13:febtest:INFO: 19-04 | XA-000-09-004-007-006-006-11 | 31.4 | 1171.5
08:46:13:febtest:INFO: 26-05 | XA-000-09-004-007-005-004-05 | 44.1 | 1112.1
08:46:13:febtest:INFO: 17-06 | XA-000-09-004-007-009-002-15 | 34.6 | 1171.5
08:46:13:febtest:INFO: 24-07 | XA-000-09-004-007-008-002-02 | 34.6 | 1165.6
08:46:14:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:46:16:ST3_smx:INFO: chip: 23-0 47.250730 C 1129.995435 mV
08:46:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:16:ST3_smx:INFO: Electrons
08:46:16:ST3_smx:INFO: # loops 0
08:46:18:ST3_smx:INFO: # loops 1
08:46:20:ST3_smx:INFO: # loops 2
08:46:21:ST3_smx:INFO: # loops 3
08:46:23:ST3_smx:INFO: # loops 4
08:46:25:ST3_smx:INFO: Total # of broken channels: 0
08:46:25:ST3_smx:INFO: List of broken channels: []
08:46:25:ST3_smx:INFO: Total # of broken channels: 0
08:46:25:ST3_smx:INFO: List of broken channels: []
08:46:27:ST3_smx:INFO: chip: 30-1 25.062742 C 1200.969315 mV
08:46:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:27:ST3_smx:INFO: Electrons
08:46:27:ST3_smx:INFO: # loops 0
08:46:29:ST3_smx:INFO: # loops 1
08:46:30:ST3_smx:INFO: # loops 2
08:46:32:ST3_smx:INFO: # loops 3
08:46:34:ST3_smx:INFO: # loops 4
08:46:35:ST3_smx:INFO: Total # of broken channels: 0
08:46:35:ST3_smx:INFO: List of broken channels: []
08:46:35:ST3_smx:INFO: Total # of broken channels: 1
08:46:35:ST3_smx:INFO: List of broken channels: [65]
08:46:37:ST3_smx:INFO: chip: 21-2 34.556970 C 1165.571835 mV
08:46:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:37:ST3_smx:INFO: Electrons
08:46:37:ST3_smx:INFO: # loops 0
08:46:39:ST3_smx:INFO: # loops 1
08:46:40:ST3_smx:INFO: # loops 2
08:46:42:ST3_smx:INFO: # loops 3
08:46:44:ST3_smx:INFO: # loops 4
08:46:45:ST3_smx:INFO: Total # of broken channels: 0
08:46:45:ST3_smx:INFO: List of broken channels: []
08:46:45:ST3_smx:INFO: Total # of broken channels: 0
08:46:45:ST3_smx:INFO: List of broken channels: []
08:46:47:ST3_smx:INFO: chip: 28-3 34.556970 C 1171.483840 mV
08:46:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:47:ST3_smx:INFO: Electrons
08:46:47:ST3_smx:INFO: # loops 0
08:46:49:ST3_smx:INFO: # loops 1
08:46:51:ST3_smx:INFO: # loops 2
08:46:52:ST3_smx:INFO: # loops 3
08:46:54:ST3_smx:INFO: # loops 4
08:46:55:ST3_smx:INFO: Total # of broken channels: 0
08:46:55:ST3_smx:INFO: List of broken channels: []
08:46:55:ST3_smx:INFO: Total # of broken channels: 0
08:46:55:ST3_smx:INFO: List of broken channels: []
08:46:57:ST3_smx:INFO: chip: 19-4 31.389742 C 1183.292940 mV
08:46:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:46:57:ST3_smx:INFO: Electrons
08:46:57:ST3_smx:INFO: # loops 0
08:46:59:ST3_smx:INFO: # loops 1
08:47:01:ST3_smx:INFO: # loops 2
08:47:02:ST3_smx:INFO: # loops 3
08:47:04:ST3_smx:INFO: # loops 4
08:47:06:ST3_smx:INFO: Total # of broken channels: 1
08:47:06:ST3_smx:INFO: List of broken channels: [75]
08:47:06:ST3_smx:INFO: Total # of broken channels: 0
08:47:06:ST3_smx:INFO: List of broken channels: []
08:47:07:ST3_smx:INFO: chip: 26-5 44.073563 C 1124.048640 mV
08:47:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:47:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:47:07:ST3_smx:INFO: Electrons
08:47:07:ST3_smx:INFO: # loops 0
08:47:09:ST3_smx:INFO: # loops 1
08:47:11:ST3_smx:INFO: # loops 2
08:47:12:ST3_smx:INFO: # loops 3
08:47:14:ST3_smx:INFO: # loops 4
08:47:16:ST3_smx:INFO: Total # of broken channels: 0
08:47:16:ST3_smx:INFO: List of broken channels: []
08:47:16:ST3_smx:INFO: Total # of broken channels: 0
08:47:16:ST3_smx:INFO: List of broken channels: []
08:47:18:ST3_smx:INFO: chip: 17-6 37.726682 C 1177.390875 mV
08:47:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:47:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:47:18:ST3_smx:INFO: Electrons
08:47:18:ST3_smx:INFO: # loops 0
08:47:19:ST3_smx:INFO: # loops 1
08:47:21:ST3_smx:INFO: # loops 2
08:47:23:ST3_smx:INFO: # loops 3
08:47:24:ST3_smx:INFO: # loops 4
08:47:26:ST3_smx:INFO: Total # of broken channels: 0
08:47:26:ST3_smx:INFO: List of broken channels: []
08:47:26:ST3_smx:INFO: Total # of broken channels: 0
08:47:26:ST3_smx:INFO: List of broken channels: []
08:47:28:ST3_smx:INFO: chip: 24-7 37.726682 C 1183.292940 mV
08:47:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:47:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:47:28:ST3_smx:INFO: Electrons
08:47:28:ST3_smx:INFO: # loops 0
08:47:29:ST3_smx:INFO: # loops 1
08:47:31:ST3_smx:INFO: # loops 2
08:47:33:ST3_smx:INFO: # loops 3
08:47:34:ST3_smx:INFO: # loops 4
08:47:36:ST3_smx:INFO: Total # of broken channels: 0
08:47:36:ST3_smx:INFO: List of broken channels: []
08:47:36:ST3_smx:INFO: Total # of broken channels: 0
08:47:36:ST3_smx:INFO: List of broken channels: []
08:47:36:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:47:37:febtest:INFO: 23-00 | XA-000-09-004-007-005-005-05 | 47.3 | 1147.8
08:47:37:febtest:INFO: 30-01 | XA-000-09-004-007-004-011-08 | 28.2 | 1224.5
08:47:37:febtest:INFO: 21-02 | XA-000-09-004-007-006-005-11 | 34.6 | 1189.2
08:47:37:febtest:INFO: 28-03 | XA-000-09-004-007-005-011-05 | 37.7 | 1195.1
08:47:37:febtest:INFO: 19-04 | XA-000-09-004-007-006-006-11 | 34.6 | 1206.9
08:47:38:febtest:INFO: 26-05 | XA-000-09-004-007-005-004-05 | 47.3 | 1147.8
08:47:38:febtest:INFO: 17-06 | XA-000-09-004-007-009-002-15 | 37.7 | 1195.1
08:47:38:febtest:INFO: 24-07 | XA-000-09-004-007-008-002-02 | 37.7 | 1224.5
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_01_30-08_45_31
OPERATOR : Kerstin S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_2
------------------------------------------------------------
| FEB_SN : 2319| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 17382 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M4UR3B1011311B2
LADDER_NAME: L4UR301131
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5080', '1.849', '2.2260']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0340', '1.850', '2.5840']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9810', '1.850', '0.5313']