FEB_2319    21.01.25 15:18:29

TextEdit.txt
            15:18:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:18:29:ST3_Shared:INFO:	                       FEB-Microcable                       
15:18:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:18:29:febtest:INFO:	Testing FEB with SN 2319
15:18:30:smx_tester:INFO:	Scanning setup
15:18:30:elinks:INFO:	Disabling clock on downlink 0
15:18:30:elinks:INFO:	Disabling clock on downlink 1
15:18:30:elinks:INFO:	Disabling clock on downlink 2
15:18:30:elinks:INFO:	Disabling clock on downlink 3
15:18:30:elinks:INFO:	Disabling clock on downlink 4
15:18:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:18:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:18:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:18:30:elinks:INFO:	Disabling clock on downlink 0
15:18:30:elinks:INFO:	Disabling clock on downlink 1
15:18:30:elinks:INFO:	Disabling clock on downlink 2
15:18:30:elinks:INFO:	Disabling clock on downlink 3
15:18:30:elinks:INFO:	Disabling clock on downlink 4
15:18:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:18:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:18:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:18:31:elinks:INFO:	Disabling clock on downlink 0
15:18:31:elinks:INFO:	Disabling clock on downlink 1
15:18:31:elinks:INFO:	Disabling clock on downlink 2
15:18:31:elinks:INFO:	Disabling clock on downlink 3
15:18:31:elinks:INFO:	Disabling clock on downlink 4
15:18:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:18:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
15:18:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
15:18:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:18:31:elinks:INFO:	Disabling clock on downlink 0
15:18:31:elinks:INFO:	Disabling clock on downlink 1
15:18:31:elinks:INFO:	Disabling clock on downlink 2
15:18:31:elinks:INFO:	Disabling clock on downlink 3
15:18:31:elinks:INFO:	Disabling clock on downlink 4
15:18:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:18:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
15:18:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:18:31:elinks:INFO:	Disabling clock on downlink 0
15:18:31:elinks:INFO:	Disabling clock on downlink 1
15:18:31:elinks:INFO:	Disabling clock on downlink 2
15:18:31:elinks:INFO:	Disabling clock on downlink 3
15:18:31:elinks:INFO:	Disabling clock on downlink 4
15:18:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:18:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
15:18:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
15:18:31:setup_element:INFO:	Scanning clock phase
15:18:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:18:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:18:31:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
15:18:31:setup_element:INFO:	Eye window for uplink 16: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
15:18:31:setup_element:INFO:	Eye window for uplink 17: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
15:18:31:setup_element:INFO:	Eye window for uplink 18: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
15:18:31:setup_element:INFO:	Eye window for uplink 19: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
15:18:31:setup_element:INFO:	Eye window for uplink 20: _________________________________________________________________XXXXXXXXXX_____
Clock Delay: 29
15:18:31:setup_element:INFO:	Eye window for uplink 21: _________________________________________________________________XXXXXXXXXX_____
Clock Delay: 29
15:18:31:setup_element:INFO:	Eye window for uplink 22: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
15:18:31:setup_element:INFO:	Eye window for uplink 23: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
15:18:31:setup_element:INFO:	Eye window for uplink 24: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
15:18:31:setup_element:INFO:	Eye window for uplink 25: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
15:18:31:setup_element:INFO:	Eye window for uplink 26: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
15:18:31:setup_element:INFO:	Eye window for uplink 27: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
15:18:31:setup_element:INFO:	Eye window for uplink 28: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
15:18:31:setup_element:INFO:	Eye window for uplink 29: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
15:18:31:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
15:18:31:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
15:18:31:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 2
==============================================OOO==============================================
15:18:31:setup_element:INFO:	Scanning data phases
15:18:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:18:32:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:18:37:setup_element:INFO:	Data phase scan results for group 0, downlink 2
15:18:37:setup_element:INFO:	Eye window for uplink 16: XXXXX______________________________XXXXX
Data delay found: 19
15:18:37:setup_element:INFO:	Eye window for uplink 17: XXXX_____________________________XXXXXXX
Data delay found: 18
15:18:37:setup_element:INFO:	Eye window for uplink 18: X________________________________XXXXXX_
Data delay found: 16
15:18:37:setup_element:INFO:	Eye window for uplink 19: _______________________________XXXXXXXX_
Data delay found: 14
15:18:37:setup_element:INFO:	Eye window for uplink 20: XX_________________________________XXXXX
Data delay found: 18
15:18:37:setup_element:INFO:	Eye window for uplink 21: XX_________________________________XXXXX
Data delay found: 18
15:18:37:setup_element:INFO:	Eye window for uplink 22: XXXX_______________________________XXXXX
Data delay found: 19
15:18:37:setup_element:INFO:	Eye window for uplink 23: XXXXXXX____________________________XXXXX
Data delay found: 20
15:18:37:setup_element:INFO:	Eye window for uplink 24: ___XXXXXXXXXXXX_________________________
Data delay found: 28
15:18:37:setup_element:INFO:	Eye window for uplink 25: ______XXXXXXXXXXX_______________________
Data delay found: 31
15:18:37:setup_element:INFO:	Eye window for uplink 26: ________XXXXXXX_________________________
Data delay found: 31
15:18:37:setup_element:INFO:	Eye window for uplink 27: ___________XXXXXXXX_____________________
Data delay found: 34
15:18:37:setup_element:INFO:	Eye window for uplink 28: ____________XXXXXXXXX___________________
Data delay found: 36
15:18:37:setup_element:INFO:	Eye window for uplink 29: _____________X_XXXXXXXXX________________
Data delay found: 38
15:18:37:setup_element:INFO:	Eye window for uplink 30: ________________XXXXXXXXX_______________
Data delay found: 0
15:18:37:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXXXXX_______________
Data delay found: 0
15:18:37:setup_element:INFO:	Setting the data phase to 19 for uplink 16
15:18:37:setup_element:INFO:	Setting the data phase to 18 for uplink 17
15:18:37:setup_element:INFO:	Setting the data phase to 16 for uplink 18
15:18:37:setup_element:INFO:	Setting the data phase to 14 for uplink 19
15:18:37:setup_element:INFO:	Setting the data phase to 18 for uplink 20
15:18:37:setup_element:INFO:	Setting the data phase to 18 for uplink 21
15:18:37:setup_element:INFO:	Setting the data phase to 19 for uplink 22
15:18:37:setup_element:INFO:	Setting the data phase to 20 for uplink 23
15:18:37:setup_element:INFO:	Setting the data phase to 28 for uplink 24
15:18:37:setup_element:INFO:	Setting the data phase to 31 for uplink 25
15:18:37:setup_element:INFO:	Setting the data phase to 31 for uplink 26
15:18:37:setup_element:INFO:	Setting the data phase to 34 for uplink 27
15:18:37:setup_element:INFO:	Setting the data phase to 36 for uplink 28
15:18:37:setup_element:INFO:	Setting the data phase to 38 for uplink 29
15:18:37:setup_element:INFO:	Setting the data phase to 0 for uplink 30
15:18:37:setup_element:INFO:	Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
15:18:37:setup_element:INFO:	Beginning SMX ASICs map scan
15:18:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:18:37:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:18:37:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
15:18:37:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
15:18:37:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:18:37:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
15:18:37:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
15:18:37:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:18:37:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:18:38:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
15:18:38:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
15:18:38:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:18:38:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:18:38:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
15:18:38:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
15:18:38:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:18:38:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:18:38:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
15:18:38:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
15:18:38:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:18:38:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:18:40:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 69
    Eye Windows:
      Uplink 16: __________________________________________________________________XXXXXXXXX_____
      Uplink 17: __________________________________________________________________XXXXXXXXX_____
      Uplink 18: _________________________________________________________________XXXXXXXXX______
      Uplink 19: _________________________________________________________________XXXXXXXXX______
      Uplink 20: _________________________________________________________________XXXXXXXXXX_____
      Uplink 21: _________________________________________________________________XXXXXXXXXX_____
      Uplink 22: __________________________________________________________________XXXXXXXXX_____
      Uplink 23: __________________________________________________________________XXXXXXXXX_____
      Uplink 24: __________________________________________________________________XXXXXXXXX_____
      Uplink 25: __________________________________________________________________XXXXXXXXX_____
      Uplink 26: __________________________________________________________________XXXXXXXXX_____
      Uplink 27: __________________________________________________________________XXXXXXXXX_____
      Uplink 28: __________________________________________________________________XXXXXXXXX_____
      Uplink 29: __________________________________________________________________XXXXXXXXX_____
      Uplink 30: ___________________________________________________________________XXXXXXXXX____
      Uplink 31: ___________________________________________________________________XXXXXXXXX____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 19
      Window Length: 30
      Eye Window: XXXXX______________________________XXXXX
    Uplink 17:
      Optimal Phase: 18
      Window Length: 29
      Eye Window: XXXX_____________________________XXXXXXX
    Uplink 18:
      Optimal Phase: 16
      Window Length: 32
      Eye Window: X________________________________XXXXXX_
    Uplink 19:
      Optimal Phase: 14
      Window Length: 32
      Eye Window: _______________________________XXXXXXXX_
    Uplink 20:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 21:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 22:
      Optimal Phase: 19
      Window Length: 31
      Eye Window: XXXX_______________________________XXXXX
    Uplink 23:
      Optimal Phase: 20
      Window Length: 28
      Eye Window: XXXXXXX____________________________XXXXX
    Uplink 24:
      Optimal Phase: 28
      Window Length: 28
      Eye Window: ___XXXXXXXXXXXX_________________________
    Uplink 25:
      Optimal Phase: 31
      Window Length: 29
      Eye Window: ______XXXXXXXXXXX_______________________
    Uplink 26:
      Optimal Phase: 31
      Window Length: 33
      Eye Window: ________XXXXXXX_________________________
    Uplink 27:
      Optimal Phase: 34
      Window Length: 32
      Eye Window: ___________XXXXXXXX_____________________
    Uplink 28:
      Optimal Phase: 36
      Window Length: 31
      Eye Window: ____________XXXXXXXXX___________________
    Uplink 29:
      Optimal Phase: 38
      Window Length: 29
      Eye Window: _____________X_XXXXXXXXX________________
    Uplink 30:
      Optimal Phase: 0
      Window Length: 31
      Eye Window: ________________XXXXXXXXX_______________
    Uplink 31:
      Optimal Phase: 0
      Window Length: 31
      Eye Window: ________________XXXXXXXXX_______________

==============================================OOO==============================================
15:18:40:setup_element:INFO:	Performing Elink synchronization
15:18:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:18:40:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:18:40:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
15:18:40:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
15:18:40:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
15:18:40:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:18:41:febtest:INFO:	Init all SMX (CSA): 30
15:18:55:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:18:55:febtest:INFO:	23-00 | XA-000-09-004-007-005-005-05 |  50.4 | 1118.1
15:18:56:febtest:INFO:	30-01 | XA-000-09-004-007-004-011-08 |  31.4 | 1177.4
15:18:56:febtest:INFO:	21-02 | XA-000-09-004-007-006-005-11 |  37.7 | 1153.7
15:18:56:febtest:INFO:	28-03 | XA-000-09-004-007-005-011-05 |  37.7 | 1153.7
15:18:56:febtest:INFO:	19-04 | XA-000-09-004-007-006-006-11 |  37.7 | 1159.7
15:18:56:febtest:INFO:	26-05 | XA-000-09-004-007-005-004-05 |  47.3 | 1112.1
15:18:57:febtest:INFO:	17-06 | XA-000-09-004-007-009-002-15 |  37.7 | 1165.6
15:18:57:febtest:INFO:	24-07 | XA-000-09-004-007-008-002-02 |  37.7 | 1165.6
15:18:58:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:19:00:ST3_smx:INFO:	chip: 23-0 	 50.430383 C 	 1129.995435 mV
15:19:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:00:ST3_smx:INFO:		Electrons
15:19:00:ST3_smx:INFO:	# loops 0
15:19:01:ST3_smx:INFO:	# loops 1
15:19:03:ST3_smx:INFO:	# loops 2
15:19:05:ST3_smx:INFO:	Total # of broken channels: 0
15:19:05:ST3_smx:INFO:	List of broken channels: []
15:19:05:ST3_smx:INFO:	Total # of broken channels: 0
15:19:05:ST3_smx:INFO:	List of broken channels: []
15:19:06:ST3_smx:INFO:	chip: 30-1 	 31.389742 C 	 1189.190035 mV
15:19:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:06:ST3_smx:INFO:		Electrons
15:19:06:ST3_smx:INFO:	# loops 0
15:19:08:ST3_smx:INFO:	# loops 1
15:19:10:ST3_smx:INFO:	# loops 2
15:19:11:ST3_smx:INFO:	Total # of broken channels: 0
15:19:11:ST3_smx:INFO:	List of broken channels: []
15:19:11:ST3_smx:INFO:	Total # of broken channels: 1
15:19:11:ST3_smx:INFO:	List of broken channels: [11]
15:19:13:ST3_smx:INFO:	chip: 21-2 	 37.726682 C 	 1165.571835 mV
15:19:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:13:ST3_smx:INFO:		Electrons
15:19:13:ST3_smx:INFO:	# loops 0
15:19:15:ST3_smx:INFO:	# loops 1
15:19:16:ST3_smx:INFO:	# loops 2
15:19:18:ST3_smx:INFO:	Total # of broken channels: 0
15:19:18:ST3_smx:INFO:	List of broken channels: []
15:19:18:ST3_smx:INFO:	Total # of broken channels: 0
15:19:18:ST3_smx:INFO:	List of broken channels: []
15:19:20:ST3_smx:INFO:	chip: 28-3 	 37.726682 C 	 1171.483840 mV
15:19:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:20:ST3_smx:INFO:		Electrons
15:19:20:ST3_smx:INFO:	# loops 0
15:19:21:ST3_smx:INFO:	# loops 1
15:19:23:ST3_smx:INFO:	# loops 2
15:19:25:ST3_smx:INFO:	Total # of broken channels: 0
15:19:25:ST3_smx:INFO:	List of broken channels: []
15:19:25:ST3_smx:INFO:	Total # of broken channels: 0
15:19:25:ST3_smx:INFO:	List of broken channels: []
15:19:26:ST3_smx:INFO:	chip: 19-4 	 37.726682 C 	 1171.483840 mV
15:19:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:26:ST3_smx:INFO:		Electrons
15:19:26:ST3_smx:INFO:	# loops 0
15:19:28:ST3_smx:INFO:	# loops 1
15:19:30:ST3_smx:INFO:	# loops 2
15:19:31:ST3_smx:INFO:	Total # of broken channels: 0
15:19:31:ST3_smx:INFO:	List of broken channels: []
15:19:31:ST3_smx:INFO:	Total # of broken channels: 0
15:19:31:ST3_smx:INFO:	List of broken channels: []
15:19:33:ST3_smx:INFO:	chip: 26-5 	 47.250730 C 	 1124.048640 mV
15:19:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:33:ST3_smx:INFO:		Electrons
15:19:33:ST3_smx:INFO:	# loops 0
15:19:35:ST3_smx:INFO:	# loops 1
15:19:36:ST3_smx:INFO:	# loops 2
15:19:38:ST3_smx:INFO:	Total # of broken channels: 0
15:19:38:ST3_smx:INFO:	List of broken channels: []
15:19:38:ST3_smx:INFO:	Total # of broken channels: 0
15:19:38:ST3_smx:INFO:	List of broken channels: []
15:19:40:ST3_smx:INFO:	chip: 17-6 	 40.898880 C 	 1171.483840 mV
15:19:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:40:ST3_smx:INFO:		Electrons
15:19:40:ST3_smx:INFO:	# loops 0
15:19:41:ST3_smx:INFO:	# loops 1
15:19:43:ST3_smx:INFO:	# loops 2
15:19:45:ST3_smx:INFO:	Total # of broken channels: 0
15:19:45:ST3_smx:INFO:	List of broken channels: []
15:19:45:ST3_smx:INFO:	Total # of broken channels: 0
15:19:45:ST3_smx:INFO:	List of broken channels: []
15:19:47:ST3_smx:INFO:	chip: 24-7 	 37.726682 C 	 1183.292940 mV
15:19:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:19:47:ST3_smx:INFO:		Electrons
15:19:47:ST3_smx:INFO:	# loops 0
15:19:48:ST3_smx:INFO:	# loops 1
15:19:50:ST3_smx:INFO:	# loops 2
15:19:51:ST3_smx:INFO:	Total # of broken channels: 0
15:19:51:ST3_smx:INFO:	List of broken channels: []
15:19:51:ST3_smx:INFO:	Total # of broken channels: 0
15:19:51:ST3_smx:INFO:	List of broken channels: []
15:19:52:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:19:52:febtest:INFO:	23-00 | XA-000-09-004-007-005-005-05 |  50.4 | 1153.7
15:19:52:febtest:INFO:	30-01 | XA-000-09-004-007-004-011-08 |  31.4 | 1212.7
15:19:52:febtest:INFO:	21-02 | XA-000-09-004-007-006-005-11 |  37.7 | 1189.2
15:19:53:febtest:INFO:	28-03 | XA-000-09-004-007-005-011-05 |  40.9 | 1195.1
15:19:53:febtest:INFO:	19-04 | XA-000-09-004-007-006-006-11 |  37.7 | 1195.1
15:19:53:febtest:INFO:	26-05 | XA-000-09-004-007-005-004-05 |  50.4 | 1141.9
15:19:53:febtest:INFO:	17-06 | XA-000-09-004-007-009-002-15 |  40.9 | 1195.1
15:19:54:febtest:INFO:	24-07 | XA-000-09-004-007-008-002-02 |  37.7 | 1236.2
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_21-15_18_29
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2319| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4970', '1.847', '2.1710']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9940', '1.850', '2.5980']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9790', '1.850', '0.5292']