FEB_2321    28.01.25 13:29:57

TextEdit.txt
            13:29:57:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:29:57:ST3_Shared:INFO:	                       FEB-Microcable                       
13:29:57:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:29:57:febtest:INFO:	Testing FEB with SN 2321
13:29:59:smx_tester:INFO:	Scanning setup
13:29:59:elinks:INFO:	Disabling clock on downlink 0
13:29:59:elinks:INFO:	Disabling clock on downlink 1
13:29:59:elinks:INFO:	Disabling clock on downlink 2
13:29:59:elinks:INFO:	Disabling clock on downlink 3
13:29:59:elinks:INFO:	Disabling clock on downlink 4
13:29:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:29:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:29:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:29:59:elinks:INFO:	Disabling clock on downlink 0
13:29:59:elinks:INFO:	Disabling clock on downlink 1
13:29:59:elinks:INFO:	Disabling clock on downlink 2
13:29:59:elinks:INFO:	Disabling clock on downlink 3
13:29:59:elinks:INFO:	Disabling clock on downlink 4
13:29:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:29:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:29:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:29:59:elinks:INFO:	Disabling clock on downlink 0
13:29:59:elinks:INFO:	Disabling clock on downlink 1
13:29:59:elinks:INFO:	Disabling clock on downlink 2
13:29:59:elinks:INFO:	Disabling clock on downlink 3
13:29:59:elinks:INFO:	Disabling clock on downlink 4
13:29:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:29:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:30:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:30:00:elinks:INFO:	Disabling clock on downlink 0
13:30:00:elinks:INFO:	Disabling clock on downlink 1
13:30:00:elinks:INFO:	Disabling clock on downlink 2
13:30:00:elinks:INFO:	Disabling clock on downlink 3
13:30:00:elinks:INFO:	Disabling clock on downlink 4
13:30:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:30:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:30:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:30:00:elinks:INFO:	Disabling clock on downlink 0
13:30:00:elinks:INFO:	Disabling clock on downlink 1
13:30:00:elinks:INFO:	Disabling clock on downlink 2
13:30:00:elinks:INFO:	Disabling clock on downlink 3
13:30:00:elinks:INFO:	Disabling clock on downlink 4
13:30:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:30:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:30:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:30:00:setup_element:INFO:	Scanning clock phase
13:30:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:30:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:30:00:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:30:00:setup_element:INFO:	Eye window for uplink 16: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
13:30:00:setup_element:INFO:	Eye window for uplink 17: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
13:30:00:setup_element:INFO:	Eye window for uplink 18: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
13:30:00:setup_element:INFO:	Eye window for uplink 19: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
13:30:00:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________XXXXXXXXXX______
Clock Delay: 28
13:30:00:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________XXXXXXXXXX______
Clock Delay: 28
13:30:00:setup_element:INFO:	Eye window for uplink 22: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
13:30:00:setup_element:INFO:	Eye window for uplink 23: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
13:30:00:setup_element:INFO:	Eye window for uplink 24: ________________________________________________________________XXXXXXXXXX______
Clock Delay: 28
13:30:00:setup_element:INFO:	Eye window for uplink 25: ________________________________________________________________XXXXXXXXXX______
Clock Delay: 28
13:30:00:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:30:00:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:30:00:setup_element:INFO:	Eye window for uplink 28: __________________________________________________________________XXXXXXXXXX____
Clock Delay: 30
13:30:00:setup_element:INFO:	Eye window for uplink 29: __________________________________________________________________XXXXXXXXXX____
Clock Delay: 30
13:30:00:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:30:00:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:30:00:setup_element:INFO:	Setting the clock phase to 29 for group 0, downlink 2
==============================================OOO==============================================
13:30:00:setup_element:INFO:	Scanning data phases
13:30:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:30:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:30:06:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:30:06:setup_element:INFO:	Eye window for uplink 16: XXXXXX______________________________XXXX
Data delay found: 20
13:30:06:setup_element:INFO:	Eye window for uplink 17: XXXXX_______________________________XXXX
Data delay found: 20
13:30:06:setup_element:INFO:	Eye window for uplink 18: XX______________________________X_XXXXXX
Data delay found: 16
13:30:06:setup_element:INFO:	Eye window for uplink 19: X_______________________________XXXXXXXX
Data delay found: 16
13:30:06:setup_element:INFO:	Eye window for uplink 20: XXXX__________________________________XX
Data delay found: 20
13:30:06:setup_element:INFO:	Eye window for uplink 21: XXXX________________________________XXXX
Data delay found: 19
13:30:06:setup_element:INFO:	Eye window for uplink 22: XXX_X_______________________________XXXX
Data delay found: 20
13:30:06:setup_element:INFO:	Eye window for uplink 23: XXXXXX_____________________________XXXXX
Data delay found: 20
13:30:06:setup_element:INFO:	Eye window for uplink 24: ______XXXXXXXX__________________________
Data delay found: 29
13:30:06:setup_element:INFO:	Eye window for uplink 25: ________XXXXXXXX________________________
Data delay found: 31
13:30:06:setup_element:INFO:	Eye window for uplink 26: ________X_XXXXXXXX______________________
Data delay found: 32
13:30:06:setup_element:INFO:	Eye window for uplink 27: ____________XXXXXXXXXXX_________________
Data delay found: 37
13:30:06:setup_element:INFO:	Eye window for uplink 28: _______________XXXXXXXX_________________
Data delay found: 38
13:30:06:setup_element:INFO:	Eye window for uplink 29: _________________XXXXXXXX_______________
Data delay found: 0
13:30:06:setup_element:INFO:	Eye window for uplink 30: _____________XXXXXXXXXXX________________
Data delay found: 38
13:30:06:setup_element:INFO:	Eye window for uplink 31: _____________XXXXXXXXXXX________________
Data delay found: 38
13:30:06:setup_element:INFO:	Setting the data phase to 20 for uplink 16
13:30:06:setup_element:INFO:	Setting the data phase to 20 for uplink 17
13:30:06:setup_element:INFO:	Setting the data phase to 16 for uplink 18
13:30:06:setup_element:INFO:	Setting the data phase to 16 for uplink 19
13:30:06:setup_element:INFO:	Setting the data phase to 20 for uplink 20
13:30:06:setup_element:INFO:	Setting the data phase to 19 for uplink 21
13:30:06:setup_element:INFO:	Setting the data phase to 20 for uplink 22
13:30:06:setup_element:INFO:	Setting the data phase to 20 for uplink 23
13:30:06:setup_element:INFO:	Setting the data phase to 29 for uplink 24
13:30:06:setup_element:INFO:	Setting the data phase to 31 for uplink 25
13:30:06:setup_element:INFO:	Setting the data phase to 32 for uplink 26
13:30:06:setup_element:INFO:	Setting the data phase to 37 for uplink 27
13:30:06:setup_element:INFO:	Setting the data phase to 38 for uplink 28
13:30:06:setup_element:INFO:	Setting the data phase to 0 for uplink 29
13:30:06:setup_element:INFO:	Setting the data phase to 38 for uplink 30
13:30:06:setup_element:INFO:	Setting the data phase to 38 for uplink 31
==============================================OOO==============================================
13:30:06:setup_element:INFO:	Beginning SMX ASICs map scan
13:30:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:30:06:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:30:06:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:30:06:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:30:06:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:30:06:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:30:06:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:30:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:30:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:30:06:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:30:06:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:30:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:30:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:30:07:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:30:07:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:30:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:30:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:30:07:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:30:07:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:30:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:30:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:30:08:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 29
    Window Length: 68
    Eye Windows:
      Uplink 16: __________________________________________________________________XXXXXXXXX_____
      Uplink 17: __________________________________________________________________XXXXXXXXX_____
      Uplink 18: _________________________________________________________________XXXXXXXXX______
      Uplink 19: _________________________________________________________________XXXXXXXXX______
      Uplink 20: ________________________________________________________________XXXXXXXXXX______
      Uplink 21: ________________________________________________________________XXXXXXXXXX______
      Uplink 22: __________________________________________________________________XXXXXXXX______
      Uplink 23: __________________________________________________________________XXXXXXXX______
      Uplink 24: ________________________________________________________________XXXXXXXXXX______
      Uplink 25: ________________________________________________________________XXXXXXXXXX______
      Uplink 26: ___________________________________________________________________XXXXXXXXX____
      Uplink 27: ___________________________________________________________________XXXXXXXXX____
      Uplink 28: __________________________________________________________________XXXXXXXXXX____
      Uplink 29: __________________________________________________________________XXXXXXXXXX____
      Uplink 30: ___________________________________________________________________XXXXXXXX_____
      Uplink 31: ___________________________________________________________________XXXXXXXX_____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 20
      Window Length: 30
      Eye Window: XXXXXX______________________________XXXX
    Uplink 17:
      Optimal Phase: 20
      Window Length: 31
      Eye Window: XXXXX_______________________________XXXX
    Uplink 18:
      Optimal Phase: 16
      Window Length: 30
      Eye Window: XX______________________________X_XXXXXX
    Uplink 19:
      Optimal Phase: 16
      Window Length: 31
      Eye Window: X_______________________________XXXXXXXX
    Uplink 20:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 21:
      Optimal Phase: 19
      Window Length: 32
      Eye Window: XXXX________________________________XXXX
    Uplink 22:
      Optimal Phase: 20
      Window Length: 31
      Eye Window: XXX_X_______________________________XXXX
    Uplink 23:
      Optimal Phase: 20
      Window Length: 29
      Eye Window: XXXXXX_____________________________XXXXX
    Uplink 24:
      Optimal Phase: 29
      Window Length: 32
      Eye Window: ______XXXXXXXX__________________________
    Uplink 25:
      Optimal Phase: 31
      Window Length: 32
      Eye Window: ________XXXXXXXX________________________
    Uplink 26:
      Optimal Phase: 32
      Window Length: 30
      Eye Window: ________X_XXXXXXXX______________________
    Uplink 27:
      Optimal Phase: 37
      Window Length: 29
      Eye Window: ____________XXXXXXXXXXX_________________
    Uplink 28:
      Optimal Phase: 38
      Window Length: 32
      Eye Window: _______________XXXXXXXX_________________
    Uplink 29:
      Optimal Phase: 0
      Window Length: 32
      Eye Window: _________________XXXXXXXX_______________
    Uplink 30:
      Optimal Phase: 38
      Window Length: 29
      Eye Window: _____________XXXXXXXXXXX________________
    Uplink 31:
      Optimal Phase: 38
      Window Length: 29
      Eye Window: _____________XXXXXXXXXXX________________

==============================================OOO==============================================
13:30:08:setup_element:INFO:	Performing Elink synchronization
13:30:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:30:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:30:08:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:30:08:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
13:30:08:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:30:08:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:30:09:febtest:INFO:	Init all SMX (CSA): 30
13:30:24:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:30:24:febtest:INFO:	23-00 | XA-000-09-004-007-008-017-05 |  37.7 | 1130.0
13:30:24:febtest:INFO:	30-01 | XA-000-09-004-007-009-024-08 |  28.2 | 1165.6
13:30:24:febtest:INFO:	21-02 | XA-000-09-004-007-009-017-08 |  40.9 | 1135.9
13:30:24:febtest:INFO:	28-03 | XA-000-09-004-007-007-025-01 |  25.1 | 1177.4
13:30:25:febtest:INFO:	19-04 | XA-000-09-004-007-007-018-01 |  37.7 | 1141.9
13:30:25:febtest:INFO:	26-05 | XA-000-09-004-007-009-025-08 |  31.4 | 1159.7
13:30:25:febtest:INFO:	17-06 | XA-000-09-004-007-007-023-01 |  34.6 | 1159.7
13:30:25:febtest:INFO:	24-07 | XA-000-09-004-007-008-024-05 |  34.6 | 1153.7
13:30:26:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:30:28:ST3_smx:INFO:	chip: 23-0 	 40.898880 C 	 1141.874115 mV
13:30:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:30:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:30:29:ST3_smx:INFO:		Electrons
13:30:29:ST3_smx:INFO:	# loops 0
13:30:30:ST3_smx:INFO:	# loops 1
13:30:32:ST3_smx:INFO:	# loops 2
13:30:33:ST3_smx:INFO:	Total # of broken channels: 0
13:30:33:ST3_smx:INFO:	List of broken channels: []
13:30:33:ST3_smx:INFO:	Total # of broken channels: 4
13:30:33:ST3_smx:INFO:	List of broken channels: [61, 81, 87, 103]
13:30:35:ST3_smx:INFO:	chip: 30-1 	 28.225000 C 	 1177.390875 mV
13:30:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:30:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:30:35:ST3_smx:INFO:		Electrons
13:30:35:ST3_smx:INFO:	# loops 0
13:30:37:ST3_smx:INFO:	# loops 1
13:30:38:ST3_smx:INFO:	# loops 2
13:30:40:ST3_smx:INFO:	Total # of broken channels: 0
13:30:40:ST3_smx:INFO:	List of broken channels: []
13:30:40:ST3_smx:INFO:	Total # of broken channels: 1
13:30:40:ST3_smx:INFO:	List of broken channels: [25]
13:30:42:ST3_smx:INFO:	chip: 21-2 	 37.726682 C 	 1147.806000 mV
13:30:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:30:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:30:42:ST3_smx:INFO:		Electrons
13:30:42:ST3_smx:INFO:	# loops 0
13:30:43:ST3_smx:INFO:	# loops 1
13:30:45:ST3_smx:INFO:	# loops 2
13:30:47:ST3_smx:INFO:	Total # of broken channels: 0
13:30:47:ST3_smx:INFO:	List of broken channels: []
13:30:47:ST3_smx:INFO:	Total # of broken channels: 0
13:30:47:ST3_smx:INFO:	List of broken channels: []
13:30:48:ST3_smx:INFO:	chip: 28-3 	 25.062742 C 	 1189.190035 mV
13:30:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:30:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:30:48:ST3_smx:INFO:		Electrons
13:30:48:ST3_smx:INFO:	# loops 0
13:30:50:ST3_smx:INFO:	# loops 1
13:30:52:ST3_smx:INFO:	# loops 2
13:30:53:ST3_smx:INFO:	Total # of broken channels: 0
13:30:53:ST3_smx:INFO:	List of broken channels: []
13:30:53:ST3_smx:INFO:	Total # of broken channels: 0
13:30:53:ST3_smx:INFO:	List of broken channels: []
13:30:55:ST3_smx:INFO:	chip: 19-4 	 37.726682 C 	 1153.732915 mV
13:30:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:30:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:30:55:ST3_smx:INFO:		Electrons
13:30:55:ST3_smx:INFO:	# loops 0
13:30:56:ST3_smx:INFO:	# loops 1
13:30:58:ST3_smx:INFO:	# loops 2
13:31:00:ST3_smx:INFO:	Total # of broken channels: 0
13:31:00:ST3_smx:INFO:	List of broken channels: []
13:31:00:ST3_smx:INFO:	Total # of broken channels: 0
13:31:00:ST3_smx:INFO:	List of broken channels: []
13:31:01:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1171.483840 mV
13:31:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:01:ST3_smx:INFO:		Electrons
13:31:01:ST3_smx:INFO:	# loops 0
13:31:03:ST3_smx:INFO:	# loops 1
13:31:05:ST3_smx:INFO:	# loops 2
13:31:06:ST3_smx:INFO:	Total # of broken channels: 0
13:31:06:ST3_smx:INFO:	List of broken channels: []
13:31:06:ST3_smx:INFO:	Total # of broken channels: 0
13:31:06:ST3_smx:INFO:	List of broken channels: []
13:31:08:ST3_smx:INFO:	chip: 17-6 	 34.556970 C 	 1165.571835 mV
13:31:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:08:ST3_smx:INFO:		Electrons
13:31:08:ST3_smx:INFO:	# loops 0
13:31:10:ST3_smx:INFO:	# loops 1
13:31:11:ST3_smx:INFO:	# loops 2
13:31:13:ST3_smx:INFO:	Total # of broken channels: 0
13:31:13:ST3_smx:INFO:	List of broken channels: []
13:31:13:ST3_smx:INFO:	Total # of broken channels: 3
13:31:13:ST3_smx:INFO:	List of broken channels: [33, 113, 115]
13:31:14:ST3_smx:INFO:	chip: 24-7 	 37.726682 C 	 1159.654860 mV
13:31:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:14:ST3_smx:INFO:		Electrons
13:31:14:ST3_smx:INFO:	# loops 0
13:31:16:ST3_smx:INFO:	# loops 1
13:31:18:ST3_smx:INFO:	# loops 2
13:31:19:ST3_smx:INFO:	Total # of broken channels: 0
13:31:19:ST3_smx:INFO:	List of broken channels: []
13:31:19:ST3_smx:INFO:	Total # of broken channels: 0
13:31:19:ST3_smx:INFO:	List of broken channels: []
13:31:20:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:31:20:febtest:INFO:	23-00 | XA-000-09-004-007-008-017-05 |  40.9 | 1159.7
13:31:20:febtest:INFO:	30-01 | XA-000-09-004-007-009-024-08 |  28.2 | 1206.9
13:31:20:febtest:INFO:	21-02 | XA-000-09-004-007-009-017-08 |  40.9 | 1165.6
13:31:21:febtest:INFO:	28-03 | XA-000-09-004-007-007-025-01 |  25.1 | 1212.7
13:31:21:febtest:INFO:	19-04 | XA-000-09-004-007-007-018-01 |  40.9 | 1171.5
13:31:21:febtest:INFO:	26-05 | XA-000-09-004-007-009-025-08 |  31.4 | 1189.2
13:31:21:febtest:INFO:	17-06 | XA-000-09-004-007-007-023-01 |  37.7 | 1183.3
13:31:21:febtest:INFO:	24-07 | XA-000-09-004-007-008-024-05 |  37.7 | 1183.3
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_28-13_29_57
OPERATOR  : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2321| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9370', '1.848', '2.6870']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0000', '1.850', '2.6390']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9860', '1.850', '0.5308']
13:31:34:ST3_Shared:INFO:	Listo of operators:Robert V.;