
FEB_2325 22.01.25 11:28:51
TextEdit.txt
11:28:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:28:51:ST3_Shared:INFO: FEB-Microcable 11:28:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:28:51:febtest:INFO: Testing FEB with SN 2325 11:28:53:smx_tester:INFO: Scanning setup 11:28:53:elinks:INFO: Disabling clock on downlink 0 11:28:53:elinks:INFO: Disabling clock on downlink 1 11:28:53:elinks:INFO: Disabling clock on downlink 2 11:28:53:elinks:INFO: Disabling clock on downlink 3 11:28:53:elinks:INFO: Disabling clock on downlink 4 11:28:53:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:28:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:28:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:28:53:elinks:INFO: Disabling clock on downlink 0 11:28:53:elinks:INFO: Disabling clock on downlink 1 11:28:53:elinks:INFO: Disabling clock on downlink 2 11:28:53:elinks:INFO: Disabling clock on downlink 3 11:28:53:elinks:INFO: Disabling clock on downlink 4 11:28:53:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:28:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:28:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:28:53:elinks:INFO: Disabling clock on downlink 0 11:28:53:elinks:INFO: Disabling clock on downlink 1 11:28:53:elinks:INFO: Disabling clock on downlink 2 11:28:53:elinks:INFO: Disabling clock on downlink 3 11:28:53:elinks:INFO: Disabling clock on downlink 4 11:28:53:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:28:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 11:28:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 11:28:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:28:53:elinks:INFO: Disabling clock on downlink 0 11:28:53:elinks:INFO: Disabling clock on downlink 1 11:28:53:elinks:INFO: Disabling clock on downlink 2 11:28:53:elinks:INFO: Disabling clock on downlink 3 11:28:53:elinks:INFO: Disabling clock on downlink 4 11:28:53:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:28:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 11:28:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:28:53:elinks:INFO: Disabling clock on downlink 0 11:28:53:elinks:INFO: Disabling clock on downlink 1 11:28:53:elinks:INFO: Disabling clock on downlink 2 11:28:53:elinks:INFO: Disabling clock on downlink 3 11:28:53:elinks:INFO: Disabling clock on downlink 4 11:28:53:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:28:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 11:28:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 11:28:53:setup_element:INFO: Scanning clock phase 11:28:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:28:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:28:54:setup_element:INFO: Clock phase scan results for group 0, downlink 2 11:28:54:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________XXXXXXXXX_______ Clock Delay: 28 11:28:54:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________XXXXXXXXX_______ Clock Delay: 28 11:28:54:setup_element:INFO: Eye window for uplink 18: __________________________________________________________________XXXXXXXXX_____ Clock Delay: 30 11:28:54:setup_element:INFO: Eye window for uplink 19: __________________________________________________________________XXXXXXXXX_____ Clock Delay: 30 11:28:54:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________XXXXXXXXX_______ Clock Delay: 28 11:28:54:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________XXXXXXXXX_______ Clock Delay: 28 11:28:54:setup_element:INFO: Eye window for uplink 22: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 11:28:54:setup_element:INFO: Eye window for uplink 23: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 11:28:54:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________XXXXXXXXX_______ Clock Delay: 28 11:28:54:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________XXXXXXXXX_______ Clock Delay: 28 11:28:54:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________ Clock Delay: 40 11:28:54:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________ Clock Delay: 40 11:28:54:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 11:28:54:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 11:28:54:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________XXXXXXXX______ Clock Delay: 29 11:28:54:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________XXXXXXXX______ Clock Delay: 29 11:28:54:setup_element:INFO: Setting the clock phase to 29 for group 0, downlink 2 ==============================================OOO============================================== 11:28:54:setup_element:INFO: Scanning data phases 11:28:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:28:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:28:59:setup_element:INFO: Data phase scan results for group 0, downlink 2 11:28:59:setup_element:INFO: Eye window for uplink 16: XX________________________________XXXXXX Data delay found: 17 11:28:59:setup_element:INFO: Eye window for uplink 17: _______________________________XXXXXXXX_ Data delay found: 14 11:28:59:setup_element:INFO: Eye window for uplink 18: XXXXXX__XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 6 11:28:59:setup_element:INFO: Eye window for uplink 19: XXX_____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 5 11:28:59:setup_element:INFO: Eye window for uplink 20: XXX_____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 5 11:28:59:setup_element:INFO: Eye window for uplink 21: XXX_____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 5 11:28:59:setup_element:INFO: Eye window for uplink 22: XXXXX___________________________XXXXXXXX Data delay found: 18 11:28:59:setup_element:INFO: Eye window for uplink 23: XXXXXXXX_________________________XXXXXXX Data delay found: 20 11:28:59:setup_element:INFO: Eye window for uplink 24: _XXXXXXXXXXX__________________________XX Data delay found: 24 11:28:59:setup_element:INFO: Eye window for uplink 25: ____XXXXXXXXXX__________________________ Data delay found: 28 11:28:59:setup_element:INFO: Eye window for uplink 26: _____XXXXXXXXX__________________________ Data delay found: 29 11:28:59:setup_element:INFO: Eye window for uplink 27: ________XXXXXXXXXXX_____________________ Data delay found: 33 11:28:59:setup_element:INFO: Eye window for uplink 28: __________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 4 11:28:59:setup_element:INFO: Eye window for uplink 29: __________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 4 11:28:59:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXXXXX_________________ Data delay found: 37 11:28:59:setup_element:INFO: Eye window for uplink 31: ___________X_XXXXXXXXXX_________________ Data delay found: 36 11:28:59:setup_element:INFO: Setting the data phase to 17 for uplink 16 11:28:59:setup_element:INFO: Setting the data phase to 14 for uplink 17 11:28:59:setup_element:INFO: Setting the data phase to 6 for uplink 18 11:28:59:setup_element:INFO: Setting the data phase to 5 for uplink 19 11:28:59:setup_element:INFO: Setting the data phase to 5 for uplink 20 11:28:59:setup_element:INFO: Setting the data phase to 5 for uplink 21 11:28:59:setup_element:INFO: Setting the data phase to 18 for uplink 22 11:28:59:setup_element:INFO: Setting the data phase to 20 for uplink 23 11:28:59:setup_element:INFO: Setting the data phase to 24 for uplink 24 11:28:59:setup_element:INFO: Setting the data phase to 28 for uplink 25 11:28:59:setup_element:INFO: Setting the data phase to 29 for uplink 26 11:28:59:setup_element:INFO: Setting the data phase to 33 for uplink 27 11:28:59:setup_element:INFO: Setting the data phase to 4 for uplink 28 11:28:59:setup_element:INFO: Setting the data phase to 4 for uplink 29 11:28:59:setup_element:INFO: Setting the data phase to 37 for uplink 30 11:28:59:setup_element:INFO: Setting the data phase to 36 for uplink 31 ==============================================OOO============================================== 11:28:59:setup_element:INFO: Beginning SMX ASICs map scan 11:28:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:28:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:28:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 11:28:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 11:28:59:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 11:28:59:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 11:28:59:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 11:28:59:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 11:28:59:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 11:29:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 11:29:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 11:29:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 11:29:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 11:29:00:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 11:29:00:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 11:29:00:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 11:29:00:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 11:29:00:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 11:29:00:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 11:29:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 11:29:02:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 29 Window Length: 68 Eye Windows: Uplink 16: ________________________________________________________________XXXXXXXXX_______ Uplink 17: ________________________________________________________________XXXXXXXXX_______ Uplink 18: __________________________________________________________________XXXXXXXXX_____ Uplink 19: __________________________________________________________________XXXXXXXXX_____ Uplink 20: ________________________________________________________________XXXXXXXXX_______ Uplink 21: ________________________________________________________________XXXXXXXXX_______ Uplink 22: ___________________________________________________________________XXXXXXXXX____ Uplink 23: ___________________________________________________________________XXXXXXXXX____ Uplink 24: ________________________________________________________________XXXXXXXXX_______ Uplink 25: ________________________________________________________________XXXXXXXXX_______ Uplink 26: ________________________________________________________________________________ Uplink 27: ________________________________________________________________________________ Uplink 28: ___________________________________________________________________XXXXXXXXX____ Uplink 29: ___________________________________________________________________XXXXXXXXX____ Uplink 30: __________________________________________________________________XXXXXXXX______ Uplink 31: __________________________________________________________________XXXXXXXX______ Data phase characteristics: Uplink 16: Optimal Phase: 17 Window Length: 32 Eye Window: XX________________________________XXXXXX Uplink 17: Optimal Phase: 14 Window Length: 32 Eye Window: _______________________________XXXXXXXX_ Uplink 18: Optimal Phase: 6 Window Length: 2 Eye Window: XXXXXX__XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 19: Optimal Phase: 5 Window Length: 5 Eye Window: XXX_____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 20: Optimal Phase: 5 Window Length: 5 Eye Window: XXX_____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 21: Optimal Phase: 5 Window Length: 5 Eye Window: XXX_____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 22: Optimal Phase: 18 Window Length: 27 Eye Window: XXXXX___________________________XXXXXXXX Uplink 23: Optimal Phase: 20 Window Length: 25 Eye Window: XXXXXXXX_________________________XXXXXXX Uplink 24: Optimal Phase: 24 Window Length: 26 Eye Window: _XXXXXXXXXXX__________________________XX Uplink 25: Optimal Phase: 28 Window Length: 30 Eye Window: ____XXXXXXXXXX__________________________ Uplink 26: Optimal Phase: 29 Window Length: 31 Eye Window: _____XXXXXXXXX__________________________ Uplink 27: Optimal Phase: 33 Window Length: 29 Eye Window: ________XXXXXXXXXXX_____________________ Uplink 28: Optimal Phase: 4 Window Length: 10 Eye Window: __________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 29: Optimal Phase: 4 Window Length: 10 Eye Window: __________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 30: Optimal Phase: 37 Window Length: 30 Eye Window: _____________XXXXXXXXXX_________________ Uplink 31: Optimal Phase: 36 Window Length: 28 Eye Window: ___________X_XXXXXXXXXX_________________ ==============================================OOO============================================== 11:29:02:setup_element:INFO: Performing Elink synchronization 11:29:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:29:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:29:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 11:29:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 11:29:02:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 11:29:02:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 1 | [(0, 19)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 11:29:03:febtest:INFO: Init all SMX (CSA): 30 11:29:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:29:17:febtest:INFO: 23-00 | XA-000-09-004-006-010-010-09 | 25.1 | 1171.5 11:29:17:febtest:INFO: 30-01 | XA-000-09-004-006-012-006-12 | 34.6 | 1118.1 11:29:18:febtest:INFO: 21-02 | XA-000-09-004-006-011-011-04 | 31.4 | 1153.7 11:29:18:febtest:INFO: 28-03 | XA-000-09-004-006-010-019-14 | 28.2 | 1141.9 11:29:18:febtest:INFO: 19-04 | XA-000-09-004-006-012-007-12 | 37.7 | 1135.9 11:29:18:febtest:INFO: 26-05 | XA-000-09-004-006-011-006-04 | 34.6 | 1130.0 11:29:18:febtest:INFO: 17-06 | XA-000-09-004-006-012-009-12 | 31.4 | 1153.7 11:29:19:febtest:INFO: 24-07 | XA-000-09-004-006-011-009-04 | 21.9 | 1177.4 11:29:20:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 11:29:22:ST3_smx:INFO: chip: 23-0 25.062742 C 1189.190035 mV 11:29:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:29:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:29:22:ST3_smx:INFO: Electrons 11:29:22:ST3_smx:INFO: # loops 0 11:29:23:ST3_smx:INFO: # loops 1 11:29:25:ST3_smx:INFO: # loops 2 11:29:27:ST3_smx:INFO: Total # of broken channels: 0 11:29:27:ST3_smx:INFO: List of broken channels: [] 11:29:27:ST3_smx:INFO: Total # of broken channels: 0 11:29:27:ST3_smx:INFO: List of broken channels: [] 11:29:28:ST3_smx:INFO: chip: 30-1 34.556970 C 1135.937260 mV 11:29:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:29:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:29:28:ST3_smx:INFO: Electrons 11:29:29:ST3_smx:INFO: # loops 0 11:29:30:ST3_smx:INFO: # loops 1 11:29:32:ST3_smx:INFO: # loops 2 11:29:33:ST3_smx:INFO: Total # of broken channels: 0 11:29:33:ST3_smx:INFO: List of broken channels: [] 11:29:33:ST3_smx:INFO: Total # of broken channels: 0 11:29:33:ST3_smx:INFO: List of broken channels: [] 11:29:35:ST3_smx:INFO: chip: 21-2 31.389742 C 1165.571835 mV 11:29:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:29:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:29:35:ST3_smx:INFO: Electrons 11:29:35:ST3_smx:INFO: # loops 0 11:29:37:ST3_smx:INFO: # loops 1 11:29:38:ST3_smx:INFO: # loops 2 11:29:40:ST3_smx:INFO: Total # of broken channels: 1 11:29:40:ST3_smx:INFO: List of broken channels: [62] 11:29:40:ST3_smx:INFO: Total # of broken channels: 0 11:29:40:ST3_smx:INFO: List of broken channels: [] 11:29:41:ST3_smx:INFO: chip: 28-3 28.225000 C 1159.654860 mV 11:29:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:29:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:29:41:ST3_smx:INFO: Electrons 11:29:41:ST3_smx:INFO: # loops 0 11:29:43:ST3_smx:INFO: # loops 1 11:29:45:ST3_smx:INFO: # loops 2 11:29:46:ST3_smx:INFO: Total # of broken channels: 0 11:29:46:ST3_smx:INFO: List of broken channels: [] 11:29:46:ST3_smx:INFO: Total # of broken channels: 0 11:29:46:ST3_smx:INFO: List of broken channels: [] 11:29:48:ST3_smx:INFO: chip: 19-4 37.726682 C 1147.806000 mV 11:29:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:29:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:29:48:ST3_smx:INFO: Electrons 11:29:48:ST3_smx:INFO: # loops 0 11:29:50:ST3_smx:INFO: # loops 1 11:29:51:ST3_smx:INFO: # loops 2 11:29:53:ST3_smx:INFO: Total # of broken channels: 0 11:29:53:ST3_smx:INFO: List of broken channels: [] 11:29:53:ST3_smx:INFO: Total # of broken channels: 0 11:29:53:ST3_smx:INFO: List of broken channels: [] 11:29:54:ST3_smx:INFO: chip: 26-5 34.556970 C 1141.874115 mV 11:29:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:29:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:29:54:ST3_smx:INFO: Electrons 11:29:54:ST3_smx:INFO: # loops 0 11:29:56:ST3_smx:INFO: # loops 1 11:29:58:ST3_smx:INFO: # loops 2 11:30:00:ST3_smx:INFO: Total # of broken channels: 0 11:30:00:ST3_smx:INFO: List of broken channels: [] 11:30:00:ST3_smx:INFO: Total # of broken channels: 0 11:30:00:ST3_smx:INFO: List of broken channels: [] 11:30:01:ST3_smx:INFO: chip: 17-6 31.389742 C 1159.654860 mV 11:30:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:30:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:30:01:ST3_smx:INFO: Electrons 11:30:01:ST3_smx:INFO: # loops 0 11:30:03:ST3_smx:INFO: # loops 1 11:30:05:ST3_smx:INFO: # loops 2 11:30:06:ST3_smx:INFO: Total # of broken channels: 0 11:30:06:ST3_smx:INFO: List of broken channels: [] 11:30:06:ST3_smx:INFO: Total # of broken channels: 0 11:30:06:ST3_smx:INFO: List of broken channels: [] 11:30:08:ST3_smx:INFO: chip: 24-7 25.062742 C 1183.292940 mV 11:30:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:30:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:30:08:ST3_smx:INFO: Electrons 11:30:08:ST3_smx:INFO: # loops 0 11:30:10:ST3_smx:INFO: # loops 1 11:30:11:ST3_smx:INFO: # loops 2 11:30:13:ST3_smx:INFO: Total # of broken channels: 0 11:30:13:ST3_smx:INFO: List of broken channels: [] 11:30:13:ST3_smx:INFO: Total # of broken channels: 0 11:30:13:ST3_smx:INFO: List of broken channels: [] 11:30:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:30:13:febtest:INFO: 23-00 | XA-000-09-004-006-010-010-09 | 25.1 | 1206.9 11:30:14:febtest:INFO: 30-01 | XA-000-09-004-006-012-006-12 | 34.6 | 1153.7 11:30:14:febtest:INFO: 21-02 | XA-000-09-004-006-011-011-04 | 31.4 | 1183.3 11:30:14:febtest:INFO: 28-03 | XA-000-09-004-006-010-019-14 | 31.4 | 1177.4 11:30:14:febtest:INFO: 19-04 | XA-000-09-004-006-012-007-12 | 37.7 | 1171.5 11:30:15:febtest:INFO: 26-05 | XA-000-09-004-006-011-006-04 | 34.6 | 1159.7 11:30:15:febtest:INFO: 17-06 | XA-000-09-004-006-012-009-12 | 31.4 | 1177.4 11:30:15:febtest:INFO: 24-07 | XA-000-09-004-006-011-009-04 | 25.1 | 1206.9 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_01_22-11_28_51 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2325| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9220', '1.848', '2.6620'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0120', '1.849', '2.5920'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9930', '1.850', '0.5178']