
FEB_2326 05.02.25 09:22:14
TextEdit.txt
09:22:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:22:14:ST3_Shared:INFO: FEB-Sensor 09:22:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:22:23:ST3_ModuleSelector:DEBUG: M4UR3B4011314B2 09:22:23:ST3_ModuleSelector:DEBUG: L4UR301131 09:22:23:ST3_ModuleSelector:DEBUG: 11354 09:22:23:ST3_ModuleSelector:DEBUG: 62x124 09:22:23:ST3_ModuleSelector:DEBUG: A 09:22:23:ST3_ModuleSelector:DEBUG: M4UR3B4011314B2 09:22:23:ST3_ModuleSelector:DEBUG: L4UR301131 09:22:23:ST3_ModuleSelector:DEBUG: 11354 09:22:23:ST3_ModuleSelector:DEBUG: 62x124 09:22:23:ST3_ModuleSelector:DEBUG: A 09:22:31:ST3_ModuleSelector:INFO: M4UR3B4011314B2 09:22:31:ST3_ModuleSelector:INFO: 11354 09:22:31:febtest:INFO: Testing FEB with SN 2326 09:22:32:smx_tester:INFO: Scanning setup 09:22:32:elinks:INFO: Disabling clock on downlink 0 09:22:32:elinks:INFO: Disabling clock on downlink 1 09:22:32:elinks:INFO: Disabling clock on downlink 2 09:22:32:elinks:INFO: Disabling clock on downlink 3 09:22:32:elinks:INFO: Disabling clock on downlink 4 09:22:32:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:22:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:22:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:22:32:elinks:INFO: Disabling clock on downlink 0 09:22:32:elinks:INFO: Disabling clock on downlink 1 09:22:32:elinks:INFO: Disabling clock on downlink 2 09:22:32:elinks:INFO: Disabling clock on downlink 3 09:22:32:elinks:INFO: Disabling clock on downlink 4 09:22:32:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:22:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:22:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:22:33:elinks:INFO: Disabling clock on downlink 0 09:22:33:elinks:INFO: Disabling clock on downlink 1 09:22:33:elinks:INFO: Disabling clock on downlink 2 09:22:33:elinks:INFO: Disabling clock on downlink 3 09:22:33:elinks:INFO: Disabling clock on downlink 4 09:22:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:22:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 09:22:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 09:22:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:22:33:elinks:INFO: Disabling clock on downlink 0 09:22:33:elinks:INFO: Disabling clock on downlink 1 09:22:33:elinks:INFO: Disabling clock on downlink 2 09:22:33:elinks:INFO: Disabling clock on downlink 3 09:22:33:elinks:INFO: Disabling clock on downlink 4 09:22:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:22:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:22:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:22:33:elinks:INFO: Disabling clock on downlink 0 09:22:33:elinks:INFO: Disabling clock on downlink 1 09:22:33:elinks:INFO: Disabling clock on downlink 2 09:22:33:elinks:INFO: Disabling clock on downlink 3 09:22:33:elinks:INFO: Disabling clock on downlink 4 09:22:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:22:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:22:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 09:22:33:setup_element:INFO: Scanning clock phase 09:22:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:22:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:22:33:setup_element:INFO: Clock phase scan results for group 0, downlink 2 09:22:33:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:22:33:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:22:33:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:22:33:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:22:33:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:22:33:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:22:33:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 09:22:33:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 09:22:33:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 09:22:33:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 09:22:33:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:22:33:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:22:33:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:22:33:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:22:33:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:22:33:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:22:33:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2 ==============================================OOO============================================== 09:22:33:setup_element:INFO: Scanning data phases 09:22:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:22:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:22:38:setup_element:INFO: Data phase scan results for group 0, downlink 2 09:22:38:setup_element:INFO: Eye window for uplink 16: __XXXX__________________________________ Data delay found: 23 09:22:38:setup_element:INFO: Eye window for uplink 17: XXXXX__________________________________X Data delay found: 21 09:22:38:setup_element:INFO: Eye window for uplink 18: __XXXXX_________________________________ Data delay found: 24 09:22:38:setup_element:INFO: Eye window for uplink 19: ___XXXXX________________________________ Data delay found: 25 09:22:38:setup_element:INFO: Eye window for uplink 20: __XXXXXX________________________________ Data delay found: 24 09:22:38:setup_element:INFO: Eye window for uplink 21: __XXXXXXX_______________________________ Data delay found: 25 09:22:38:setup_element:INFO: Eye window for uplink 22: XXXXX_________________________________XX Data delay found: 21 09:22:38:setup_element:INFO: Eye window for uplink 23: XXX__________________________________XXX Data delay found: 19 09:22:38:setup_element:INFO: Eye window for uplink 24: __________XXXXXX________________________ Data delay found: 32 09:22:38:setup_element:INFO: Eye window for uplink 25: ____________XXXXXX______________________ Data delay found: 34 09:22:38:setup_element:INFO: Eye window for uplink 26: ________________XXXXXX__________________ Data delay found: 38 09:22:38:setup_element:INFO: Eye window for uplink 27: __________________XXXXXX________________ Data delay found: 0 09:22:38:setup_element:INFO: Eye window for uplink 28: ____________________XXXXXX______________ Data delay found: 2 09:22:38:setup_element:INFO: Eye window for uplink 29: ____________________XXXXXX______________ Data delay found: 2 09:22:38:setup_element:INFO: Eye window for uplink 30: ___________________XXXXXXX______________ Data delay found: 2 09:22:38:setup_element:INFO: Eye window for uplink 31: _________________XXXXXXXX_______________ Data delay found: 0 09:22:38:setup_element:INFO: Setting the data phase to 23 for uplink 16 09:22:38:setup_element:INFO: Setting the data phase to 21 for uplink 17 09:22:38:setup_element:INFO: Setting the data phase to 24 for uplink 18 09:22:38:setup_element:INFO: Setting the data phase to 25 for uplink 19 09:22:38:setup_element:INFO: Setting the data phase to 24 for uplink 20 09:22:38:setup_element:INFO: Setting the data phase to 25 for uplink 21 09:22:38:setup_element:INFO: Setting the data phase to 21 for uplink 22 09:22:38:setup_element:INFO: Setting the data phase to 19 for uplink 23 09:22:38:setup_element:INFO: Setting the data phase to 32 for uplink 24 09:22:38:setup_element:INFO: Setting the data phase to 34 for uplink 25 09:22:38:setup_element:INFO: Setting the data phase to 38 for uplink 26 09:22:38:setup_element:INFO: Setting the data phase to 0 for uplink 27 09:22:38:setup_element:INFO: Setting the data phase to 2 for uplink 28 09:22:38:setup_element:INFO: Setting the data phase to 2 for uplink 29 09:22:38:setup_element:INFO: Setting the data phase to 2 for uplink 30 09:22:38:setup_element:INFO: Setting the data phase to 0 for uplink 31 ==============================================OOO============================================== 09:22:38:setup_element:INFO: Beginning SMX ASICs map scan 09:22:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:22:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:22:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:22:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:22:38:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 09:22:38:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 09:22:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 09:22:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 09:22:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 09:22:39:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 09:22:39:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 09:22:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 09:22:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 09:22:39:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 09:22:39:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 09:22:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 09:22:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 09:22:39:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 09:22:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 09:22:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 09:22:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 09:22:41:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 32 Window Length: 70 Eye Windows: Uplink 16: _____________________________________________________________________XXXXXXXX___ Uplink 17: _____________________________________________________________________XXXXXXXX___ Uplink 18: ______________________________________________________________________XXXXXXXX__ Uplink 19: ______________________________________________________________________XXXXXXXX__ Uplink 20: _____________________________________________________________________XXXXXXXXX__ Uplink 21: _____________________________________________________________________XXXXXXXXX__ Uplink 22: ____________________________________________________________________XXXXXXXXX___ Uplink 23: ____________________________________________________________________XXXXXXXXX___ Uplink 24: ____________________________________________________________________XXXXXXXX____ Uplink 25: ____________________________________________________________________XXXXXXXX____ Uplink 26: _____________________________________________________________________XXXXXXXXX__ Uplink 27: _____________________________________________________________________XXXXXXXXX__ Uplink 28: _____________________________________________________________________XXXXXXXXX__ Uplink 29: _____________________________________________________________________XXXXXXXXX__ Uplink 30: ______________________________________________________________________XXXXXXXX__ Uplink 31: ______________________________________________________________________XXXXXXXX__ Data phase characteristics: Uplink 16: Optimal Phase: 23 Window Length: 36 Eye Window: __XXXX__________________________________ Uplink 17: Optimal Phase: 21 Window Length: 34 Eye Window: XXXXX__________________________________X Uplink 18: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 19: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 20: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 21: Optimal Phase: 25 Window Length: 33 Eye Window: __XXXXXXX_______________________________ Uplink 22: Optimal Phase: 21 Window Length: 33 Eye Window: XXXXX_________________________________XX Uplink 23: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 24: Optimal Phase: 32 Window Length: 34 Eye Window: __________XXXXXX________________________ Uplink 25: Optimal Phase: 34 Window Length: 34 Eye Window: ____________XXXXXX______________________ Uplink 26: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 27: Optimal Phase: 0 Window Length: 34 Eye Window: __________________XXXXXX________________ Uplink 28: Optimal Phase: 2 Window Length: 34 Eye Window: ____________________XXXXXX______________ Uplink 29: Optimal Phase: 2 Window Length: 34 Eye Window: ____________________XXXXXX______________ Uplink 30: Optimal Phase: 2 Window Length: 33 Eye Window: ___________________XXXXXXX______________ Uplink 31: Optimal Phase: 0 Window Length: 32 Eye Window: _________________XXXXXXXX_______________ ==============================================OOO============================================== 09:22:41:setup_element:INFO: Performing Elink synchronization 09:22:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:22:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:22:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:22:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 09:22:41:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 09:22:41:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 09:22:42:febtest:INFO: Init all SMX (CSA): 30 09:22:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:22:57:febtest:INFO: 23-00 | XA-000-09-004-007-008-006-02 | 40.9 | 1135.9 09:22:57:febtest:INFO: 30-01 | XA-000-09-004-007-009-006-15 | 31.4 | 1171.5 09:22:57:febtest:INFO: 21-02 | XA-000-09-004-007-007-007-06 | 31.4 | 1183.3 09:22:57:febtest:INFO: 28-03 | XA-000-09-004-007-008-005-02 | 40.9 | 1141.9 09:22:58:febtest:INFO: 19-04 | XA-000-09-004-007-009-008-15 | 34.6 | 1159.7 09:22:58:febtest:INFO: 26-05 | XA-000-09-004-007-007-004-06 | 40.9 | 1130.0 09:22:58:febtest:INFO: 17-06 | XA-000-09-004-006-011-019-03 | 34.6 | 1159.7 09:22:58:febtest:INFO: 24-07 | XA-000-09-004-007-007-006-06 | 28.2 | 1177.4 09:22:59:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 09:23:01:ST3_smx:INFO: chip: 23-0 44.073563 C 1147.806000 mV 09:23:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:01:ST3_smx:INFO: Electrons 09:23:01:ST3_smx:INFO: # loops 0 09:23:03:ST3_smx:INFO: # loops 1 09:23:04:ST3_smx:INFO: # loops 2 09:23:06:ST3_smx:INFO: # loops 3 09:23:08:ST3_smx:INFO: # loops 4 09:23:09:ST3_smx:INFO: Total # of broken channels: 0 09:23:09:ST3_smx:INFO: List of broken channels: [] 09:23:09:ST3_smx:INFO: Total # of broken channels: 0 09:23:09:ST3_smx:INFO: List of broken channels: [] 09:23:11:ST3_smx:INFO: chip: 30-1 34.556970 C 1183.292940 mV 09:23:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:11:ST3_smx:INFO: Electrons 09:23:11:ST3_smx:INFO: # loops 0 09:23:13:ST3_smx:INFO: # loops 1 09:23:15:ST3_smx:INFO: # loops 2 09:23:16:ST3_smx:INFO: # loops 3 09:23:18:ST3_smx:INFO: # loops 4 09:23:19:ST3_smx:INFO: Total # of broken channels: 0 09:23:19:ST3_smx:INFO: List of broken channels: [] 09:23:19:ST3_smx:INFO: Total # of broken channels: 1 09:23:19:ST3_smx:INFO: List of broken channels: [90] 09:23:21:ST3_smx:INFO: chip: 21-2 34.556970 C 1195.082160 mV 09:23:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:21:ST3_smx:INFO: Electrons 09:23:21:ST3_smx:INFO: # loops 0 09:23:23:ST3_smx:INFO: # loops 1 09:23:24:ST3_smx:INFO: # loops 2 09:23:26:ST3_smx:INFO: # loops 3 09:23:28:ST3_smx:INFO: # loops 4 09:23:30:ST3_smx:INFO: Total # of broken channels: 0 09:23:30:ST3_smx:INFO: List of broken channels: [] 09:23:30:ST3_smx:INFO: Total # of broken channels: 0 09:23:30:ST3_smx:INFO: List of broken channels: [] 09:23:31:ST3_smx:INFO: chip: 28-3 44.073563 C 1159.654860 mV 09:23:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:31:ST3_smx:INFO: Electrons 09:23:31:ST3_smx:INFO: # loops 0 09:23:33:ST3_smx:INFO: # loops 1 09:23:34:ST3_smx:INFO: # loops 2 09:23:36:ST3_smx:INFO: # loops 3 09:23:38:ST3_smx:INFO: # loops 4 09:23:39:ST3_smx:INFO: Total # of broken channels: 0 09:23:39:ST3_smx:INFO: List of broken channels: [] 09:23:39:ST3_smx:INFO: Total # of broken channels: 0 09:23:39:ST3_smx:INFO: List of broken channels: [] 09:23:41:ST3_smx:INFO: chip: 19-4 34.556970 C 1171.483840 mV 09:23:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:41:ST3_smx:INFO: Electrons 09:23:41:ST3_smx:INFO: # loops 0 09:23:43:ST3_smx:INFO: # loops 1 09:23:44:ST3_smx:INFO: # loops 2 09:23:46:ST3_smx:INFO: # loops 3 09:23:48:ST3_smx:INFO: # loops 4 09:23:50:ST3_smx:INFO: Total # of broken channels: 0 09:23:50:ST3_smx:INFO: List of broken channels: [] 09:23:50:ST3_smx:INFO: Total # of broken channels: 0 09:23:50:ST3_smx:INFO: List of broken channels: [] 09:23:51:ST3_smx:INFO: chip: 26-5 44.073563 C 1141.874115 mV 09:23:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:51:ST3_smx:INFO: Electrons 09:23:51:ST3_smx:INFO: # loops 0 09:23:53:ST3_smx:INFO: # loops 1 09:23:55:ST3_smx:INFO: # loops 2 09:23:56:ST3_smx:INFO: # loops 3 09:23:58:ST3_smx:INFO: # loops 4 09:24:00:ST3_smx:INFO: Total # of broken channels: 0 09:24:00:ST3_smx:INFO: List of broken channels: [] 09:24:00:ST3_smx:INFO: Total # of broken channels: 0 09:24:00:ST3_smx:INFO: List of broken channels: [] 09:24:01:ST3_smx:INFO: chip: 17-6 34.556970 C 1171.483840 mV 09:24:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:24:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:24:01:ST3_smx:INFO: Electrons 09:24:01:ST3_smx:INFO: # loops 0 09:24:03:ST3_smx:INFO: # loops 1 09:24:05:ST3_smx:INFO: # loops 2 09:24:06:ST3_smx:INFO: # loops 3 09:24:08:ST3_smx:INFO: # loops 4 09:24:10:ST3_smx:INFO: Total # of broken channels: 0 09:24:10:ST3_smx:INFO: List of broken channels: [] 09:24:10:ST3_smx:INFO: Total # of broken channels: 0 09:24:10:ST3_smx:INFO: List of broken channels: [] 09:24:11:ST3_smx:INFO: chip: 24-7 28.225000 C 1183.292940 mV 09:24:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:24:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:24:11:ST3_smx:INFO: Electrons 09:24:11:ST3_smx:INFO: # loops 0 09:24:13:ST3_smx:INFO: # loops 1 09:24:15:ST3_smx:INFO: # loops 2 09:24:16:ST3_smx:INFO: # loops 3 09:24:18:ST3_smx:INFO: # loops 4 09:24:20:ST3_smx:INFO: Total # of broken channels: 0 09:24:20:ST3_smx:INFO: List of broken channels: [] 09:24:20:ST3_smx:INFO: Total # of broken channels: 0 09:24:20:ST3_smx:INFO: List of broken channels: [] 09:24:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:24:20:febtest:INFO: 23-00 | XA-000-09-004-007-008-006-02 | 47.3 | 1165.6 09:24:20:febtest:INFO: 30-01 | XA-000-09-004-007-009-006-15 | 34.6 | 1206.9 09:24:21:febtest:INFO: 21-02 | XA-000-09-004-007-007-007-06 | 34.6 | 1218.6 09:24:21:febtest:INFO: 28-03 | XA-000-09-004-007-008-005-02 | 44.1 | 1177.4 09:24:21:febtest:INFO: 19-04 | XA-000-09-004-007-009-008-15 | 37.7 | 1189.2 09:24:21:febtest:INFO: 26-05 | XA-000-09-004-007-007-004-06 | 47.3 | 1165.6 09:24:21:febtest:INFO: 17-06 | XA-000-09-004-006-011-019-03 | 37.7 | 1195.1 09:24:22:febtest:INFO: 24-07 | XA-000-09-004-007-007-006-06 | 31.4 | 1206.9 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 25_02_05-09_22_14 OPERATOR : Alois Alzheimer SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2326| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ SENSOR_NAME: 11354 | SIZE: 62x124 | GRADE: A MODULE_NAME: M4UR3B4011314B2 LADDER_NAME: L4UR301131 ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5490', '1.847', '2.5100'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0710', '1.850', '2.5190'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0170', '1.850', '0.5321']