FEB_2329    06.02.25 10:15:57

TextEdit.txt
            10:15:57:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:15:57:ST3_Shared:INFO:	                         FEB-Sensor                         
10:15:57:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:16:01:ST3_Shared:INFO:	MUCH mode selected
10:16:11:ST3_ModuleSelector:DEBUG:	
10:16:11:ST3_ModuleSelector:DEBUG:	
10:16:11:ST3_ModuleSelector:DEBUG:	25202

10:16:11:ST3_ModuleSelector:DEBUG:	
10:16:11:ST3_ModuleSelector:DEBUG:	Unknown
10:16:29:ST3_ModuleSelector:DEBUG:	M4DR1T1000161B2
10:16:29:ST3_ModuleSelector:DEBUG:	L4DR100016
10:16:29:ST3_ModuleSelector:DEBUG:	25202
10:16:29:ST3_ModuleSelector:DEBUG:	62x42
10:16:29:ST3_ModuleSelector:DEBUG:	A
10:16:29:ST3_ModuleSelector:DEBUG:	M4DR1T1000161B2
10:16:29:ST3_ModuleSelector:DEBUG:	L4DR100016
10:16:29:ST3_ModuleSelector:DEBUG:	25202
10:16:29:ST3_ModuleSelector:DEBUG:	62x42
10:16:29:ST3_ModuleSelector:DEBUG:	A
10:16:35:ST3_ModuleSelector:INFO:	M4DR1T1000161B2
10:16:35:ST3_ModuleSelector:INFO:	25202
10:16:35:febtest:INFO:	Testing FEB with SN 2329
10:16:37:smx_tester:INFO:	Scanning setup
10:16:37:elinks:INFO:	Disabling clock on downlink 0
10:16:37:elinks:INFO:	Disabling clock on downlink 1
10:16:37:elinks:INFO:	Disabling clock on downlink 2
10:16:37:elinks:INFO:	Disabling clock on downlink 3
10:16:37:elinks:INFO:	Disabling clock on downlink 4
10:16:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:16:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:16:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:16:37:elinks:INFO:	Disabling clock on downlink 0
10:16:37:elinks:INFO:	Disabling clock on downlink 1
10:16:37:elinks:INFO:	Disabling clock on downlink 2
10:16:37:elinks:INFO:	Disabling clock on downlink 3
10:16:37:elinks:INFO:	Disabling clock on downlink 4
10:16:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:16:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:16:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:16:37:elinks:INFO:	Disabling clock on downlink 0
10:16:37:elinks:INFO:	Disabling clock on downlink 1
10:16:37:elinks:INFO:	Disabling clock on downlink 2
10:16:37:elinks:INFO:	Disabling clock on downlink 3
10:16:37:elinks:INFO:	Disabling clock on downlink 4
10:16:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:16:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
10:16:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
10:16:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:16:37:elinks:INFO:	Disabling clock on downlink 0
10:16:37:elinks:INFO:	Disabling clock on downlink 1
10:16:37:elinks:INFO:	Disabling clock on downlink 2
10:16:37:elinks:INFO:	Disabling clock on downlink 3
10:16:37:elinks:INFO:	Disabling clock on downlink 4
10:16:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:16:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:16:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:16:37:elinks:INFO:	Disabling clock on downlink 0
10:16:37:elinks:INFO:	Disabling clock on downlink 1
10:16:37:elinks:INFO:	Disabling clock on downlink 2
10:16:37:elinks:INFO:	Disabling clock on downlink 3
10:16:38:elinks:INFO:	Disabling clock on downlink 4
10:16:38:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:16:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:16:38:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:16:38:setup_element:INFO:	Scanning clock phase
10:16:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:16:38:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:16:38:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
10:16:38:setup_element:INFO:	Eye window for uplink 16: XX_________________________________________________________________________XXXXX
Clock Delay: 38
10:16:38:setup_element:INFO:	Eye window for uplink 17: XX_________________________________________________________________________XXXXX
Clock Delay: 38
10:16:38:setup_element:INFO:	Eye window for uplink 18: XX________________________________________________________________________XXXXXX
Clock Delay: 37
10:16:38:setup_element:INFO:	Eye window for uplink 19: XX________________________________________________________________________XXXXXX
Clock Delay: 37
10:16:38:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:16:38:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:16:38:setup_element:INFO:	Eye window for uplink 22: _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:16:38:setup_element:INFO:	Eye window for uplink 23: _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:16:38:setup_element:INFO:	Eye window for uplink 24: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:16:38:setup_element:INFO:	Eye window for uplink 25: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:16:38:setup_element:INFO:	Eye window for uplink 26: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:16:38:setup_element:INFO:	Eye window for uplink 27: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:16:38:setup_element:INFO:	Eye window for uplink 28: X__________________________________________________________________________XXXXX
Clock Delay: 37
10:16:38:setup_element:INFO:	Eye window for uplink 29: X__________________________________________________________________________XXXXX
Clock Delay: 37
10:16:38:setup_element:INFO:	Eye window for uplink 30: XX__________________________________________________________________________XXXX
Clock Delay: 38
10:16:38:setup_element:INFO:	Eye window for uplink 31: XX__________________________________________________________________________XXXX
Clock Delay: 38
10:16:38:setup_element:INFO:	Setting the clock phase to 36 for group 0, downlink 2
==============================================OOO==============================================
10:16:38:setup_element:INFO:	Scanning data phases
10:16:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:16:38:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:16:43:setup_element:INFO:	Data phase scan results for group 0, downlink 2
10:16:43:setup_element:INFO:	Eye window for uplink 16: XXXX_________________________________XXX
Data delay found: 20
10:16:43:setup_element:INFO:	Eye window for uplink 17: __________________________________XXXXXX
Data delay found: 16
10:16:43:setup_element:INFO:	Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
10:16:43:setup_element:INFO:	Eye window for uplink 19: X__________________________________XXXXX
Data delay found: 17
10:16:43:setup_element:INFO:	Eye window for uplink 20: ________________________________XXXXXX__
Data delay found: 14
10:16:43:setup_element:INFO:	Eye window for uplink 21: _______________________________XXXXXX___
Data delay found: 13
10:16:43:setup_element:INFO:	Eye window for uplink 22: _________________________________XXXXXX_
Data delay found: 15
10:16:43:setup_element:INFO:	Eye window for uplink 23: _______________________________XXXXXX___
Data delay found: 13
10:16:43:setup_element:INFO:	Eye window for uplink 24: ____XXXX________________________________
Data delay found: 25
10:16:43:setup_element:INFO:	Eye window for uplink 25: _____XXXXXX_____________________________
Data delay found: 27
10:16:43:setup_element:INFO:	Eye window for uplink 26: ____XXXXX_______________________________
Data delay found: 26
10:16:43:setup_element:INFO:	Eye window for uplink 27: _______XXXX_____________________________
Data delay found: 28
10:16:43:setup_element:INFO:	Eye window for uplink 28: ______________XXXXXXX___________________
Data delay found: 37
10:16:43:setup_element:INFO:	Eye window for uplink 29: _______________XXXXXXX__________________
Data delay found: 38
10:16:43:setup_element:INFO:	Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
10:16:43:setup_element:INFO:	Eye window for uplink 31: ______________XXXXX_____________________
Data delay found: 36
10:16:43:setup_element:INFO:	Setting the data phase to 20 for uplink 16
10:16:43:setup_element:INFO:	Setting the data phase to 16 for uplink 17
10:16:43:setup_element:INFO:	Setting the data phase to 18 for uplink 18
10:16:43:setup_element:INFO:	Setting the data phase to 17 for uplink 19
10:16:43:setup_element:INFO:	Setting the data phase to 14 for uplink 20
10:16:43:setup_element:INFO:	Setting the data phase to 13 for uplink 21
10:16:43:setup_element:INFO:	Setting the data phase to 15 for uplink 22
10:16:43:setup_element:INFO:	Setting the data phase to 13 for uplink 23
10:16:43:setup_element:INFO:	Setting the data phase to 25 for uplink 24
10:16:43:setup_element:INFO:	Setting the data phase to 27 for uplink 25
10:16:43:setup_element:INFO:	Setting the data phase to 26 for uplink 26
10:16:43:setup_element:INFO:	Setting the data phase to 28 for uplink 27
10:16:43:setup_element:INFO:	Setting the data phase to 37 for uplink 28
10:16:43:setup_element:INFO:	Setting the data phase to 38 for uplink 29
10:16:43:setup_element:INFO:	Setting the data phase to 38 for uplink 30
10:16:43:setup_element:INFO:	Setting the data phase to 36 for uplink 31
==============================================OOO==============================================
10:16:43:setup_element:INFO:	Beginning SMX ASICs map scan
10:16:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:16:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:16:43:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:16:43:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:16:43:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:16:43:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:16:43:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:16:44:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:16:44:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:16:44:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:16:44:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:16:44:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:16:44:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:16:44:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:16:44:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:16:44:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:16:44:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:16:45:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:16:45:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:16:45:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:16:45:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:16:46:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 36
    Window Length: 70
    Eye Windows:
      Uplink 16: XX_________________________________________________________________________XXXXX
      Uplink 17: XX_________________________________________________________________________XXXXX
      Uplink 18: XX________________________________________________________________________XXXXXX
      Uplink 19: XX________________________________________________________________________XXXXXX
      Uplink 20: ________________________________________________________________________XXXXXXX_
      Uplink 21: ________________________________________________________________________XXXXXXX_
      Uplink 22: _________________________________________________________________________XXXXXXX
      Uplink 23: _________________________________________________________________________XXXXXXX
      Uplink 24: _________________________________________________________________________XXXXXX_
      Uplink 25: _________________________________________________________________________XXXXXX_
      Uplink 26: _________________________________________________________________________XXXXXX_
      Uplink 27: _________________________________________________________________________XXXXXX_
      Uplink 28: X__________________________________________________________________________XXXXX
      Uplink 29: X__________________________________________________________________________XXXXX
      Uplink 30: XX__________________________________________________________________________XXXX
      Uplink 31: XX__________________________________________________________________________XXXX
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 17:
      Optimal Phase: 16
      Window Length: 34
      Eye Window: __________________________________XXXXXX
    Uplink 18:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 19:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 20:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 21:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 22:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 23:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 24:
      Optimal Phase: 25
      Window Length: 36
      Eye Window: ____XXXX________________________________
    Uplink 25:
      Optimal Phase: 27
      Window Length: 34
      Eye Window: _____XXXXXX_____________________________
    Uplink 26:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 27:
      Optimal Phase: 28
      Window Length: 36
      Eye Window: _______XXXX_____________________________
    Uplink 28:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXXXX___________________
    Uplink 29:
      Optimal Phase: 38
      Window Length: 33
      Eye Window: _______________XXXXXXX__________________
    Uplink 30:
      Optimal Phase: 38
      Window Length: 34
      Eye Window: ________________XXXXXX__________________
    Uplink 31:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________

==============================================OOO==============================================
10:16:46:setup_element:INFO:	Performing Elink synchronization
10:16:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:16:46:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:16:46:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:16:46:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:16:46:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
10:16:46:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:16:47:febtest:INFO:	Init all SMX (CSA): 30
10:17:00:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:17:00:febtest:INFO:	23-00 | XA-000-09-004-012-015-021-03 |  28.2 | 1195.1
10:17:00:febtest:INFO:	30-01 | XA-000-09-004-007-017-013-15 |  21.9 | 1206.9
10:17:01:febtest:INFO:	21-02 | XA-000-09-004-012-013-021-00 |  34.6 | 1171.5
10:17:01:febtest:INFO:	28-03 | XA-000-09-004-007-018-016-06 |  34.6 | 1171.5
10:17:01:febtest:INFO:	19-04 | XA-000-09-004-007-003-007-00 |  50.4 | 1130.0
10:17:01:febtest:INFO:	26-05 | XA-000-09-004-007-016-015-02 |  28.2 | 1183.3
10:17:01:febtest:INFO:	17-06 | XA-000-09-004-007-003-008-00 |  44.1 | 1147.8
10:17:02:febtest:INFO:	24-07 | XA-000-09-004-007-017-015-15 |  28.2 | 1189.2
10:17:03:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:17:05:ST3_smx:INFO:	chip: 23-0 	 28.225000 C 	 1212.728715 mV
10:17:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:17:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:17:05:ST3_smx:INFO:		Electrons
10:17:05:ST3_smx:INFO:	# loops 0
10:17:06:ST3_smx:INFO:	# loops 1
10:17:08:ST3_smx:INFO:	# loops 2
10:17:09:ST3_smx:INFO:	# loops 3
10:17:11:ST3_smx:INFO:	# loops 4
10:17:12:ST3_smx:INFO:	Total # of broken channels: 5
10:17:12:ST3_smx:INFO:	List of broken channels: [6, 16, 42, 90, 111]
10:17:12:ST3_smx:INFO:	Total # of broken channels: 87
10:17:12:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 6, 7, 9, 11, 13, 15, 16, 17, 19, 21, 23, 24, 25, 26, 27, 28, 29, 30, 31, 33, 34, 35, 37, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 51, 52, 53, 55, 57, 58, 59, 60, 61, 63, 65, 67, 69, 71, 73, 74, 75, 77, 78, 79, 81, 83, 85, 87, 89, 90, 91, 93, 95, 97, 98, 99, 100, 101, 102, 103, 105, 107, 109, 111, 113, 115, 117, 118, 119, 120, 121, 122, 123, 125]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:17:14:ST3_smx:INFO:	chip: 30-1 	 21.902970 C 	 1218.600960 mV
10:17:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:17:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:17:14:ST3_smx:INFO:		Electrons
10:17:14:ST3_smx:INFO:	# loops 0
10:17:15:ST3_smx:INFO:	# loops 1
10:17:17:ST3_smx:INFO:	# loops 2
10:17:18:ST3_smx:INFO:	# loops 3
10:17:20:ST3_smx:INFO:	# loops 4
10:17:21:ST3_smx:INFO:	Total # of broken channels: 0
10:17:21:ST3_smx:INFO:	List of broken channels: []
10:17:21:ST3_smx:INFO:	Total # of broken channels: 52
10:17:21:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 41, 87, 89, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 103, 105, 107, 108, 109, 111, 113, 115, 117, 118, 119, 121, 123, 125]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:17:23:ST3_smx:INFO:	chip: 21-2 	 37.726682 C 	 1183.292940 mV
10:17:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:17:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:17:23:ST3_smx:INFO:		Electrons
10:17:23:ST3_smx:INFO:	# loops 0
10:17:25:ST3_smx:INFO:	# loops 1
10:17:26:ST3_smx:INFO:	# loops 2
10:17:28:ST3_smx:INFO:	# loops 3
10:17:29:ST3_smx:INFO:	# loops 4
10:17:30:ST3_smx:INFO:	Total # of broken channels: 0
10:17:30:ST3_smx:INFO:	List of broken channels: []
10:17:30:ST3_smx:INFO:	Total # of broken channels: 81
10:17:30:ST3_smx:INFO:	List of broken channels: [1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 23, 24, 25, 27, 28, 29, 30, 31, 32, 33, 35, 36, 37, 39, 41, 43, 45, 47, 49, 50, 51, 53, 55, 56, 57, 59, 61, 63, 65, 67, 68, 69, 71, 73, 75, 77, 78, 79, 81, 83, 84, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:17:32:ST3_smx:INFO:	chip: 28-3 	 31.389742 C 	 1183.292940 mV
10:17:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:17:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:17:32:ST3_smx:INFO:		Electrons
10:17:32:ST3_smx:INFO:	# loops 0
10:17:34:ST3_smx:INFO:	# loops 1
10:17:35:ST3_smx:INFO:	# loops 2
10:17:37:ST3_smx:INFO:	# loops 3
10:17:38:ST3_smx:INFO:	# loops 4
10:17:39:ST3_smx:INFO:	Total # of broken channels: 2
10:17:39:ST3_smx:INFO:	List of broken channels: [83, 111]
10:17:39:ST3_smx:INFO:	Total # of broken channels: 64
10:17:39:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:17:41:ST3_smx:INFO:	chip: 19-4 	 50.430383 C 	 1141.874115 mV
10:17:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:17:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:17:41:ST3_smx:INFO:		Electrons
10:17:41:ST3_smx:INFO:	# loops 0
10:17:43:ST3_smx:INFO:	# loops 1
10:17:44:ST3_smx:INFO:	# loops 2
10:17:46:ST3_smx:INFO:	# loops 3
10:17:47:ST3_smx:INFO:	# loops 4
10:17:49:ST3_smx:INFO:	Total # of broken channels: 9
10:17:49:ST3_smx:INFO:	List of broken channels: [68, 74, 76, 78, 80, 82, 84, 86, 96]
10:17:49:ST3_smx:INFO:	Total # of broken channels: 72
10:17:49:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 68, 69, 71, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 89, 91, 93, 95, 96, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 119, 121]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:17:50:ST3_smx:INFO:	chip: 26-5 	 28.225000 C 	 1195.082160 mV
10:17:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:17:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:17:50:ST3_smx:INFO:		Electrons
10:17:50:ST3_smx:INFO:	# loops 0
10:17:52:ST3_smx:INFO:	# loops 1
10:17:53:ST3_smx:INFO:	# loops 2
10:17:55:ST3_smx:INFO:	# loops 3
10:17:56:ST3_smx:INFO:	# loops 4
10:17:58:ST3_smx:INFO:	Total # of broken channels: 4
10:17:58:ST3_smx:INFO:	List of broken channels: [13, 45, 57, 95]
10:17:58:ST3_smx:INFO:	Total # of broken channels: 60
10:17:58:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:17:59:ST3_smx:INFO:	chip: 17-6 	 47.250730 C 	 1159.654860 mV
10:17:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:17:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:17:59:ST3_smx:INFO:		Electrons
10:17:59:ST3_smx:INFO:	# loops 0
10:18:01:ST3_smx:INFO:	# loops 1
10:18:02:ST3_smx:INFO:	# loops 2
10:18:04:ST3_smx:INFO:	# loops 3
10:18:05:ST3_smx:INFO:	# loops 4
10:18:07:ST3_smx:INFO:	Total # of broken channels: 0
10:18:07:ST3_smx:INFO:	List of broken channels: []
10:18:07:ST3_smx:INFO:	Total # of broken channels: 63
10:18:07:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:18:08:ST3_smx:INFO:	chip: 24-7 	 31.389742 C 	 1200.969315 mV
10:18:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:18:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:18:08:ST3_smx:INFO:		Electrons
10:18:08:ST3_smx:INFO:	# loops 0
10:18:10:ST3_smx:INFO:	# loops 1
10:18:11:ST3_smx:INFO:	# loops 2
10:18:13:ST3_smx:INFO:	# loops 3
10:18:14:ST3_smx:INFO:	# loops 4
10:18:16:ST3_smx:INFO:	Total # of broken channels: 0
10:18:16:ST3_smx:INFO:	List of broken channels: []
10:18:16:ST3_smx:INFO:	Total # of broken channels: 62
10:18:16:ST3_smx:INFO:	List of broken channels: [0, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 123]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:18:16:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:18:16:febtest:INFO:	23-00 | XA-000-09-004-012-015-021-03 |  28.2 | 1230.3
10:18:16:febtest:INFO:	30-01 | XA-000-09-004-007-017-013-15 |  25.1 | 1242.0
10:18:17:febtest:INFO:	21-02 | XA-000-09-004-012-013-021-00 |  37.7 | 1201.0
10:18:17:febtest:INFO:	28-03 | XA-000-09-004-007-018-016-06 |  34.6 | 1212.7
10:18:17:febtest:INFO:	19-04 | XA-000-09-004-007-003-007-00 |  53.6 | 1165.6
10:18:17:febtest:INFO:	26-05 | XA-000-09-004-007-016-015-02 |  31.4 | 1218.6
10:18:18:febtest:INFO:	17-06 | XA-000-09-004-007-003-008-00 |  47.3 | 1177.4
10:18:18:febtest:INFO:	24-07 | XA-000-09-004-007-017-015-15 |  34.6 | 1218.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_02_06-10_15_57
OPERATOR  : Robert V.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_2
------------------------------------------------------------
| FEB_SN : 2329| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : MUCH
------------------------------------------------------------
SENSOR_NAME: 25202 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M4DR1T1000161B2
LADDER_NAME: L4DR100016
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '1.8900', '1.849', '2.5360']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9900', '1.850', '2.5530']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9610', '1.850', '0.5196']