DTL-STS tests database

FEB_2329 31.01.25 13:38:34

link:
...SMX_0.root
link:
...SMX_2.root
link:
...SMX_4.root
link:
...SMX_6.root
link: XA-000-09-004-007-017-013-15
...SMX_1.root
link: XA-000-09-004-007-018-016-06
...SMX_3.root
link: XA-000-09-004-007-016-015-02
...SMX_5.root
link: XA-000-09-004-007-017-015-15
...SMX_7.root
link: XA-000-09-004-007-017-015-15
...VddmCSAstatus.root
TextEdit.txt
            13:38:34:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:38:34:ST3_Shared:INFO:	                       FEB-Microcable                       
13:38:34:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:38:34:febtest:INFO:	Testing FEB with SN 2329
13:38:35:smx_tester:INFO:	Scanning setup
13:38:35:elinks:INFO:	Disabling clock on downlink 0
13:38:35:elinks:INFO:	Disabling clock on downlink 1
13:38:35:elinks:INFO:	Disabling clock on downlink 2
13:38:35:elinks:INFO:	Disabling clock on downlink 3
13:38:35:elinks:INFO:	Disabling clock on downlink 4
13:38:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:38:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:38:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:38:35:elinks:INFO:	Disabling clock on downlink 0
13:38:35:elinks:INFO:	Disabling clock on downlink 1
13:38:35:elinks:INFO:	Disabling clock on downlink 2
13:38:35:elinks:INFO:	Disabling clock on downlink 3
13:38:35:elinks:INFO:	Disabling clock on downlink 4
13:38:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:38:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:38:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:38:35:elinks:INFO:	Disabling clock on downlink 0
13:38:35:elinks:INFO:	Disabling clock on downlink 1
13:38:35:elinks:INFO:	Disabling clock on downlink 2
13:38:35:elinks:INFO:	Disabling clock on downlink 3
13:38:35:elinks:INFO:	Disabling clock on downlink 4
13:38:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:38:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:38:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:38:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:38:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:38:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:38:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:38:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:38:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:38:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:38:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:38:36:elinks:INFO:	Disabling clock on downlink 0
13:38:36:elinks:INFO:	Disabling clock on downlink 1
13:38:36:elinks:INFO:	Disabling clock on downlink 2
13:38:36:elinks:INFO:	Disabling clock on downlink 3
13:38:36:elinks:INFO:	Disabling clock on downlink 4
13:38:36:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:38:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:38:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:38:36:elinks:INFO:	Disabling clock on downlink 0
13:38:36:elinks:INFO:	Disabling clock on downlink 1
13:38:36:elinks:INFO:	Disabling clock on downlink 2
13:38:36:elinks:INFO:	Disabling clock on downlink 3
13:38:36:elinks:INFO:	Disabling clock on downlink 4
13:38:36:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:38:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:38:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:38:36:setup_element:INFO:	Scanning clock phase
13:38:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:38:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:38:36:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:38:36:setup_element:INFO:	Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:38:36:setup_element:INFO:	Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:38:36:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:38:36:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:38:36:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:38:36:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:38:36:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:38:36:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:38:36:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
13:38:36:setup_element:INFO:	Scanning data phases
13:38:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:38:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:38:41:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:38:41:setup_element:INFO:	Eye window for uplink 24: ____________XXXXXX______________________
Data delay found: 34
13:38:41:setup_element:INFO:	Eye window for uplink 25: ______________XXXXX_____________________
Data delay found: 36
13:38:41:setup_element:INFO:	Eye window for uplink 26: ______________XXXXX_____________________
Data delay found: 36
13:38:41:setup_element:INFO:	Eye window for uplink 27: _______________XXXXXX___________________
Data delay found: 37
13:38:41:setup_element:INFO:	Eye window for uplink 28: ______________________XXXXX_____________
Data delay found: 4
13:38:41:setup_element:INFO:	Eye window for uplink 29: _____________________XXXXXX_____________
Data delay found: 3
13:38:41:setup_element:INFO:	Eye window for uplink 30: _____________________XXXXXXX____________
Data delay found: 4
13:38:41:setup_element:INFO:	Eye window for uplink 31: ___________________XXXXXXX______________
Data delay found: 2
13:38:41:setup_element:INFO:	Setting the data phase to 34 for uplink 24
13:38:41:setup_element:INFO:	Setting the data phase to 36 for uplink 25
13:38:41:setup_element:INFO:	Setting the data phase to 36 for uplink 26
13:38:41:setup_element:INFO:	Setting the data phase to 37 for uplink 27
13:38:41:setup_element:INFO:	Setting the data phase to 4 for uplink 28
13:38:41:setup_element:INFO:	Setting the data phase to 3 for uplink 29
13:38:41:setup_element:INFO:	Setting the data phase to 4 for uplink 30
13:38:41:setup_element:INFO:	Setting the data phase to 2 for uplink 31
==============================================OOO==============================================
13:38:41:setup_element:INFO:	Beginning SMX ASICs map scan
13:38:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:38:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:38:41:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:38:41:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:38:41:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:38:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:38:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:38:42:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:38:42:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:38:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:38:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:38:43:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:38:43:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:38:44:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 70
    Eye Windows:
      Uplink 24: ____________________________________________________________________XXXXXXXX____
      Uplink 25: ____________________________________________________________________XXXXXXXX____
      Uplink 26: ____________________________________________________________________XXXXXXXX____
      Uplink 27: ____________________________________________________________________XXXXXXXX____
      Uplink 28: _____________________________________________________________________XXXXXXXXX__
      Uplink 29: _____________________________________________________________________XXXXXXXXX__
      Uplink 30: _____________________________________________________________________XXXXXXXX___
      Uplink 31: _____________________________________________________________________XXXXXXXX___
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 25:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 26:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 27:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 28:
      Optimal Phase: 4
      Window Length: 35
      Eye Window: ______________________XXXXX_____________
    Uplink 29:
      Optimal Phase: 3
      Window Length: 34
      Eye Window: _____________________XXXXXX_____________
    Uplink 30:
      Optimal Phase: 4
      Window Length: 33
      Eye Window: _____________________XXXXXXX____________
    Uplink 31:
      Optimal Phase: 2
      Window Length: 33
      Eye Window: ___________________XXXXXXX______________

==============================================OOO==============================================
13:38:44:setup_element:INFO:	Performing Elink synchronization
13:38:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:38:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:38:44:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:38:44:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
13:38:44:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:38:44:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:38:45:febtest:INFO:	Init all SMX (CSA): 30
13:38:52:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:38:52:febtest:INFO:	30-01 | XA-000-09-004-007-017-013-15 |   6.1 | 1212.7
13:38:52:febtest:INFO:	28-03 | XA-000-09-004-007-018-016-06 |  18.7 | 1177.4
13:38:53:febtest:INFO:	26-05 | XA-000-09-004-007-016-015-02 |  12.4 | 1189.2
13:38:53:febtest:INFO:	24-07 | XA-000-09-004-007-017-015-15 |  15.6 | 1183.3
13:38:54:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:38:56:ST3_smx:INFO:	chip: 30-1 	 6.141382 C 	 1224.468235 mV
13:38:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:38:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:38:56:ST3_smx:INFO:		Electrons
13:38:56:ST3_smx:INFO:	# loops 0
13:38:57:ST3_smx:INFO:	# loops 1
13:38:59:ST3_smx:INFO:	# loops 2
13:39:01:ST3_smx:INFO:	Total # of broken channels: 0
13:39:01:ST3_smx:INFO:	List of broken channels: []
13:39:01:ST3_smx:INFO:	Total # of broken channels: 0
13:39:01:ST3_smx:INFO:	List of broken channels: []
13:39:02:ST3_smx:INFO:	chip: 28-3 	 18.745682 C 	 1183.292940 mV
13:39:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:39:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:39:02:ST3_smx:INFO:		Electrons
13:39:03:ST3_smx:INFO:	# loops 0
13:39:04:ST3_smx:INFO:	# loops 1
13:39:06:ST3_smx:INFO:	# loops 2
13:39:07:ST3_smx:INFO:	Total # of broken channels: 0
13:39:07:ST3_smx:INFO:	List of broken channels: []
13:39:07:ST3_smx:INFO:	Total # of broken channels: 0
13:39:07:ST3_smx:INFO:	List of broken channels: []
13:39:09:ST3_smx:INFO:	chip: 26-5 	 12.438562 C 	 1200.969315 mV
13:39:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:39:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:39:09:ST3_smx:INFO:		Electrons
13:39:09:ST3_smx:INFO:	# loops 0
13:39:11:ST3_smx:INFO:	# loops 1
13:39:12:ST3_smx:INFO:	# loops 2
13:39:14:ST3_smx:INFO:	Total # of broken channels: 0
13:39:14:ST3_smx:INFO:	List of broken channels: []
13:39:14:ST3_smx:INFO:	Total # of broken channels: 0
13:39:14:ST3_smx:INFO:	List of broken channels: []
13:39:16:ST3_smx:INFO:	chip: 24-7 	 15.590880 C 	 1195.082160 mV
13:39:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:39:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:39:16:ST3_smx:INFO:		Electrons
13:39:16:ST3_smx:INFO:	# loops 0
13:39:17:ST3_smx:INFO:	# loops 1
13:39:19:ST3_smx:INFO:	# loops 2
13:39:20:ST3_smx:INFO:	Total # of broken channels: 1
13:39:20:ST3_smx:INFO:	List of broken channels: [34]
13:39:20:ST3_smx:INFO:	Total # of broken channels: 0
13:39:20:ST3_smx:INFO:	List of broken channels: []
13:39:21:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:39:21:febtest:INFO:	30-01 | XA-000-09-004-007-017-013-15 |   9.3 | 1242.0
13:39:21:febtest:INFO:	28-03 | XA-000-09-004-007-018-016-06 |  18.7 | 1212.7
13:39:21:febtest:INFO:	26-05 | XA-000-09-004-007-016-015-02 |  12.4 | 1224.5
13:39:22:febtest:INFO:	24-07 | XA-000-09-004-007-017-015-15 |  18.7 | 1212.7
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_31-13_38_34
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2329| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7396', '1.848', '1.2170']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9976', '1.850', '1.2860']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9736', '1.850', '0.2614']
Comment.txt