
FEB_2332 20.02.25 11:40:30
TextEdit.txt
11:40:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:40:30:ST3_Shared:INFO: FEB-Microcable 11:40:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:40:30:febtest:INFO: Testing FEB with SN 2332 ==============================================OOO============================================== 11:40:31:smx_tester:INFO: Scanning setup 11:40:31:elinks:INFO: Disabling clock on downlink 0 11:40:31:elinks:INFO: Disabling clock on downlink 1 11:40:31:elinks:INFO: Disabling clock on downlink 2 11:40:31:elinks:INFO: Disabling clock on downlink 3 11:40:31:elinks:INFO: Disabling clock on downlink 4 11:40:31:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:40:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:40:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:40:31:elinks:INFO: Disabling clock on downlink 0 11:40:31:elinks:INFO: Disabling clock on downlink 1 11:40:31:elinks:INFO: Disabling clock on downlink 2 11:40:31:elinks:INFO: Disabling clock on downlink 3 11:40:31:elinks:INFO: Disabling clock on downlink 4 11:40:31:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:40:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:40:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:40:31:elinks:INFO: Disabling clock on downlink 0 11:40:32:elinks:INFO: Disabling clock on downlink 1 11:40:32:elinks:INFO: Disabling clock on downlink 2 11:40:32:elinks:INFO: Disabling clock on downlink 3 11:40:32:elinks:INFO: Disabling clock on downlink 4 11:40:32:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 11:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 11:40:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:40:32:elinks:INFO: Disabling clock on downlink 0 11:40:32:elinks:INFO: Disabling clock on downlink 1 11:40:32:elinks:INFO: Disabling clock on downlink 2 11:40:32:elinks:INFO: Disabling clock on downlink 3 11:40:32:elinks:INFO: Disabling clock on downlink 4 11:40:32:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 11:40:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:40:32:elinks:INFO: Disabling clock on downlink 0 11:40:32:elinks:INFO: Disabling clock on downlink 1 11:40:32:elinks:INFO: Disabling clock on downlink 2 11:40:32:elinks:INFO: Disabling clock on downlink 3 11:40:32:elinks:INFO: Disabling clock on downlink 4 11:40:32:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 11:40:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 11:40:32:setup_element:INFO: Scanning clock phase 11:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:40:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:40:32:setup_element:INFO: Clock phase scan results for group 0, downlink 2 11:40:32:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 11:40:32:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 11:40:32:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 11:40:32:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 11:40:32:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 11:40:32:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 11:40:32:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 11:40:32:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 11:40:32:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 11:40:32:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 11:40:32:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 11:40:32:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 11:40:32:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 11:40:32:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 11:40:32:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 11:40:32:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 11:40:32:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 ==============================================OOO============================================== 11:40:32:setup_element:INFO: Scanning data phases 11:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:40:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:40:38:setup_element:INFO: Data phase scan results for group 0, downlink 2 11:40:38:setup_element:INFO: Eye window for uplink 16: XXXXXX__________________________________ Data delay found: 22 11:40:38:setup_element:INFO: Eye window for uplink 17: XXXX__________________________________XX Data delay found: 20 11:40:38:setup_element:INFO: Eye window for uplink 18: XXXXXX_________________________________X Data delay found: 22 11:40:38:setup_element:INFO: Eye window for uplink 19: XXXXXX_________________________________X Data delay found: 22 11:40:38:setup_element:INFO: Eye window for uplink 20: XXXX__________________________________XX Data delay found: 20 11:40:38:setup_element:INFO: Eye window for uplink 21: XXXXX__________________________________X Data delay found: 21 11:40:38:setup_element:INFO: Eye window for uplink 22: _XXXX__________________________________X Data delay found: 21 11:40:38:setup_element:INFO: Eye window for uplink 23: XXXX__________________________________XX Data delay found: 20 11:40:38:setup_element:INFO: Eye window for uplink 24: __________XXXXXX________________________ Data delay found: 32 11:40:38:setup_element:INFO: Eye window for uplink 25: ___________XXXXXX_______________________ Data delay found: 33 11:40:38:setup_element:INFO: Eye window for uplink 26: ________________XXXXXXX_________________ Data delay found: 39 11:40:38:setup_element:INFO: Eye window for uplink 27: _________________XXXXXXX________________ Data delay found: 0 11:40:38:setup_element:INFO: Eye window for uplink 28: __________________XXXXX_________________ Data delay found: 0 11:40:38:setup_element:INFO: Eye window for uplink 29: __________________XXXXX_________________ Data delay found: 0 11:40:38:setup_element:INFO: Eye window for uplink 30: _____________________XXXXXX_____________ Data delay found: 3 11:40:38:setup_element:INFO: Eye window for uplink 31: ___________________XXXXXXX______________ Data delay found: 2 11:40:38:setup_element:INFO: Setting the data phase to 22 for uplink 16 11:40:38:setup_element:INFO: Setting the data phase to 20 for uplink 17 11:40:38:setup_element:INFO: Setting the data phase to 22 for uplink 18 11:40:38:setup_element:INFO: Setting the data phase to 22 for uplink 19 11:40:38:setup_element:INFO: Setting the data phase to 20 for uplink 20 11:40:38:setup_element:INFO: Setting the data phase to 21 for uplink 21 11:40:38:setup_element:INFO: Setting the data phase to 21 for uplink 22 11:40:38:setup_element:INFO: Setting the data phase to 20 for uplink 23 11:40:38:setup_element:INFO: Setting the data phase to 32 for uplink 24 11:40:38:setup_element:INFO: Setting the data phase to 33 for uplink 25 11:40:38:setup_element:INFO: Setting the data phase to 39 for uplink 26 11:40:38:setup_element:INFO: Setting the data phase to 0 for uplink 27 11:40:38:setup_element:INFO: Setting the data phase to 0 for uplink 28 11:40:38:setup_element:INFO: Setting the data phase to 0 for uplink 29 11:40:38:setup_element:INFO: Setting the data phase to 3 for uplink 30 11:40:38:setup_element:INFO: Setting the data phase to 2 for uplink 31 ==============================================OOO============================================== 11:40:38:setup_element:INFO: Beginning SMX ASICs map scan 11:40:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:40:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:40:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 11:40:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 11:40:38:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 11:40:38:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 11:40:38:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 11:40:38:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 11:40:38:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 11:40:38:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 11:40:38:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 11:40:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 11:40:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 11:40:39:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 11:40:39:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 11:40:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 11:40:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 11:40:39:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 11:40:39:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 11:40:39:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 11:40:39:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 11:40:41:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 69 Eye Windows: Uplink 16: ______________________________________________________________________XXXXXXXX__ Uplink 17: ______________________________________________________________________XXXXXXXX__ Uplink 18: _____________________________________________________________________XXXXXXXXX__ Uplink 19: _____________________________________________________________________XXXXXXXXX__ Uplink 20: ____________________________________________________________________XXXXXXXXX___ Uplink 21: ____________________________________________________________________XXXXXXXXX___ Uplink 22: ____________________________________________________________________XXXXXXXXX___ Uplink 23: ____________________________________________________________________XXXXXXXXX___ Uplink 24: ____________________________________________________________________XXXXXXXX____ Uplink 25: ____________________________________________________________________XXXXXXXX____ Uplink 26: ______________________________________________________________________XXXXXXXXX_ Uplink 27: ______________________________________________________________________XXXXXXXXX_ Uplink 28: _____________________________________________________________________XXXXXXXX___ Uplink 29: _____________________________________________________________________XXXXXXXX___ Uplink 30: ______________________________________________________________________XXXXXXXX__ Uplink 31: ______________________________________________________________________XXXXXXXX__ Data phase characteristics: Uplink 16: Optimal Phase: 22 Window Length: 34 Eye Window: XXXXXX__________________________________ Uplink 17: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 18: Optimal Phase: 22 Window Length: 33 Eye Window: XXXXXX_________________________________X Uplink 19: Optimal Phase: 22 Window Length: 33 Eye Window: XXXXXX_________________________________X Uplink 20: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 21: Optimal Phase: 21 Window Length: 34 Eye Window: XXXXX__________________________________X Uplink 22: Optimal Phase: 21 Window Length: 34 Eye Window: _XXXX__________________________________X Uplink 23: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 24: Optimal Phase: 32 Window Length: 34 Eye Window: __________XXXXXX________________________ Uplink 25: Optimal Phase: 33 Window Length: 34 Eye Window: ___________XXXXXX_______________________ Uplink 26: Optimal Phase: 39 Window Length: 33 Eye Window: ________________XXXXXXX_________________ Uplink 27: Optimal Phase: 0 Window Length: 33 Eye Window: _________________XXXXXXX________________ Uplink 28: Optimal Phase: 0 Window Length: 35 Eye Window: __________________XXXXX_________________ Uplink 29: Optimal Phase: 0 Window Length: 35 Eye Window: __________________XXXXX_________________ Uplink 30: Optimal Phase: 3 Window Length: 34 Eye Window: _____________________XXXXXX_____________ Uplink 31: Optimal Phase: 2 Window Length: 33 Eye Window: ___________________XXXXXXX______________ ==============================================OOO============================================== 11:40:41:setup_element:INFO: Performing Elink synchronization 11:40:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:40:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:40:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 11:40:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 11:40:41:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 11:40:41:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 11:40:41:febtest:INFO: Init all SMX (CSA): 30 11:40:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:40:55:febtest:INFO: 23-00 | XA-000-09-004-010-014-011-11 | 31.4 | 1171.5 11:40:55:febtest:INFO: 30-01 | XA-000-09-004-010-008-002-14 | 40.9 | 1135.9 11:40:56:febtest:INFO: 21-02 | XA-000-09-004-010-008-009-14 | 34.6 | 1159.7 11:40:56:febtest:INFO: 28-03 | XA-000-09-004-010-008-011-14 | 37.7 | 1153.7 11:40:56:febtest:INFO: 19-04 | XA-000-09-004-010-008-010-14 | 37.7 | 1159.7 11:40:56:febtest:INFO: 26-05 | XA-000-09-004-010-002-010-01 | 47.3 | 1118.1 11:40:56:febtest:INFO: 17-06 | XA-000-09-004-010-011-011-00 | 47.3 | 1135.9 11:40:57:febtest:INFO: 24-07 | XA-000-09-004-010-005-009-09 | 34.6 | 1153.7 11:40:58:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 11:41:00:ST3_smx:INFO: chip: 23-0 31.389742 C 1183.292940 mV 11:41:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:00:ST3_smx:INFO: Electrons 11:41:00:ST3_smx:INFO: # loops 0 11:41:01:ST3_smx:INFO: # loops 1 11:41:03:ST3_smx:INFO: # loops 2 11:41:04:ST3_smx:INFO: Total # of broken channels: 0 11:41:04:ST3_smx:INFO: List of broken channels: [] 11:41:04:ST3_smx:INFO: Total # of broken channels: 0 11:41:04:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 11:41:06:ST3_smx:INFO: chip: 30-1 40.898880 C 1153.732915 mV 11:41:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:06:ST3_smx:INFO: Electrons 11:41:06:ST3_smx:INFO: # loops 0 11:41:08:ST3_smx:INFO: # loops 1 11:41:09:ST3_smx:INFO: # loops 2 11:41:11:ST3_smx:INFO: Total # of broken channels: 1 11:41:11:ST3_smx:INFO: List of broken channels: [1] 11:41:11:ST3_smx:INFO: Total # of broken channels: 2 11:41:11:ST3_smx:INFO: List of broken channels: [1, 21] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 11:41:13:ST3_smx:INFO: chip: 21-2 34.556970 C 1171.483840 mV 11:41:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:13:ST3_smx:INFO: Electrons 11:41:13:ST3_smx:INFO: # loops 0 11:41:14:ST3_smx:INFO: # loops 1 11:41:16:ST3_smx:INFO: # loops 2 11:41:17:ST3_smx:INFO: Total # of broken channels: 1 11:41:17:ST3_smx:INFO: List of broken channels: [64] 11:41:17:ST3_smx:INFO: Total # of broken channels: 0 11:41:17:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 11:41:19:ST3_smx:INFO: chip: 28-3 37.726682 C 1165.571835 mV 11:41:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:19:ST3_smx:INFO: Electrons 11:41:19:ST3_smx:INFO: # loops 0 11:41:21:ST3_smx:INFO: # loops 1 11:41:22:ST3_smx:INFO: # loops 2 11:41:24:ST3_smx:INFO: Total # of broken channels: 1 11:41:24:ST3_smx:INFO: List of broken channels: [38] 11:41:24:ST3_smx:INFO: Total # of broken channels: 0 11:41:24:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 11:41:26:ST3_smx:INFO: chip: 19-4 37.726682 C 1171.483840 mV 11:41:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:26:ST3_smx:INFO: Electrons 11:41:26:ST3_smx:INFO: # loops 0 11:41:27:ST3_smx:INFO: # loops 1 11:41:29:ST3_smx:INFO: # loops 2 11:41:31:ST3_smx:INFO: Total # of broken channels: 0 11:41:31:ST3_smx:INFO: List of broken channels: [] 11:41:31:ST3_smx:INFO: Total # of broken channels: 0 11:41:31:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 11:41:32:ST3_smx:INFO: chip: 26-5 47.250730 C 1129.995435 mV 11:41:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:32:ST3_smx:INFO: Electrons 11:41:32:ST3_smx:INFO: # loops 0 11:41:34:ST3_smx:INFO: # loops 1 11:41:36:ST3_smx:INFO: # loops 2 11:41:37:ST3_smx:INFO: Total # of broken channels: 0 11:41:37:ST3_smx:INFO: List of broken channels: [] 11:41:37:ST3_smx:INFO: Total # of broken channels: 1 11:41:37:ST3_smx:INFO: List of broken channels: [117] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 11:41:39:ST3_smx:INFO: chip: 17-6 47.250730 C 1147.806000 mV 11:41:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:39:ST3_smx:INFO: Electrons 11:41:39:ST3_smx:INFO: # loops 0 11:41:41:ST3_smx:INFO: # loops 1 11:41:42:ST3_smx:INFO: # loops 2 11:41:44:ST3_smx:INFO: Total # of broken channels: 0 11:41:44:ST3_smx:INFO: List of broken channels: [] 11:41:44:ST3_smx:INFO: Total # of broken channels: 1 11:41:44:ST3_smx:INFO: List of broken channels: [103] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 11:41:46:ST3_smx:INFO: chip: 24-7 37.726682 C 1165.571835 mV 11:41:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:46:ST3_smx:INFO: Electrons 11:41:46:ST3_smx:INFO: # loops 0 11:41:47:ST3_smx:INFO: # loops 1 11:41:49:ST3_smx:INFO: # loops 2 11:41:50:ST3_smx:INFO: Total # of broken channels: 0 11:41:50:ST3_smx:INFO: List of broken channels: [] 11:41:50:ST3_smx:INFO: Total # of broken channels: 0 11:41:50:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 11:41:51:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:41:51:febtest:INFO: 23-00 | XA-000-09-004-010-014-011-11 | 31.4 | 1206.9 11:41:51:febtest:INFO: 30-01 | XA-000-09-004-010-008-002-14 | 40.9 | 1177.4 11:41:51:febtest:INFO: 21-02 | XA-000-09-004-010-008-009-14 | 34.6 | 1195.1 11:41:52:febtest:INFO: 28-03 | XA-000-09-004-010-008-011-14 | 37.7 | 1183.3 11:41:52:febtest:INFO: 19-04 | XA-000-09-004-010-008-010-14 | 37.7 | 1189.2 11:41:52:febtest:INFO: 26-05 | XA-000-09-004-010-002-010-01 | 47.3 | 1147.8 11:41:52:febtest:INFO: 17-06 | XA-000-09-004-010-011-011-00 | 47.3 | 1165.6 11:41:52:febtest:INFO: 24-07 | XA-000-09-004-010-005-009-09 | 37.7 | 1189.2 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_02_20-11_40_30 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2332| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9940', '1.848', '2.3640'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0250', '1.850', '2.5180'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9920', '1.850', '0.5337']