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FEB_2333 29.01.25 15:08:30
Info
15:08:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:08:30:ST3_Shared:INFO: FEB-Microcable
15:08:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:08:30:febtest:INFO: Testing FEB with SN 2333
15:08:31:smx_tester:INFO: Scanning setup
15:08:31:elinks:INFO: Disabling clock on downlink 0
15:08:31:elinks:INFO: Disabling clock on downlink 1
15:08:31:elinks:INFO: Disabling clock on downlink 2
15:08:31:elinks:INFO: Disabling clock on downlink 3
15:08:31:elinks:INFO: Disabling clock on downlink 4
15:08:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:08:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:08:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:08:31:elinks:INFO: Disabling clock on downlink 0
15:08:31:elinks:INFO: Disabling clock on downlink 1
15:08:31:elinks:INFO: Disabling clock on downlink 2
15:08:31:elinks:INFO: Disabling clock on downlink 3
15:08:31:elinks:INFO: Disabling clock on downlink 4
15:08:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:08:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:08:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:08:31:elinks:INFO: Disabling clock on downlink 0
15:08:31:elinks:INFO: Disabling clock on downlink 1
15:08:31:elinks:INFO: Disabling clock on downlink 2
15:08:31:elinks:INFO: Disabling clock on downlink 3
15:08:31:elinks:INFO: Disabling clock on downlink 4
15:08:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:08:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:08:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:08:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:08:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:08:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:08:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:08:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:08:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:08:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:08:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:08:32:elinks:INFO: Disabling clock on downlink 0
15:08:32:elinks:INFO: Disabling clock on downlink 1
15:08:32:elinks:INFO: Disabling clock on downlink 2
15:08:32:elinks:INFO: Disabling clock on downlink 3
15:08:32:elinks:INFO: Disabling clock on downlink 4
15:08:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:08:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:08:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:08:32:elinks:INFO: Disabling clock on downlink 0
15:08:32:elinks:INFO: Disabling clock on downlink 1
15:08:32:elinks:INFO: Disabling clock on downlink 2
15:08:32:elinks:INFO: Disabling clock on downlink 3
15:08:32:elinks:INFO: Disabling clock on downlink 4
15:08:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:08:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:08:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
15:08:32:setup_element:INFO: Scanning clock phase
15:08:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:08:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:08:32:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:08:32:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________XXXXXXXXX________
Clock Delay: 27
15:08:32:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________XXXXXXXXX________
Clock Delay: 27
15:08:32:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
15:08:32:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
15:08:32:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________XXXXXXXXX________
Clock Delay: 27
15:08:32:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________XXXXXXXXX________
Clock Delay: 27
15:08:32:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
15:08:32:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
15:08:32:setup_element:INFO: Setting the clock phase to 28 for group 0, downlink 2
==============================================OOO==============================================
15:08:32:setup_element:INFO: Scanning data phases
15:08:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:08:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:08:37:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:08:37:setup_element:INFO: Eye window for uplink 24: _______XXXXXXX__________________________
Data delay found: 30
15:08:37:setup_element:INFO: Eye window for uplink 25: ________XXXXXXXX________________________
Data delay found: 31
15:08:37:setup_element:INFO: Eye window for uplink 26: ___________XXXXXXXX_____________________
Data delay found: 34
15:08:37:setup_element:INFO: Eye window for uplink 27: _______________XXXXXXXX_________________
Data delay found: 38
15:08:37:setup_element:INFO: Eye window for uplink 28: ______________XXXXXXXXX_________________
Data delay found: 38
15:08:37:setup_element:INFO: Eye window for uplink 29: _________________XXXXXXXX_______________
Data delay found: 0
15:08:37:setup_element:INFO: Eye window for uplink 30: ______________XXXXXXXXXXXXX_____________
Data delay found: 0
15:08:37:setup_element:INFO: Eye window for uplink 31: ______________XXXXXXXXXXXXX_____________
Data delay found: 0
15:08:37:setup_element:INFO: Setting the data phase to 30 for uplink 24
15:08:37:setup_element:INFO: Setting the data phase to 31 for uplink 25
15:08:37:setup_element:INFO: Setting the data phase to 34 for uplink 26
15:08:37:setup_element:INFO: Setting the data phase to 38 for uplink 27
15:08:37:setup_element:INFO: Setting the data phase to 38 for uplink 28
15:08:37:setup_element:INFO: Setting the data phase to 0 for uplink 29
15:08:37:setup_element:INFO: Setting the data phase to 0 for uplink 30
15:08:37:setup_element:INFO: Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
15:08:37:setup_element:INFO: Beginning SMX ASICs map scan
15:08:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:08:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:08:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:08:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:08:37:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
15:08:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:08:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:08:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:08:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:08:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:08:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:08:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:08:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:08:40:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 28
Window Length: 68
Eye Windows:
Uplink 24: _______________________________________________________________XXXXXXXXX________
Uplink 25: _______________________________________________________________XXXXXXXXX________
Uplink 26: __________________________________________________________________XXXXXXXXX_____
Uplink 27: __________________________________________________________________XXXXXXXXX_____
Uplink 28: _______________________________________________________________XXXXXXXXX________
Uplink 29: _______________________________________________________________XXXXXXXXX________
Uplink 30: ___________________________________________________________________XXXXXXXX_____
Uplink 31: ___________________________________________________________________XXXXXXXX_____
Data phase characteristics:
Uplink 24:
Optimal Phase: 30
Window Length: 33
Eye Window: _______XXXXXXX__________________________
Uplink 25:
Optimal Phase: 31
Window Length: 32
Eye Window: ________XXXXXXXX________________________
Uplink 26:
Optimal Phase: 34
Window Length: 32
Eye Window: ___________XXXXXXXX_____________________
Uplink 27:
Optimal Phase: 38
Window Length: 32
Eye Window: _______________XXXXXXXX_________________
Uplink 28:
Optimal Phase: 38
Window Length: 31
Eye Window: ______________XXXXXXXXX_________________
Uplink 29:
Optimal Phase: 0
Window Length: 32
Eye Window: _________________XXXXXXXX_______________
Uplink 30:
Optimal Phase: 0
Window Length: 27
Eye Window: ______________XXXXXXXXXXXXX_____________
Uplink 31:
Optimal Phase: 0
Window Length: 27
Eye Window: ______________XXXXXXXXXXXXX_____________
==============================================OOO==============================================
15:08:40:setup_element:INFO: Performing Elink synchronization
15:08:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:08:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:08:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:08:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
15:08:40:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:08:40:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:08:40:febtest:INFO: Init all SMX (CSA): 30
15:08:48:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:08:48:febtest:INFO: 30-01 | XA-000-09-004-007-008-026-05 | 34.6 | 1159.7
15:08:48:febtest:INFO: 28-03 | XA-000-09-004-007-016-016-05 | 28.2 | 1177.4
15:08:48:febtest:INFO: 26-05 | XA-000-09-004-007-018-014-01 | 31.4 | 1159.7
15:08:49:febtest:INFO: 24-07 | XA-000-09-004-007-016-018-05 | 21.9 | 1195.1
15:08:50:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:08:51:ST3_smx:INFO: chip: 30-1 34.556970 C 1171.483840 mV
15:08:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:08:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:08:51:ST3_smx:INFO: Electrons
15:08:51:ST3_smx:INFO: # loops 0
15:08:53:ST3_smx:INFO: # loops 1
15:08:55:ST3_smx:INFO: # loops 2
15:08:57:ST3_smx:INFO: Total # of broken channels: 0
15:08:57:ST3_smx:INFO: List of broken channels: []
15:08:57:ST3_smx:INFO: Total # of broken channels: 0
15:08:57:ST3_smx:INFO: List of broken channels: []
15:08:58:ST3_smx:INFO: chip: 28-3 28.225000 C 1189.190035 mV
15:08:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:08:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:08:58:ST3_smx:INFO: Electrons
15:08:58:ST3_smx:INFO: # loops 0
15:09:00:ST3_smx:INFO: # loops 1
15:09:02:ST3_smx:INFO: # loops 2
15:09:03:ST3_smx:INFO: Total # of broken channels: 0
15:09:03:ST3_smx:INFO: List of broken channels: []
15:09:03:ST3_smx:INFO: Total # of broken channels: 0
15:09:03:ST3_smx:INFO: List of broken channels: []
15:09:05:ST3_smx:INFO: chip: 26-5 31.389742 C 1165.571835 mV
15:09:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:09:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:09:05:ST3_smx:INFO: Electrons
15:09:05:ST3_smx:INFO: # loops 0
15:09:07:ST3_smx:INFO: # loops 1
15:09:08:ST3_smx:INFO: # loops 2
15:09:10:ST3_smx:INFO: Total # of broken channels: 0
15:09:10:ST3_smx:INFO: List of broken channels: []
15:09:10:ST3_smx:INFO: Total # of broken channels: 2
15:09:10:ST3_smx:INFO: List of broken channels: [27, 79]
15:09:12:ST3_smx:INFO: chip: 24-7 25.062742 C 1200.969315 mV
15:09:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:09:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:09:12:ST3_smx:INFO: Electrons
15:09:12:ST3_smx:INFO: # loops 0
15:09:14:ST3_smx:INFO: # loops 1
15:09:15:ST3_smx:INFO: # loops 2
15:09:17:ST3_smx:INFO: Total # of broken channels: 0
15:09:17:ST3_smx:INFO: List of broken channels: []
15:09:17:ST3_smx:INFO: Total # of broken channels: 0
15:09:17:ST3_smx:INFO: List of broken channels: []
15:09:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:09:18:febtest:INFO: 30-01 | XA-000-09-004-007-008-026-05 | 34.6 | 1195.1
15:09:18:febtest:INFO: 28-03 | XA-000-09-004-007-016-016-05 | 28.2 | 1206.9
15:09:18:febtest:INFO: 26-05 | XA-000-09-004-007-018-014-01 | 34.6 | 1189.2
15:09:18:febtest:INFO: 24-07 | XA-000-09-004-007-016-018-05 | 25.1 | 1224.5
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_29-15_08_30
OPERATOR : Robert V.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2333| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '0.7185', '1.848', '1.1140']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9952', '1.850', '1.1710']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9833', '1.850', '0.2632']