
FEB_2336 05.02.25 09:46:58
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09:46:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:46:58:ST3_Shared:INFO: FEB-Microcable 09:46:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:46:58:febtest:INFO: Testing FEB with SN 2336 09:47:00:smx_tester:INFO: Scanning setup 09:47:00:elinks:INFO: Disabling clock on downlink 0 09:47:00:elinks:INFO: Disabling clock on downlink 1 09:47:00:elinks:INFO: Disabling clock on downlink 2 09:47:00:elinks:INFO: Disabling clock on downlink 3 09:47:00:elinks:INFO: Disabling clock on downlink 4 09:47:00:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:47:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:47:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:47:00:elinks:INFO: Disabling clock on downlink 0 09:47:00:elinks:INFO: Disabling clock on downlink 1 09:47:00:elinks:INFO: Disabling clock on downlink 2 09:47:00:elinks:INFO: Disabling clock on downlink 3 09:47:00:elinks:INFO: Disabling clock on downlink 4 09:47:00:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:47:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:47:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:47:00:elinks:INFO: Disabling clock on downlink 0 09:47:00:elinks:INFO: Disabling clock on downlink 1 09:47:00:elinks:INFO: Disabling clock on downlink 2 09:47:00:elinks:INFO: Disabling clock on downlink 3 09:47:00:elinks:INFO: Disabling clock on downlink 4 09:47:00:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:47:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:47:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 09:47:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 09:47:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 09:47:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 09:47:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 09:47:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 09:47:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 09:47:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 09:47:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:47:00:elinks:INFO: Disabling clock on downlink 0 09:47:00:elinks:INFO: Disabling clock on downlink 1 09:47:00:elinks:INFO: Disabling clock on downlink 2 09:47:00:elinks:INFO: Disabling clock on downlink 3 09:47:00:elinks:INFO: Disabling clock on downlink 4 09:47:00:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:47:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:47:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:47:01:elinks:INFO: Disabling clock on downlink 0 09:47:01:elinks:INFO: Disabling clock on downlink 1 09:47:01:elinks:INFO: Disabling clock on downlink 2 09:47:01:elinks:INFO: Disabling clock on downlink 3 09:47:01:elinks:INFO: Disabling clock on downlink 4 09:47:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:47:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:47:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 09:47:01:setup_element:INFO: Scanning clock phase 09:47:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:47:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:47:01:setup_element:INFO: Clock phase scan results for group 0, downlink 2 09:47:01:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 09:47:01:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 09:47:01:setup_element:INFO: Eye window for uplink 26: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 09:47:01:setup_element:INFO: Eye window for uplink 27: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 09:47:01:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:47:01:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:47:01:setup_element:INFO: Eye window for uplink 30: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 09:47:01:setup_element:INFO: Eye window for uplink 31: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 09:47:01:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2 ==============================================OOO============================================== 09:47:01:setup_element:INFO: Scanning data phases 09:47:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:47:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:47:06:setup_element:INFO: Data phase scan results for group 0, downlink 2 09:47:06:setup_element:INFO: Eye window for uplink 24: _____________XXXXXXX____________________ Data delay found: 36 09:47:06:setup_element:INFO: Eye window for uplink 25: _______________XXXXXX___________________ Data delay found: 37 09:47:06:setup_element:INFO: Eye window for uplink 26: _______________XXXXX____________________ Data delay found: 37 09:47:06:setup_element:INFO: Eye window for uplink 27: ________________XXXXXX__________________ Data delay found: 38 09:47:06:setup_element:INFO: Eye window for uplink 28: ______________________XXXXXX____________ Data delay found: 4 09:47:06:setup_element:INFO: Eye window for uplink 29: ______________________XXXXX_____________ Data delay found: 4 09:47:06:setup_element:INFO: Eye window for uplink 30: ____________________XXXXXX______________ Data delay found: 2 09:47:06:setup_element:INFO: Eye window for uplink 31: __________________XXXXXX________________ Data delay found: 0 09:47:06:setup_element:INFO: Setting the data phase to 36 for uplink 24 09:47:06:setup_element:INFO: Setting the data phase to 37 for uplink 25 09:47:06:setup_element:INFO: Setting the data phase to 37 for uplink 26 09:47:06:setup_element:INFO: Setting the data phase to 38 for uplink 27 09:47:06:setup_element:INFO: Setting the data phase to 4 for uplink 28 09:47:06:setup_element:INFO: Setting the data phase to 4 for uplink 29 09:47:06:setup_element:INFO: Setting the data phase to 2 for uplink 30 09:47:06:setup_element:INFO: Setting the data phase to 0 for uplink 31 ==============================================OOO============================================== 09:47:06:setup_element:INFO: Beginning SMX ASICs map scan 09:47:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:47:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:47:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:47:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:47:06:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 09:47:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 09:47:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 09:47:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 09:47:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 09:47:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 09:47:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 09:47:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 09:47:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 09:47:09:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 31 Window Length: 70 Eye Windows: Uplink 24: ____________________________________________________________________XXXXXXXX____ Uplink 25: ____________________________________________________________________XXXXXXXX____ Uplink 26: ___________________________________________________________________XXXXXXXXX____ Uplink 27: ___________________________________________________________________XXXXXXXXX____ Uplink 28: _____________________________________________________________________XXXXXXXX___ Uplink 29: _____________________________________________________________________XXXXXXXX___ Uplink 30: ____________________________________________________________________XXXXXXXX____ Uplink 31: ____________________________________________________________________XXXXXXXX____ Data phase characteristics: Uplink 24: Optimal Phase: 36 Window Length: 33 Eye Window: _____________XXXXXXX____________________ Uplink 25: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 26: Optimal Phase: 37 Window Length: 35 Eye Window: _______________XXXXX____________________ Uplink 27: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 28: Optimal Phase: 4 Window Length: 34 Eye Window: ______________________XXXXXX____________ Uplink 29: Optimal Phase: 4 Window Length: 35 Eye Window: ______________________XXXXX_____________ Uplink 30: Optimal Phase: 2 Window Length: 34 Eye Window: ____________________XXXXXX______________ Uplink 31: Optimal Phase: 0 Window Length: 34 Eye Window: __________________XXXXXX________________ ==============================================OOO============================================== 09:47:09:setup_element:INFO: Performing Elink synchronization 09:47:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:47:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:47:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:47:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 09:47:09:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 09:47:09:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 09:47:09:febtest:INFO: Init all SMX (CSA): 30 09:47:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:47:17:febtest:INFO: 30-01 | XA-000-09-004-007-011-024-11 | 50.4 | 1118.1 09:47:17:febtest:INFO: 28-03 | XA-000-09-004-007-010-026-06 | 50.4 | 1118.1 09:47:18:febtest:INFO: 26-05 | XA-000-09-004-007-010-024-06 | 40.9 | 1141.9 09:47:18:febtest:INFO: 24-07 | XA-000-09-004-012-014-019-14 | 40.9 | 1141.9 09:47:19:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 09:47:21:ST3_smx:INFO: chip: 30-1 50.430383 C 1129.995435 mV 09:47:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:47:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:47:21:ST3_smx:INFO: Electrons 09:47:21:ST3_smx:INFO: # loops 0 09:47:23:ST3_smx:INFO: # loops 1 09:47:24:ST3_smx:INFO: # loops 2 09:47:26:ST3_smx:INFO: Total # of broken channels: 0 09:47:26:ST3_smx:INFO: List of broken channels: [] 09:47:26:ST3_smx:INFO: Total # of broken channels: 0 09:47:26:ST3_smx:INFO: List of broken channels: [] 09:47:28:ST3_smx:INFO: chip: 28-3 50.430383 C 1129.995435 mV 09:47:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:47:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:47:28:ST3_smx:INFO: Electrons 09:47:28:ST3_smx:INFO: # loops 0 09:47:29:ST3_smx:INFO: # loops 1 09:47:31:ST3_smx:INFO: # loops 2 09:47:33:ST3_smx:INFO: Total # of broken channels: 0 09:47:33:ST3_smx:INFO: List of broken channels: [] 09:47:33:ST3_smx:INFO: Total # of broken channels: 0 09:47:33:ST3_smx:INFO: List of broken channels: [] 09:47:34:ST3_smx:INFO: chip: 26-5 44.073563 C 1147.806000 mV 09:47:34:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:47:34:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:47:34:ST3_smx:INFO: Electrons 09:47:34:ST3_smx:INFO: # loops 0 09:47:36:ST3_smx:INFO: # loops 1 09:47:38:ST3_smx:INFO: # loops 2 09:47:39:ST3_smx:INFO: Total # of broken channels: 0 09:47:39:ST3_smx:INFO: List of broken channels: [] 09:47:39:ST3_smx:INFO: Total # of broken channels: 0 09:47:39:ST3_smx:INFO: List of broken channels: [] 09:47:41:ST3_smx:INFO: chip: 24-7 40.898880 C 1147.806000 mV 09:47:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:47:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:47:41:ST3_smx:INFO: Electrons 09:47:41:ST3_smx:INFO: # loops 0 09:47:42:ST3_smx:INFO: # loops 1 09:47:44:ST3_smx:INFO: # loops 2 09:47:46:ST3_smx:INFO: Total # of broken channels: 0 09:47:46:ST3_smx:INFO: List of broken channels: [] 09:47:46:ST3_smx:INFO: Total # of broken channels: 1 09:47:46:ST3_smx:INFO: List of broken channels: [0] 09:47:46:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:47:46:febtest:INFO: 30-01 | XA-000-09-004-007-011-024-11 | 50.4 | 1153.7 09:47:46:febtest:INFO: 28-03 | XA-000-09-004-007-010-026-06 | 53.6 | 1147.8 09:47:46:febtest:INFO: 26-05 | XA-000-09-004-007-010-024-06 | 44.1 | 1171.5 09:47:47:febtest:INFO: 24-07 | XA-000-09-004-012-014-019-14 | 40.9 | 1171.5 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_02_05-09_46_58 OPERATOR : Alois Alzheimer SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2336| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9619', '1.848', '1.1470'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0150', '1.850', '1.3270'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9969', '1.850', '0.2698'] 09:48:20:ST3_Shared:INFO: Listo of operators:Robert V.;