FEB_2336    05.02.25 13:31:30

TextEdit.txt
            13:31:30:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:31:30:ST3_Shared:INFO:	                       FEB-Microcable                       
13:31:30:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:31:30:febtest:INFO:	Testing FEB with SN 2336
13:31:31:smx_tester:INFO:	Scanning setup
13:31:31:elinks:INFO:	Disabling clock on downlink 0
13:31:31:elinks:INFO:	Disabling clock on downlink 1
13:31:31:elinks:INFO:	Disabling clock on downlink 2
13:31:31:elinks:INFO:	Disabling clock on downlink 3
13:31:31:elinks:INFO:	Disabling clock on downlink 4
13:31:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:31:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:31:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:31:31:elinks:INFO:	Disabling clock on downlink 0
13:31:31:elinks:INFO:	Disabling clock on downlink 1
13:31:31:elinks:INFO:	Disabling clock on downlink 2
13:31:31:elinks:INFO:	Disabling clock on downlink 3
13:31:31:elinks:INFO:	Disabling clock on downlink 4
13:31:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:31:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:31:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:31:32:elinks:INFO:	Disabling clock on downlink 0
13:31:32:elinks:INFO:	Disabling clock on downlink 1
13:31:32:elinks:INFO:	Disabling clock on downlink 2
13:31:32:elinks:INFO:	Disabling clock on downlink 3
13:31:32:elinks:INFO:	Disabling clock on downlink 4
13:31:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:31:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:31:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:31:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:31:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:31:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:31:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:31:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:31:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:31:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:31:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:31:32:elinks:INFO:	Disabling clock on downlink 0
13:31:32:elinks:INFO:	Disabling clock on downlink 1
13:31:32:elinks:INFO:	Disabling clock on downlink 2
13:31:32:elinks:INFO:	Disabling clock on downlink 3
13:31:32:elinks:INFO:	Disabling clock on downlink 4
13:31:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:31:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:31:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:31:32:elinks:INFO:	Disabling clock on downlink 0
13:31:32:elinks:INFO:	Disabling clock on downlink 1
13:31:32:elinks:INFO:	Disabling clock on downlink 2
13:31:32:elinks:INFO:	Disabling clock on downlink 3
13:31:32:elinks:INFO:	Disabling clock on downlink 4
13:31:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:31:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:31:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:31:32:setup_element:INFO:	Scanning clock phase
13:31:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:31:32:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:32:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:31:32:setup_element:INFO:	Eye window for uplink 24: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:31:32:setup_element:INFO:	Eye window for uplink 25: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:31:32:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:31:32:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:31:32:setup_element:INFO:	Eye window for uplink 28: X_________________________________________________________________________XXXXXX
Clock Delay: 37
13:31:32:setup_element:INFO:	Eye window for uplink 29: X_________________________________________________________________________XXXXXX
Clock Delay: 37
13:31:32:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:31:32:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:31:32:setup_element:INFO:	Setting the clock phase to 36 for group 0, downlink 2
==============================================OOO==============================================
13:31:32:setup_element:INFO:	Scanning data phases
13:31:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:31:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:38:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:31:38:setup_element:INFO:	Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
13:31:38:setup_element:INFO:	Eye window for uplink 25: _______XXXXXX___________________________
Data delay found: 29
13:31:38:setup_element:INFO:	Eye window for uplink 26: _____XXXXX______________________________
Data delay found: 27
13:31:38:setup_element:INFO:	Eye window for uplink 27: ________XXXX____________________________
Data delay found: 29
13:31:38:setup_element:INFO:	Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
13:31:38:setup_element:INFO:	Eye window for uplink 29: ______________XXXXXX____________________
Data delay found: 36
13:31:38:setup_element:INFO:	Eye window for uplink 30: ____________XXXXXX______________________
Data delay found: 34
13:31:38:setup_element:INFO:	Eye window for uplink 31: __________XXXXXX________________________
Data delay found: 32
13:31:38:setup_element:INFO:	Setting the data phase to 27 for uplink 24
13:31:38:setup_element:INFO:	Setting the data phase to 29 for uplink 25
13:31:38:setup_element:INFO:	Setting the data phase to 27 for uplink 26
13:31:38:setup_element:INFO:	Setting the data phase to 29 for uplink 27
13:31:38:setup_element:INFO:	Setting the data phase to 35 for uplink 28
13:31:38:setup_element:INFO:	Setting the data phase to 36 for uplink 29
13:31:38:setup_element:INFO:	Setting the data phase to 34 for uplink 30
13:31:38:setup_element:INFO:	Setting the data phase to 32 for uplink 31
==============================================OOO==============================================
13:31:38:setup_element:INFO:	Beginning SMX ASICs map scan
13:31:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:31:38:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:38:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:31:38:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:31:38:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:31:38:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:31:38:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:31:38:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:31:38:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:31:39:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:31:39:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:31:39:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:31:39:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:31:40:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 36
    Window Length: 71
    Eye Windows:
      Uplink 24: _________________________________________________________________________XXXXXX_
      Uplink 25: _________________________________________________________________________XXXXXX_
      Uplink 26: ________________________________________________________________________XXXXXXX_
      Uplink 27: ________________________________________________________________________XXXXXXX_
      Uplink 28: X_________________________________________________________________________XXXXXX
      Uplink 29: X_________________________________________________________________________XXXXXX
      Uplink 30: ________________________________________________________________________XXXXXXX_
      Uplink 31: ________________________________________________________________________XXXXXXX_
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 26:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 27:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 29:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 30:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 31:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________

==============================================OOO==============================================
13:31:40:setup_element:INFO:	Performing Elink synchronization
13:31:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:31:40:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:40:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:31:40:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
13:31:40:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:31:40:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
13:31:41:febtest:INFO:	Init all SMX (CSA): 30
13:31:48:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:31:48:febtest:INFO:	30-01 | XA-000-09-004-007-011-024-11 |  40.9 | 1118.1
13:31:49:febtest:INFO:	28-03 | XA-000-09-004-007-010-026-06 |  37.7 | 1124.0
13:31:49:febtest:INFO:	26-05 | XA-000-09-004-007-010-024-06 |  31.4 | 1141.9
13:31:49:febtest:INFO:	24-07 | XA-000-09-004-012-014-019-14 |  31.4 | 1147.8
13:31:50:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:31:52:ST3_smx:INFO:	chip: 30-1 	 37.726682 C 	 1129.995435 mV
13:31:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:52:ST3_smx:INFO:		Electrons
13:31:52:ST3_smx:INFO:	# loops 0
13:31:54:ST3_smx:INFO:	# loops 1
13:31:55:ST3_smx:INFO:	# loops 2
13:31:57:ST3_smx:INFO:	Total # of broken channels: 0
13:31:57:ST3_smx:INFO:	List of broken channels: []
13:31:57:ST3_smx:INFO:	Total # of broken channels: 0
13:31:57:ST3_smx:INFO:	List of broken channels: []
13:31:59:ST3_smx:INFO:	chip: 28-3 	 37.726682 C 	 1129.995435 mV
13:31:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:59:ST3_smx:INFO:		Electrons
13:31:59:ST3_smx:INFO:	# loops 0
13:32:00:ST3_smx:INFO:	# loops 1
13:32:02:ST3_smx:INFO:	# loops 2
13:32:03:ST3_smx:INFO:	Total # of broken channels: 0
13:32:03:ST3_smx:INFO:	List of broken channels: []
13:32:03:ST3_smx:INFO:	Total # of broken channels: 0
13:32:03:ST3_smx:INFO:	List of broken channels: []
13:32:05:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1153.732915 mV
13:32:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:05:ST3_smx:INFO:		Electrons
13:32:05:ST3_smx:INFO:	# loops 0
13:32:07:ST3_smx:INFO:	# loops 1
13:32:08:ST3_smx:INFO:	# loops 2
13:32:10:ST3_smx:INFO:	Total # of broken channels: 0
13:32:10:ST3_smx:INFO:	List of broken channels: []
13:32:10:ST3_smx:INFO:	Total # of broken channels: 0
13:32:10:ST3_smx:INFO:	List of broken channels: []
13:32:12:ST3_smx:INFO:	chip: 24-7 	 31.389742 C 	 1153.732915 mV
13:32:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:12:ST3_smx:INFO:		Electrons
13:32:12:ST3_smx:INFO:	# loops 0
13:32:13:ST3_smx:INFO:	# loops 1
13:32:15:ST3_smx:INFO:	# loops 2
13:32:16:ST3_smx:INFO:	Total # of broken channels: 0
13:32:16:ST3_smx:INFO:	List of broken channels: []
13:32:16:ST3_smx:INFO:	Total # of broken channels: 1
13:32:16:ST3_smx:INFO:	List of broken channels: [0]
13:32:17:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:32:17:febtest:INFO:	30-01 | XA-000-09-004-007-011-024-11 |  37.7 | 1153.7
13:32:17:febtest:INFO:	28-03 | XA-000-09-004-007-010-026-06 |  40.9 | 1153.7
13:32:18:febtest:INFO:	26-05 | XA-000-09-004-007-010-024-06 |  31.4 | 1171.5
13:32:18:febtest:INFO:	24-07 | XA-000-09-004-012-014-019-14 |  34.6 | 1171.5
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_05-13_31_30
OPERATOR  : Robert V.; Irakli K.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_2
------------------------------------------------------------
| FEB_SN : 2336| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9702', '1.849', '1.1880']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0100', '1.850', '1.2610']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9942', '1.850', '0.2691']