09:15:47:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:15:47:ST3_Shared:INFO:	                         FEB-Sensor                         
09:15:47:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:15:55:ST3_ModuleSelector:DEBUG:	M4DR3T2000172B2
09:15:55:ST3_ModuleSelector:DEBUG:	L4DR300017
09:15:55:ST3_ModuleSelector:DEBUG:	02124
09:15:55:ST3_ModuleSelector:DEBUG:	62x124
09:15:55:ST3_ModuleSelector:DEBUG:	A
09:15:55:ST3_ModuleSelector:DEBUG:	M4DR3T2000172B2
09:15:55:ST3_ModuleSelector:DEBUG:	L4DR300017
09:15:55:ST3_ModuleSelector:DEBUG:	02124
09:15:55:ST3_ModuleSelector:DEBUG:	62x124
09:15:55:ST3_ModuleSelector:DEBUG:	A
09:16:03:ST3_ModuleSelector:INFO:	M4DR3T2000172B2
09:16:03:ST3_ModuleSelector:INFO:	02124
09:16:03:febtest:INFO:	Testing FEB with SN 2340
09:16:04:smx_tester:INFO:	Scanning setup
09:16:04:elinks:INFO:	Disabling clock on downlink 0
09:16:04:elinks:INFO:	Disabling clock on downlink 1
09:16:04:elinks:INFO:	Disabling clock on downlink 2
09:16:04:elinks:INFO:	Disabling clock on downlink 3
09:16:04:elinks:INFO:	Disabling clock on downlink 4
09:16:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:16:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:16:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:16:04:elinks:INFO:	Disabling clock on downlink 0
09:16:04:elinks:INFO:	Disabling clock on downlink 1
09:16:04:elinks:INFO:	Disabling clock on downlink 2
09:16:04:elinks:INFO:	Disabling clock on downlink 3
09:16:04:elinks:INFO:	Disabling clock on downlink 4
09:16:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:16:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:16:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:16:04:elinks:INFO:	Disabling clock on downlink 0
09:16:05:elinks:INFO:	Disabling clock on downlink 1
09:16:05:elinks:INFO:	Disabling clock on downlink 2
09:16:05:elinks:INFO:	Disabling clock on downlink 3
09:16:05:elinks:INFO:	Disabling clock on downlink 4
09:16:05:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:16:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:16:05:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:16:05:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:16:05:elinks:INFO:	Disabling clock on downlink 0
09:16:05:elinks:INFO:	Disabling clock on downlink 1
09:16:05:elinks:INFO:	Disabling clock on downlink 2
09:16:05:elinks:INFO:	Disabling clock on downlink 3
09:16:05:elinks:INFO:	Disabling clock on downlink 4
09:16:05:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:16:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:16:05:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:16:05:elinks:INFO:	Disabling clock on downlink 0
09:16:05:elinks:INFO:	Disabling clock on downlink 1
09:16:05:elinks:INFO:	Disabling clock on downlink 2
09:16:05:elinks:INFO:	Disabling clock on downlink 3
09:16:05:elinks:INFO:	Disabling clock on downlink 4
09:16:05:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:16:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:16:05:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:16:05:setup_element:INFO:	Scanning clock phase
09:16:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:16:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:16:05:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:16:05:setup_element:INFO:	Eye window for uplink 16: XX_________________________________________________________________________XXXXX
Clock Delay: 38
09:16:05:setup_element:INFO:	Eye window for uplink 17: XX_________________________________________________________________________XXXXX
Clock Delay: 38
09:16:05:setup_element:INFO:	Eye window for uplink 18: XX_________________________________________________________________________XXXXX
Clock Delay: 38
09:16:05:setup_element:INFO:	Eye window for uplink 19: XX_________________________________________________________________________XXXXX
Clock Delay: 38
09:16:05:setup_element:INFO:	Eye window for uplink 20: XX_________________________________________________________________________XXXXX
Clock Delay: 38
09:16:05:setup_element:INFO:	Eye window for uplink 21: XX_________________________________________________________________________XXXXX
Clock Delay: 38
09:16:05:setup_element:INFO:	Eye window for uplink 22: X_X________________________________________________________________________XXXXX
Clock Delay: 38
09:16:05:setup_element:INFO:	Eye window for uplink 23: X_X________________________________________________________________________XXXXX
Clock Delay: 38
09:16:05:setup_element:INFO:	Eye window for uplink 24: _________________________________________________________________________XXXXXXX
Clock Delay: 36
09:16:05:setup_element:INFO:	Eye window for uplink 25: _________________________________________________________________________XXXXXXX
Clock Delay: 36
09:16:05:setup_element:INFO:	Eye window for uplink 26: X_________________________________________________________________________XXXXXX
Clock Delay: 37
09:16:05:setup_element:INFO:	Eye window for uplink 27: X_________________________________________________________________________XXXXXX
Clock Delay: 37
09:16:05:setup_element:INFO:	Eye window for uplink 28: XX_________________________________________________________________________XXXXX
Clock Delay: 38
09:16:05:setup_element:INFO:	Eye window for uplink 29: XX_________________________________________________________________________XXXXX
Clock Delay: 38
09:16:05:setup_element:INFO:	Eye window for uplink 30: X_________________________________________________________________________XXXXXX
Clock Delay: 37
09:16:05:setup_element:INFO:	Eye window for uplink 31: X_________________________________________________________________________XXXXXX
Clock Delay: 37
09:16:05:setup_element:INFO:	Setting the clock phase to 37 for group 0, downlink 2
==============================================OOO==============================================
09:16:05:setup_element:INFO:	Scanning data phases
09:16:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:16:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:16:10:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:16:10:setup_element:INFO:	Eye window for uplink 16: XXXXX_________________________________XX
Data delay found: 21
09:16:10:setup_element:INFO:	Eye window for uplink 17: X__________________________________XXXXX
Data delay found: 17
09:16:10:setup_element:INFO:	Eye window for uplink 18: XXX__________________________________XXX
Data delay found: 19
09:16:10:setup_element:INFO:	Eye window for uplink 19: X___________________________________XXXX
Data delay found: 18
09:16:10:setup_element:INFO:	Eye window for uplink 20: XX_________________________________XXXXX
Data delay found: 18
09:16:10:setup_element:INFO:	Eye window for uplink 21: XX__________________________________XXXX
Data delay found: 18
09:16:10:setup_element:INFO:	Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
09:16:10:setup_element:INFO:	Eye window for uplink 23: X__________________________________XXXXX
Data delay found: 17
09:16:10:setup_element:INFO:	Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
09:16:10:setup_element:INFO:	Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
09:16:10:setup_element:INFO:	Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
09:16:10:setup_element:INFO:	Eye window for uplink 27: _________XXXXX__________________________
Data delay found: 31
09:16:10:setup_element:INFO:	Eye window for uplink 28: ____________XXXXXXX_____________________
Data delay found: 35
09:16:10:setup_element:INFO:	Eye window for uplink 29: _____________XXXXXXX____________________
Data delay found: 36
09:16:10:setup_element:INFO:	Eye window for uplink 30: ____________XXXXXX______________________
Data delay found: 34
09:16:10:setup_element:INFO:	Eye window for uplink 31: __________XXXXXX________________________
Data delay found: 32
09:16:10:setup_element:INFO:	Setting the data phase to 21 for uplink 16
09:16:10:setup_element:INFO:	Setting the data phase to 17 for uplink 17
09:16:10:setup_element:INFO:	Setting the data phase to 19 for uplink 18
09:16:10:setup_element:INFO:	Setting the data phase to 18 for uplink 19
09:16:10:setup_element:INFO:	Setting the data phase to 18 for uplink 20
09:16:10:setup_element:INFO:	Setting the data phase to 18 for uplink 21
09:16:10:setup_element:INFO:	Setting the data phase to 19 for uplink 22
09:16:10:setup_element:INFO:	Setting the data phase to 17 for uplink 23
09:16:10:setup_element:INFO:	Setting the data phase to 27 for uplink 24
09:16:10:setup_element:INFO:	Setting the data phase to 29 for uplink 25
09:16:10:setup_element:INFO:	Setting the data phase to 28 for uplink 26
09:16:10:setup_element:INFO:	Setting the data phase to 31 for uplink 27
09:16:10:setup_element:INFO:	Setting the data phase to 35 for uplink 28
09:16:10:setup_element:INFO:	Setting the data phase to 36 for uplink 29
09:16:10:setup_element:INFO:	Setting the data phase to 34 for uplink 30
09:16:10:setup_element:INFO:	Setting the data phase to 32 for uplink 31
==============================================OOO==============================================
09:16:10:setup_element:INFO:	Beginning SMX ASICs map scan
09:16:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:16:11:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:16:11:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:16:11:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:16:11:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:16:11:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:16:11:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:16:11:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:16:11:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:16:11:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:16:11:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:16:11:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:16:11:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:16:11:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:16:11:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:16:11:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:16:11:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:16:12:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:16:12:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:16:12:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:16:12:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:16:13:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 37
    Window Length: 70
    Eye Windows:
      Uplink 16: XX_________________________________________________________________________XXXXX
      Uplink 17: XX_________________________________________________________________________XXXXX
      Uplink 18: XX_________________________________________________________________________XXXXX
      Uplink 19: XX_________________________________________________________________________XXXXX
      Uplink 20: XX_________________________________________________________________________XXXXX
      Uplink 21: XX_________________________________________________________________________XXXXX
      Uplink 22: X_X________________________________________________________________________XXXXX
      Uplink 23: X_X________________________________________________________________________XXXXX
      Uplink 24: _________________________________________________________________________XXXXXXX
      Uplink 25: _________________________________________________________________________XXXXXXX
      Uplink 26: X_________________________________________________________________________XXXXXX
      Uplink 27: X_________________________________________________________________________XXXXXX
      Uplink 28: XX_________________________________________________________________________XXXXX
      Uplink 29: XX_________________________________________________________________________XXXXX
      Uplink 30: X_________________________________________________________________________XXXXXX
      Uplink 31: X_________________________________________________________________________XXXXXX
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXXXX_________________________________XX
    Uplink 17:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 18:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 19:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 20:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 21:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 22:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 23:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 24:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 33
      Eye Window: ____________XXXXXXX_____________________
    Uplink 29:
      Optimal Phase: 36
      Window Length: 33
      Eye Window: _____________XXXXXXX____________________
    Uplink 30:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 31:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________

==============================================OOO==============================================
09:16:13:setup_element:INFO:	Performing Elink synchronization
09:16:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:16:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:16:13:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:16:13:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
09:16:13:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:16:13:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:16:14:febtest:INFO:	Init all SMX (CSA): 30
09:16:28:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:16:28:febtest:INFO:	23-00 | XA-000-09-004-010-014-026-12 |  25.1 | 1171.5
09:16:28:febtest:INFO:	30-01 | XA-000-09-004-010-009-003-03 |  31.4 | 1153.7
09:16:28:febtest:INFO:	21-02 | XA-000-09-004-010-005-025-14 |  37.7 | 1135.9
09:16:28:febtest:INFO:	28-03 | XA-000-09-004-010-008-025-09 |  31.4 | 1147.8
09:16:29:febtest:INFO:	19-04 | XA-000-09-004-010-008-026-09 |  31.4 | 1159.7
09:16:29:febtest:INFO:	26-05 | XA-000-09-004-010-011-027-07 |  15.6 | 1212.7
09:16:29:febtest:INFO:	17-06 | XA-000-09-004-010-011-026-07 |  31.4 | 1171.5
09:16:29:febtest:INFO:	24-07 | XA-000-09-004-010-009-002-03 |  31.4 | 1159.7
09:16:30:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:16:32:ST3_smx:INFO:	chip: 23-0 	 25.062742 C 	 1183.292940 mV
09:16:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:16:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:16:32:ST3_smx:INFO:		Electrons
09:16:32:ST3_smx:INFO:	# loops 0
09:16:34:ST3_smx:INFO:	# loops 1
09:16:35:ST3_smx:INFO:	# loops 2
09:16:37:ST3_smx:INFO:	# loops 3
09:16:39:ST3_smx:INFO:	# loops 4
09:16:40:ST3_smx:INFO:	Total # of broken channels: 0
09:16:40:ST3_smx:INFO:	List of broken channels: []
09:16:40:ST3_smx:INFO:	Total # of broken channels: 3
09:16:40:ST3_smx:INFO:	List of broken channels: [49, 55, 69]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:16:42:ST3_smx:INFO:	chip: 30-1 	 31.389742 C 	 1171.483840 mV
09:16:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:16:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:16:42:ST3_smx:INFO:		Electrons
09:16:42:ST3_smx:INFO:	# loops 0
09:16:44:ST3_smx:INFO:	# loops 1
09:16:45:ST3_smx:INFO:	# loops 2
09:16:47:ST3_smx:INFO:	# loops 3
09:16:48:ST3_smx:INFO:	# loops 4
09:16:50:ST3_smx:INFO:	Total # of broken channels: 0
09:16:50:ST3_smx:INFO:	List of broken channels: []
09:16:50:ST3_smx:INFO:	Total # of broken channels: 0
09:16:50:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:16:52:ST3_smx:INFO:	chip: 21-2 	 37.726682 C 	 1147.806000 mV
09:16:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:16:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:16:52:ST3_smx:INFO:		Electrons
09:16:52:ST3_smx:INFO:	# loops 0
09:16:53:ST3_smx:INFO:	# loops 1
09:16:55:ST3_smx:INFO:	# loops 2
09:16:56:ST3_smx:INFO:	# loops 3
09:16:58:ST3_smx:INFO:	# loops 4
09:16:59:ST3_smx:INFO:	Total # of broken channels: 0
09:16:59:ST3_smx:INFO:	List of broken channels: []
09:16:59:ST3_smx:INFO:	Total # of broken channels: 0
09:16:59:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:17:01:ST3_smx:INFO:	chip: 28-3 	 31.389742 C 	 1159.654860 mV
09:17:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:17:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:17:01:ST3_smx:INFO:		Electrons
09:17:01:ST3_smx:INFO:	# loops 0
09:17:03:ST3_smx:INFO:	# loops 1
09:17:04:ST3_smx:INFO:	# loops 2
09:17:06:ST3_smx:INFO:	# loops 3
09:17:07:ST3_smx:INFO:	# loops 4
09:17:09:ST3_smx:INFO:	Total # of broken channels: 0
09:17:09:ST3_smx:INFO:	List of broken channels: []
09:17:09:ST3_smx:INFO:	Total # of broken channels: 0
09:17:09:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:17:11:ST3_smx:INFO:	chip: 19-4 	 31.389742 C 	 1171.483840 mV
09:17:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:17:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:17:11:ST3_smx:INFO:		Electrons
09:17:11:ST3_smx:INFO:	# loops 0
09:17:12:ST3_smx:INFO:	# loops 1
09:17:14:ST3_smx:INFO:	# loops 2
09:17:16:ST3_smx:INFO:	# loops 3
09:17:17:ST3_smx:INFO:	# loops 4
09:17:19:ST3_smx:INFO:	Total # of broken channels: 0
09:17:19:ST3_smx:INFO:	List of broken channels: []
09:17:19:ST3_smx:INFO:	Total # of broken channels: 0
09:17:19:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:17:20:ST3_smx:INFO:	chip: 26-5 	 15.590880 C 	 1224.468235 mV
09:17:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:17:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:17:20:ST3_smx:INFO:		Electrons
09:17:20:ST3_smx:INFO:	# loops 0
09:17:22:ST3_smx:INFO:	# loops 1
09:17:24:ST3_smx:INFO:	# loops 2
09:17:25:ST3_smx:INFO:	# loops 3
09:17:27:ST3_smx:INFO:	# loops 4
09:17:28:ST3_smx:INFO:	Total # of broken channels: 0
09:17:28:ST3_smx:INFO:	List of broken channels: []
09:17:28:ST3_smx:INFO:	Total # of broken channels: 0
09:17:28:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:17:30:ST3_smx:INFO:	chip: 17-6 	 34.556970 C 	 1177.390875 mV
09:17:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:17:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:17:30:ST3_smx:INFO:		Electrons
09:17:30:ST3_smx:INFO:	# loops 0
09:17:32:ST3_smx:INFO:	# loops 1
09:17:33:ST3_smx:INFO:	# loops 2
09:17:35:ST3_smx:INFO:	# loops 3
09:17:36:ST3_smx:INFO:	# loops 4
09:17:38:ST3_smx:INFO:	Total # of broken channels: 0
09:17:38:ST3_smx:INFO:	List of broken channels: []
09:17:38:ST3_smx:INFO:	Total # of broken channels: 2
09:17:38:ST3_smx:INFO:	List of broken channels: [24, 62]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:17:40:ST3_smx:INFO:	chip: 24-7 	 31.389742 C 	 1171.483840 mV
09:17:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:17:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:17:40:ST3_smx:INFO:		Electrons
09:17:40:ST3_smx:INFO:	# loops 0
09:17:41:ST3_smx:INFO:	# loops 1
09:17:43:ST3_smx:INFO:	# loops 2
09:17:44:ST3_smx:INFO:	# loops 3
09:17:46:ST3_smx:INFO:	# loops 4
09:17:47:ST3_smx:INFO:	Total # of broken channels: 0
09:17:47:ST3_smx:INFO:	List of broken channels: []
09:17:47:ST3_smx:INFO:	Total # of broken channels: 0
09:17:47:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
09:17:48:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:17:48:febtest:INFO:	23-00 | XA-000-09-004-010-014-026-12 |  28.2 | 1206.9
09:17:48:febtest:INFO:	30-01 | XA-000-09-004-010-009-003-03 |  34.6 | 1189.2
09:17:48:febtest:INFO:	21-02 | XA-000-09-004-010-005-025-14 |  40.9 | 1165.6
09:17:49:febtest:INFO:	28-03 | XA-000-09-004-010-008-025-09 |  34.6 | 1177.4
09:17:49:febtest:INFO:	19-04 | XA-000-09-004-010-008-026-09 |  34.6 | 1189.2
09:17:49:febtest:INFO:	26-05 | XA-000-09-004-010-011-027-07 |  18.7 | 1242.0
09:17:49:febtest:INFO:	17-06 | XA-000-09-004-010-011-026-07 |  34.6 | 1206.9
09:17:49:febtest:INFO:	24-07 | XA-000-09-004-010-009-002-03 |  34.6 | 1189.2
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_02_20-09_15_47
OPERATOR  : Kerstin S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_2
------------------------------------------------------------
| FEB_SN : 2340| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 02124 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M4DR3T2000172B2
LADDER_NAME: L4DR300017
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '1.5860', '1.849', '2.1190']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0610', '1.849', '2.5010']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9550', '1.850', '0.5203']