
FEB_2354 27.02.25 14:20:21
TextEdit.txt
14:20:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:20:21:ST3_Shared:INFO: FEB-Microcable 14:20:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:20:21:febtest:INFO: Testing FEB with SN 2354 ==============================================OOO============================================== 14:20:22:smx_tester:INFO: Scanning setup 14:20:22:elinks:INFO: Disabling clock on downlink 0 14:20:22:elinks:INFO: Disabling clock on downlink 1 14:20:22:elinks:INFO: Disabling clock on downlink 2 14:20:22:elinks:INFO: Disabling clock on downlink 3 14:20:22:elinks:INFO: Disabling clock on downlink 4 14:20:22:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:20:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:20:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:20:23:elinks:INFO: Disabling clock on downlink 0 14:20:23:elinks:INFO: Disabling clock on downlink 1 14:20:23:elinks:INFO: Disabling clock on downlink 2 14:20:23:elinks:INFO: Disabling clock on downlink 3 14:20:23:elinks:INFO: Disabling clock on downlink 4 14:20:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:20:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:20:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:20:23:elinks:INFO: Disabling clock on downlink 0 14:20:23:elinks:INFO: Disabling clock on downlink 1 14:20:23:elinks:INFO: Disabling clock on downlink 2 14:20:23:elinks:INFO: Disabling clock on downlink 3 14:20:23:elinks:INFO: Disabling clock on downlink 4 14:20:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:20:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 14:20:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 14:20:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:20:23:elinks:INFO: Disabling clock on downlink 0 14:20:23:elinks:INFO: Disabling clock on downlink 1 14:20:23:elinks:INFO: Disabling clock on downlink 2 14:20:23:elinks:INFO: Disabling clock on downlink 3 14:20:23:elinks:INFO: Disabling clock on downlink 4 14:20:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:20:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:20:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:20:23:elinks:INFO: Disabling clock on downlink 0 14:20:23:elinks:INFO: Disabling clock on downlink 1 14:20:23:elinks:INFO: Disabling clock on downlink 2 14:20:23:elinks:INFO: Disabling clock on downlink 3 14:20:23:elinks:INFO: Disabling clock on downlink 4 14:20:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:20:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:20:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 14:20:23:setup_element:INFO: Scanning clock phase 14:20:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:20:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:20:23:setup_element:INFO: Clock phase scan results for group 0, downlink 2 14:20:23:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 14:20:23:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 14:20:23:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXXXX Clock Delay: 34 14:20:23:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXXXX Clock Delay: 34 14:20:23:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 14:20:23:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 14:20:23:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:20:23:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:20:23:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 14:20:23:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 14:20:23:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 14:20:23:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 14:20:23:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 14:20:23:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 14:20:23:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:20:23:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:20:23:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2 ==============================================OOO============================================== 14:20:23:setup_element:INFO: Scanning data phases 14:20:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:20:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:20:29:setup_element:INFO: Data phase scan results for group 0, downlink 2 14:20:29:setup_element:INFO: Eye window for uplink 16: ___XXXXX________________________________ Data delay found: 25 14:20:29:setup_element:INFO: Eye window for uplink 17: __XXXXX_________________________________ Data delay found: 24 14:20:29:setup_element:INFO: Eye window for uplink 18: ___XXXXXX_______________________________ Data delay found: 25 14:20:29:setup_element:INFO: Eye window for uplink 19: ____XXXXX_______________________________ Data delay found: 26 14:20:29:setup_element:INFO: Eye window for uplink 20: XXXXXX__________________________________ Data delay found: 22 14:20:29:setup_element:INFO: Eye window for uplink 21: _XXXXXX_________________________________ Data delay found: 23 14:20:29:setup_element:INFO: Eye window for uplink 22: __XXXXXX________________________________ Data delay found: 24 14:20:29:setup_element:INFO: Eye window for uplink 23: _XXXXX__________________________________ Data delay found: 23 14:20:29:setup_element:INFO: Eye window for uplink 24: _____________XXXXX______________________ Data delay found: 35 14:20:29:setup_element:INFO: Eye window for uplink 25: _______________XXXXX____________________ Data delay found: 37 14:20:29:setup_element:INFO: Eye window for uplink 26: _______________XXXXXX___________________ Data delay found: 37 14:20:29:setup_element:INFO: Eye window for uplink 27: _________________XXXXXX_________________ Data delay found: 39 14:20:29:setup_element:INFO: Eye window for uplink 28: ___________________XXXXX________________ Data delay found: 1 14:20:29:setup_element:INFO: Eye window for uplink 29: __________________XXXXX_________________ Data delay found: 0 14:20:29:setup_element:INFO: Eye window for uplink 30: _______________________XXXXXX___________ Data delay found: 5 14:20:29:setup_element:INFO: Eye window for uplink 31: ______________________XXXXX_____________ Data delay found: 4 14:20:29:setup_element:INFO: Setting the data phase to 25 for uplink 16 14:20:29:setup_element:INFO: Setting the data phase to 24 for uplink 17 14:20:29:setup_element:INFO: Setting the data phase to 25 for uplink 18 14:20:29:setup_element:INFO: Setting the data phase to 26 for uplink 19 14:20:29:setup_element:INFO: Setting the data phase to 22 for uplink 20 14:20:29:setup_element:INFO: Setting the data phase to 23 for uplink 21 14:20:29:setup_element:INFO: Setting the data phase to 24 for uplink 22 14:20:29:setup_element:INFO: Setting the data phase to 23 for uplink 23 14:20:29:setup_element:INFO: Setting the data phase to 35 for uplink 24 14:20:29:setup_element:INFO: Setting the data phase to 37 for uplink 25 14:20:29:setup_element:INFO: Setting the data phase to 37 for uplink 26 14:20:29:setup_element:INFO: Setting the data phase to 39 for uplink 27 14:20:29:setup_element:INFO: Setting the data phase to 1 for uplink 28 14:20:29:setup_element:INFO: Setting the data phase to 0 for uplink 29 14:20:29:setup_element:INFO: Setting the data phase to 5 for uplink 30 14:20:29:setup_element:INFO: Setting the data phase to 4 for uplink 31 ==============================================OOO============================================== 14:20:29:setup_element:INFO: Beginning SMX ASICs map scan 14:20:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:20:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:20:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:20:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:20:29:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 14:20:29:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 14:20:29:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 14:20:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 14:20:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 14:20:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 14:20:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 14:20:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 14:20:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 14:20:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 14:20:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 14:20:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 14:20:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 14:20:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 14:20:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 14:20:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 14:20:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 14:20:31:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 69 Eye Windows: Uplink 16: ______________________________________________________________________XXXXXXXXX_ Uplink 17: ______________________________________________________________________XXXXXXXXX_ Uplink 18: ______________________________________________________________________XXXXXXXXXX Uplink 19: ______________________________________________________________________XXXXXXXXXX Uplink 20: _____________________________________________________________________XXXXXXXX___ Uplink 21: _____________________________________________________________________XXXXXXXX___ Uplink 22: _______________________________________________________________________XXXXXXXX_ Uplink 23: _______________________________________________________________________XXXXXXXX_ Uplink 24: ______________________________________________________________________XXXXXXXX__ Uplink 25: ______________________________________________________________________XXXXXXXX__ Uplink 26: _____________________________________________________________________XXXXXXXXX__ Uplink 27: _____________________________________________________________________XXXXXXXXX__ Uplink 28: _____________________________________________________________________XXXXXXXXX__ Uplink 29: _____________________________________________________________________XXXXXXXXX__ Uplink 30: _______________________________________________________________________XXXXXXXX_ Uplink 31: _______________________________________________________________________XXXXXXXX_ Data phase characteristics: Uplink 16: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 17: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 18: Optimal Phase: 25 Window Length: 34 Eye Window: ___XXXXXX_______________________________ Uplink 19: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 20: Optimal Phase: 22 Window Length: 34 Eye Window: XXXXXX__________________________________ Uplink 21: Optimal Phase: 23 Window Length: 34 Eye Window: _XXXXXX_________________________________ Uplink 22: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 23: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ Uplink 24: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 25: Optimal Phase: 37 Window Length: 35 Eye Window: _______________XXXXX____________________ Uplink 26: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 27: Optimal Phase: 39 Window Length: 34 Eye Window: _________________XXXXXX_________________ Uplink 28: Optimal Phase: 1 Window Length: 35 Eye Window: ___________________XXXXX________________ Uplink 29: Optimal Phase: 0 Window Length: 35 Eye Window: __________________XXXXX_________________ Uplink 30: Optimal Phase: 5 Window Length: 34 Eye Window: _______________________XXXXXX___________ Uplink 31: Optimal Phase: 4 Window Length: 35 Eye Window: ______________________XXXXX_____________ ==============================================OOO============================================== 14:20:31:setup_element:INFO: Performing Elink synchronization 14:20:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:20:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:20:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:20:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 14:20:31:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 14:20:31:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 14:20:32:febtest:INFO: Init all SMX (CSA): 30 14:20:47:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:20:47:febtest:INFO: 23-00 | XA-000-09-004-013-016-007-04 | 34.6 | 1159.7 14:20:47:febtest:INFO: 30-01 | XA-000-09-004-009-017-008-02 | 44.1 | 1118.1 14:20:48:febtest:INFO: 21-02 | XA-000-09-004-013-016-006-04 | 40.9 | 1141.9 14:20:48:febtest:INFO: 28-03 | XA-000-09-004-013-017-009-09 | 34.6 | 1153.7 14:20:48:febtest:INFO: 19-04 | XA-000-09-004-013-017-008-09 | 44.1 | 1135.9 14:20:48:febtest:INFO: 26-05 | XA-000-09-004-013-018-009-07 | 37.7 | 1153.7 14:20:48:febtest:INFO: 17-06 | XA-000-09-004-013-016-008-04 | 37.7 | 1147.8 14:20:49:febtest:INFO: 24-07 | XA-000-09-004-013-016-010-04 | 44.1 | 1130.0 14:20:50:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 14:20:52:ST3_smx:INFO: chip: 23-0 34.556970 C 1171.483840 mV 14:20:52:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:20:52:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:20:52:ST3_smx:INFO: Electrons 14:20:52:ST3_smx:INFO: # loops 0 14:20:53:ST3_smx:INFO: # loops 1 14:20:55:ST3_smx:INFO: # loops 2 14:20:57:ST3_smx:INFO: Total # of broken channels: 0 14:20:57:ST3_smx:INFO: List of broken channels: [] 14:20:57:ST3_smx:INFO: Total # of broken channels: 3 14:20:57:ST3_smx:INFO: List of broken channels: [43, 61, 67] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:20:59:ST3_smx:INFO: chip: 30-1 44.073563 C 1129.995435 mV 14:20:59:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:20:59:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:20:59:ST3_smx:INFO: Electrons 14:20:59:ST3_smx:INFO: # loops 0 14:21:00:ST3_smx:INFO: # loops 1 14:21:02:ST3_smx:INFO: # loops 2 14:21:04:ST3_smx:INFO: Total # of broken channels: 4 14:21:04:ST3_smx:INFO: List of broken channels: [99, 113, 117, 123] 14:21:04:ST3_smx:INFO: Total # of broken channels: 11 14:21:04:ST3_smx:INFO: List of broken channels: [3, 15, 17, 19, 29, 37, 43, 99, 113, 117, 123] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:21:06:ST3_smx:INFO: chip: 21-2 40.898880 C 1153.732915 mV 14:21:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:21:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:21:06:ST3_smx:INFO: Electrons 14:21:06:ST3_smx:INFO: # loops 0 14:21:08:ST3_smx:INFO: # loops 1 14:21:09:ST3_smx:INFO: # loops 2 14:21:11:ST3_smx:INFO: Total # of broken channels: 0 14:21:11:ST3_smx:INFO: List of broken channels: [] 14:21:11:ST3_smx:INFO: Total # of broken channels: 1 14:21:11:ST3_smx:INFO: List of broken channels: [37] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:21:13:ST3_smx:INFO: chip: 28-3 34.556970 C 1171.483840 mV 14:21:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:21:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:21:13:ST3_smx:INFO: Electrons 14:21:13:ST3_smx:INFO: # loops 0 14:21:14:ST3_smx:INFO: # loops 1 14:21:16:ST3_smx:INFO: # loops 2 14:21:17:ST3_smx:INFO: Total # of broken channels: 0 14:21:17:ST3_smx:INFO: List of broken channels: [] 14:21:17:ST3_smx:INFO: Total # of broken channels: 0 14:21:17:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:21:19:ST3_smx:INFO: chip: 19-4 44.073563 C 1147.806000 mV 14:21:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:21:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:21:19:ST3_smx:INFO: Electrons 14:21:19:ST3_smx:INFO: # loops 0 14:21:21:ST3_smx:INFO: # loops 1 14:21:22:ST3_smx:INFO: # loops 2 14:21:24:ST3_smx:INFO: Total # of broken channels: 1 14:21:24:ST3_smx:INFO: List of broken channels: [78] 14:21:24:ST3_smx:INFO: Total # of broken channels: 0 14:21:24:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:21:25:ST3_smx:INFO: chip: 26-5 37.726682 C 1165.571835 mV 14:21:25:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:21:25:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:21:25:ST3_smx:INFO: Electrons 14:21:26:ST3_smx:INFO: # loops 0 14:21:27:ST3_smx:INFO: # loops 1 14:21:28:ST3_smx:INFO: # loops 2 14:21:30:ST3_smx:INFO: Total # of broken channels: 0 14:21:30:ST3_smx:INFO: List of broken channels: [] 14:21:30:ST3_smx:INFO: Total # of broken channels: 0 14:21:30:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:21:32:ST3_smx:INFO: chip: 17-6 40.898880 C 1159.654860 mV 14:21:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:21:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:21:32:ST3_smx:INFO: Electrons 14:21:32:ST3_smx:INFO: # loops 0 14:21:33:ST3_smx:INFO: # loops 1 14:21:35:ST3_smx:INFO: # loops 2 14:21:36:ST3_smx:INFO: Total # of broken channels: 0 14:21:36:ST3_smx:INFO: List of broken channels: [] 14:21:36:ST3_smx:INFO: Total # of broken channels: 0 14:21:36:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:21:38:ST3_smx:INFO: chip: 24-7 44.073563 C 1141.874115 mV 14:21:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:21:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:21:38:ST3_smx:INFO: Electrons 14:21:38:ST3_smx:INFO: # loops 0 14:21:40:ST3_smx:INFO: # loops 1 14:21:41:ST3_smx:INFO: # loops 2 14:21:43:ST3_smx:INFO: Total # of broken channels: 0 14:21:43:ST3_smx:INFO: List of broken channels: [] 14:21:43:ST3_smx:INFO: Total # of broken channels: 0 14:21:43:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 14:21:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:21:43:febtest:INFO: 23-00 | XA-000-09-004-013-016-007-04 | 34.6 | 1195.1 14:21:43:febtest:INFO: 30-01 | XA-000-09-004-009-017-008-02 | 47.3 | 1153.7 14:21:44:febtest:INFO: 21-02 | XA-000-09-004-013-016-006-04 | 40.9 | 1177.4 14:21:44:febtest:INFO: 28-03 | XA-000-09-004-013-017-009-09 | 34.6 | 1189.2 14:21:44:febtest:INFO: 19-04 | XA-000-09-004-013-017-008-09 | 44.1 | 1165.6 14:21:44:febtest:INFO: 26-05 | XA-000-09-004-013-018-009-07 | 37.7 | 1183.3 14:21:45:febtest:INFO: 17-06 | XA-000-09-004-013-016-008-04 | 40.9 | 1183.3 14:21:45:febtest:INFO: 24-07 | XA-000-09-004-013-016-010-04 | 44.1 | 1165.6 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_02_27-14_20_21 OPERATOR : Robert V.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2354| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.3320', '1.847', '2.7160'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9860', '1.850', '2.5740'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9690', '1.850', '0.5258']