13:46:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:46:39:ST3_Shared:INFO:	                       FEB-Microcable                       
13:46:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:46:39:febtest:INFO:	Testing FEB with SN 2357
13:46:41:smx_tester:INFO:	Scanning setup
13:46:41:elinks:INFO:	Disabling clock on downlink 0
13:46:41:elinks:INFO:	Disabling clock on downlink 1
13:46:41:elinks:INFO:	Disabling clock on downlink 2
13:46:41:elinks:INFO:	Disabling clock on downlink 3
13:46:41:elinks:INFO:	Disabling clock on downlink 4
13:46:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:46:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:46:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:46:41:elinks:INFO:	Disabling clock on downlink 0
13:46:41:elinks:INFO:	Disabling clock on downlink 1
13:46:41:elinks:INFO:	Disabling clock on downlink 2
13:46:41:elinks:INFO:	Disabling clock on downlink 3
13:46:41:elinks:INFO:	Disabling clock on downlink 4
13:46:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:46:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:46:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:46:41:elinks:INFO:	Disabling clock on downlink 0
13:46:41:elinks:INFO:	Disabling clock on downlink 1
13:46:41:elinks:INFO:	Disabling clock on downlink 2
13:46:41:elinks:INFO:	Disabling clock on downlink 3
13:46:41:elinks:INFO:	Disabling clock on downlink 4
13:46:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:46:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:46:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:46:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:46:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:46:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:46:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:46:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:46:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:46:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:46:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:46:41:elinks:INFO:	Disabling clock on downlink 0
13:46:41:elinks:INFO:	Disabling clock on downlink 1
13:46:41:elinks:INFO:	Disabling clock on downlink 2
13:46:41:elinks:INFO:	Disabling clock on downlink 3
13:46:41:elinks:INFO:	Disabling clock on downlink 4
13:46:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:46:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:46:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:46:41:elinks:INFO:	Disabling clock on downlink 0
13:46:41:elinks:INFO:	Disabling clock on downlink 1
13:46:41:elinks:INFO:	Disabling clock on downlink 2
13:46:41:elinks:INFO:	Disabling clock on downlink 3
13:46:41:elinks:INFO:	Disabling clock on downlink 4
13:46:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:46:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:46:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:46:42:setup_element:INFO:	Scanning clock phase
13:46:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:46:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:46:42:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:46:42:setup_element:INFO:	Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:46:42:setup_element:INFO:	Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:46:42:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:46:42:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:46:42:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:46:42:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:46:42:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:46:42:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:46:42:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 2
==============================================OOO==============================================
13:46:42:setup_element:INFO:	Scanning data phases
13:46:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:46:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:46:47:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:46:47:setup_element:INFO:	Eye window for uplink 24: _______________XXXXXXX__________________
Data delay found: 38
13:46:47:setup_element:INFO:	Eye window for uplink 25: _________________XXXXXX_________________
Data delay found: 39
13:46:47:setup_element:INFO:	Eye window for uplink 26: __________________XXXXX_________________
Data delay found: 0
13:46:47:setup_element:INFO:	Eye window for uplink 27: ____________________XXXXX_______________
Data delay found: 2
13:46:47:setup_element:INFO:	Eye window for uplink 28: _____________________XXXXXX_____________
Data delay found: 3
13:46:47:setup_element:INFO:	Eye window for uplink 29: _____________________XXXXX______________
Data delay found: 3
13:46:47:setup_element:INFO:	Eye window for uplink 30: ____________________XXXXXX______________
Data delay found: 2
13:46:47:setup_element:INFO:	Eye window for uplink 31: __________________XXXXXX________________
Data delay found: 0
13:46:47:setup_element:INFO:	Setting the data phase to 38 for uplink 24
13:46:47:setup_element:INFO:	Setting the data phase to 39 for uplink 25
13:46:47:setup_element:INFO:	Setting the data phase to 0 for uplink 26
13:46:47:setup_element:INFO:	Setting the data phase to 2 for uplink 27
13:46:47:setup_element:INFO:	Setting the data phase to 3 for uplink 28
13:46:47:setup_element:INFO:	Setting the data phase to 3 for uplink 29
13:46:47:setup_element:INFO:	Setting the data phase to 2 for uplink 30
13:46:47:setup_element:INFO:	Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
13:46:47:setup_element:INFO:	Beginning SMX ASICs map scan
13:46:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:46:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:46:47:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:46:47:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:46:47:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:46:47:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:46:47:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:46:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:46:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:46:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:46:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:46:48:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:46:48:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:46:50:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 70
    Eye Windows:
      Uplink 24: _____________________________________________________________________XXXXXXXX___
      Uplink 25: _____________________________________________________________________XXXXXXXX___
      Uplink 26: _____________________________________________________________________XXXXXXXX___
      Uplink 27: _____________________________________________________________________XXXXXXXX___
      Uplink 28: ____________________________________________________________________XXXXXXXXX___
      Uplink 29: ____________________________________________________________________XXXXXXXXX___
      Uplink 30: ___________________________________________________________________XXXXXXXXX____
      Uplink 31: ___________________________________________________________________XXXXXXXXX____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 38
      Window Length: 33
      Eye Window: _______________XXXXXXX__________________
    Uplink 25:
      Optimal Phase: 39
      Window Length: 34
      Eye Window: _________________XXXXXX_________________
    Uplink 26:
      Optimal Phase: 0
      Window Length: 35
      Eye Window: __________________XXXXX_________________
    Uplink 27:
      Optimal Phase: 2
      Window Length: 35
      Eye Window: ____________________XXXXX_______________
    Uplink 28:
      Optimal Phase: 3
      Window Length: 34
      Eye Window: _____________________XXXXXX_____________
    Uplink 29:
      Optimal Phase: 3
      Window Length: 35
      Eye Window: _____________________XXXXX______________
    Uplink 30:
      Optimal Phase: 2
      Window Length: 34
      Eye Window: ____________________XXXXXX______________
    Uplink 31:
      Optimal Phase: 0
      Window Length: 34
      Eye Window: __________________XXXXXX________________

==============================================OOO==============================================
13:46:50:setup_element:INFO:	Performing Elink synchronization
13:46:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:46:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:46:50:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:46:50:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
13:46:50:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:46:50:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:46:50:febtest:INFO:	Init all SMX (CSA): 30
13:46:58:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:46:58:febtest:INFO:	30-01 | XA-000-09-004-010-007-003-10 |  12.4 | 1195.1
13:46:58:febtest:INFO:	28-03 | XA-000-09-004-010-007-004-10 |  21.9 | 1159.7
13:46:59:febtest:INFO:	26-05 | XA-000-09-004-010-010-004-13 |  25.1 | 1153.7
13:46:59:febtest:INFO:	24-07 | XA-000-09-004-010-010-002-13 |  28.2 | 1147.8
13:47:00:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:47:02:ST3_smx:INFO:	chip: 30-1 	 9.288730 C 	 1206.851500 mV
13:47:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:47:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:47:02:ST3_smx:INFO:		Electrons
13:47:02:ST3_smx:INFO:	# loops 0
13:47:03:ST3_smx:INFO:	# loops 1
13:47:05:ST3_smx:INFO:	# loops 2
13:47:07:ST3_smx:INFO:	Total # of broken channels: 0
13:47:07:ST3_smx:INFO:	List of broken channels: []
13:47:07:ST3_smx:INFO:	Total # of broken channels: 0
13:47:07:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:47:09:ST3_smx:INFO:	chip: 28-3 	 21.902970 C 	 1171.483840 mV
13:47:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:47:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:47:09:ST3_smx:INFO:		Electrons
13:47:09:ST3_smx:INFO:	# loops 0
13:47:11:ST3_smx:INFO:	# loops 1
13:47:12:ST3_smx:INFO:	# loops 2
13:47:14:ST3_smx:INFO:	Total # of broken channels: 0
13:47:14:ST3_smx:INFO:	List of broken channels: []
13:47:14:ST3_smx:INFO:	Total # of broken channels: 0
13:47:14:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:47:16:ST3_smx:INFO:	chip: 26-5 	 25.062742 C 	 1165.571835 mV
13:47:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:47:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:47:16:ST3_smx:INFO:		Electrons
13:47:16:ST3_smx:INFO:	# loops 0
13:47:17:ST3_smx:INFO:	# loops 1
13:47:19:ST3_smx:INFO:	# loops 2
13:47:21:ST3_smx:INFO:	Total # of broken channels: 0
13:47:21:ST3_smx:INFO:	List of broken channels: []
13:47:21:ST3_smx:INFO:	Total # of broken channels: 0
13:47:21:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:47:23:ST3_smx:INFO:	chip: 24-7 	 28.225000 C 	 1153.732915 mV
13:47:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:47:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:47:23:ST3_smx:INFO:		Electrons
13:47:23:ST3_smx:INFO:	# loops 0
13:47:24:ST3_smx:INFO:	# loops 1
13:47:26:ST3_smx:INFO:	# loops 2
13:47:28:ST3_smx:INFO:	Total # of broken channels: 0
13:47:28:ST3_smx:INFO:	List of broken channels: []
13:47:28:ST3_smx:INFO:	Total # of broken channels: 0
13:47:28:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:47:28:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:47:28:febtest:INFO:	30-01 | XA-000-09-004-010-007-003-10 |  12.4 | 1230.3
13:47:29:febtest:INFO:	28-03 | XA-000-09-004-010-007-004-10 |  21.9 | 1189.2
13:47:29:febtest:INFO:	26-05 | XA-000-09-004-010-010-004-13 |  25.1 | 1189.2
13:47:29:febtest:INFO:	24-07 | XA-000-09-004-010-010-002-13 |  28.2 | 1171.5
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_10-13_46_39
OPERATOR  : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2357| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7210', '1.848', '1.2050']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0120', '1.850', '1.2930']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9885', '1.850', '0.2619']
13:47:32:ST3_Shared:INFO:	Listo of operators:Robert V.;