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FEB_2358 12.03.25 07:52:20
Info
07:52:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:52:20:ST3_Shared:INFO: FEB-Microcable
07:52:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:52:20:febtest:INFO: Testing FEB with SN 2358
==============================================OOO==============================================
07:52:22:smx_tester:INFO: Scanning setup
07:52:22:elinks:INFO: Disabling clock on downlink 0
07:52:22:elinks:INFO: Disabling clock on downlink 1
07:52:22:elinks:INFO: Disabling clock on downlink 2
07:52:22:elinks:INFO: Disabling clock on downlink 3
07:52:22:elinks:INFO: Disabling clock on downlink 4
07:52:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:52:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:52:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:52:22:elinks:INFO: Disabling clock on downlink 0
07:52:22:elinks:INFO: Disabling clock on downlink 1
07:52:22:elinks:INFO: Disabling clock on downlink 2
07:52:22:elinks:INFO: Disabling clock on downlink 3
07:52:22:elinks:INFO: Disabling clock on downlink 4
07:52:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:52:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:52:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:52:22:elinks:INFO: Disabling clock on downlink 0
07:52:22:elinks:INFO: Disabling clock on downlink 1
07:52:22:elinks:INFO: Disabling clock on downlink 2
07:52:22:elinks:INFO: Disabling clock on downlink 3
07:52:22:elinks:INFO: Disabling clock on downlink 4
07:52:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:52:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
07:52:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
07:52:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:52:22:elinks:INFO: Disabling clock on downlink 0
07:52:22:elinks:INFO: Disabling clock on downlink 1
07:52:22:elinks:INFO: Disabling clock on downlink 2
07:52:22:elinks:INFO: Disabling clock on downlink 3
07:52:22:elinks:INFO: Disabling clock on downlink 4
07:52:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:52:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:52:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:52:23:elinks:INFO: Disabling clock on downlink 0
07:52:23:elinks:INFO: Disabling clock on downlink 1
07:52:23:elinks:INFO: Disabling clock on downlink 2
07:52:23:elinks:INFO: Disabling clock on downlink 3
07:52:23:elinks:INFO: Disabling clock on downlink 4
07:52:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:52:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:52:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
07:52:23:setup_element:INFO: Scanning clock phase
07:52:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:52:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:52:23:setup_element:INFO: Clock phase scan results for group 0, downlink 2
07:52:23:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:52:23:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:52:23:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:52:23:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:52:23:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
07:52:23:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
07:52:23:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:52:23:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:52:23:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:52:23:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:52:23:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:52:23:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:52:23:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:52:23:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:52:23:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:52:23:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:52:23:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
07:52:23:setup_element:INFO: Scanning data phases
07:52:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:52:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:52:28:setup_element:INFO: Data phase scan results for group 0, downlink 2
07:52:28:setup_element:INFO: Eye window for uplink 16: _XXXXX__________________________________
Data delay found: 23
07:52:28:setup_element:INFO: Eye window for uplink 17: XXXX__________________________________XX
Data delay found: 20
07:52:28:setup_element:INFO: Eye window for uplink 18: __XXXXXX________________________________
Data delay found: 24
07:52:28:setup_element:INFO: Eye window for uplink 19: ___XXXXXX_______________________________
Data delay found: 25
07:52:28:setup_element:INFO: Eye window for uplink 20: __XXXXXX________________________________
Data delay found: 24
07:52:28:setup_element:INFO: Eye window for uplink 21: ___XXXXXX_______________________________
Data delay found: 25
07:52:28:setup_element:INFO: Eye window for uplink 22: _XXXXXX_________________________________
Data delay found: 23
07:52:28:setup_element:INFO: Eye window for uplink 23: XXXXX__________________________________X
Data delay found: 21
07:52:28:setup_element:INFO: Eye window for uplink 24: ______________XXXXXX____________________
Data delay found: 36
07:52:28:setup_element:INFO: Eye window for uplink 25: ________________XXXXX___________________
Data delay found: 38
07:52:28:setup_element:INFO: Eye window for uplink 26: ________________XXXXXX__________________
Data delay found: 38
07:52:28:setup_element:INFO: Eye window for uplink 27: __________________XXXXXX________________
Data delay found: 0
07:52:28:setup_element:INFO: Eye window for uplink 28: _________________XXXXXXX________________
Data delay found: 0
07:52:28:setup_element:INFO: Eye window for uplink 29: ________________XXXXXXX_________________
Data delay found: 39
07:52:28:setup_element:INFO: Eye window for uplink 30: ______________________XXXXXX____________
Data delay found: 4
07:52:28:setup_element:INFO: Eye window for uplink 31: _____________________XXXXX______________
Data delay found: 3
07:52:28:setup_element:INFO: Setting the data phase to 23 for uplink 16
07:52:28:setup_element:INFO: Setting the data phase to 20 for uplink 17
07:52:28:setup_element:INFO: Setting the data phase to 24 for uplink 18
07:52:28:setup_element:INFO: Setting the data phase to 25 for uplink 19
07:52:28:setup_element:INFO: Setting the data phase to 24 for uplink 20
07:52:28:setup_element:INFO: Setting the data phase to 25 for uplink 21
07:52:28:setup_element:INFO: Setting the data phase to 23 for uplink 22
07:52:28:setup_element:INFO: Setting the data phase to 21 for uplink 23
07:52:28:setup_element:INFO: Setting the data phase to 36 for uplink 24
07:52:28:setup_element:INFO: Setting the data phase to 38 for uplink 25
07:52:28:setup_element:INFO: Setting the data phase to 38 for uplink 26
07:52:28:setup_element:INFO: Setting the data phase to 0 for uplink 27
07:52:28:setup_element:INFO: Setting the data phase to 0 for uplink 28
07:52:28:setup_element:INFO: Setting the data phase to 39 for uplink 29
07:52:28:setup_element:INFO: Setting the data phase to 4 for uplink 30
07:52:28:setup_element:INFO: Setting the data phase to 3 for uplink 31
==============================================OOO==============================================
07:52:28:setup_element:INFO: Beginning SMX ASICs map scan
07:52:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:52:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:52:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:52:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:52:28:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:52:29:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
07:52:29:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
07:52:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:52:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:52:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
07:52:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
07:52:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:52:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:52:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
07:52:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
07:52:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:52:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:52:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
07:52:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
07:52:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:52:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:52:31:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXX___
Uplink 17: _____________________________________________________________________XXXXXXXX___
Uplink 18: ______________________________________________________________________XXXXXXXX__
Uplink 19: ______________________________________________________________________XXXXXXXX__
Uplink 20: ____________________________________________________________________XXXXXXXXX___
Uplink 21: ____________________________________________________________________XXXXXXXXX___
Uplink 22: _____________________________________________________________________XXXXXXXX___
Uplink 23: _____________________________________________________________________XXXXXXXX___
Uplink 24: _____________________________________________________________________XXXXXXXXX__
Uplink 25: _____________________________________________________________________XXXXXXXXX__
Uplink 26: _____________________________________________________________________XXXXXXXXX__
Uplink 27: _____________________________________________________________________XXXXXXXXX__
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 17:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 18:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 19:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 20:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 21:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 22:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 23:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 24:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 25:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 26:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 27:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 28:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
Uplink 29:
Optimal Phase: 39
Window Length: 33
Eye Window: ________________XXXXXXX_________________
Uplink 30:
Optimal Phase: 4
Window Length: 34
Eye Window: ______________________XXXXXX____________
Uplink 31:
Optimal Phase: 3
Window Length: 35
Eye Window: _____________________XXXXX______________
==============================================OOO==============================================
07:52:31:setup_element:INFO: Performing Elink synchronization
07:52:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:52:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:52:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:52:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
07:52:31:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
07:52:31:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
07:52:32:febtest:INFO: Init all SMX (CSA): 30
07:52:46:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:52:46:febtest:INFO: 23-00 | XA-000-09-004-009-016-006-15 | 34.6 | 1141.9
07:52:46:febtest:INFO: 30-01 | XA-000-09-004-009-014-011-10 | 31.4 | 1153.7
07:52:47:febtest:INFO: 21-02 | XA-000-09-004-009-014-007-10 | 34.6 | 1147.8
07:52:47:febtest:INFO: 28-03 | XA-000-09-004-009-015-012-07 | 31.4 | 1147.8
07:52:47:febtest:INFO: 19-04 | XA-000-09-004-009-015-007-07 | 34.6 | 1153.7
07:52:47:febtest:INFO: 26-05 | XA-000-09-004-009-015-010-07 | 31.4 | 1147.8
07:52:48:febtest:INFO: 17-06 | XA-000-09-004-009-015-009-07 | 18.7 | 1206.9
07:52:48:febtest:INFO: 24-07 | XA-000-09-004-009-015-008-07 | 21.9 | 1195.1
07:52:49:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:52:51:ST3_smx:INFO: chip: 23-0 34.556970 C 1147.806000 mV
07:52:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:51:ST3_smx:INFO: Electrons
07:52:51:ST3_smx:INFO: # loops 0
07:52:53:ST3_smx:INFO: # loops 1
07:52:54:ST3_smx:INFO: # loops 2
07:52:56:ST3_smx:INFO: Total # of broken channels: 0
07:52:56:ST3_smx:INFO: List of broken channels: []
07:52:56:ST3_smx:INFO: Total # of broken channels: 0
07:52:56:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:52:58:ST3_smx:INFO: chip: 30-1 31.389742 C 1165.571835 mV
07:52:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:58:ST3_smx:INFO: Electrons
07:52:58:ST3_smx:INFO: # loops 0
07:52:59:ST3_smx:INFO: # loops 1
07:53:01:ST3_smx:INFO: # loops 2
07:53:02:ST3_smx:INFO: Total # of broken channels: 0
07:53:02:ST3_smx:INFO: List of broken channels: []
07:53:02:ST3_smx:INFO: Total # of broken channels: 1
07:53:02:ST3_smx:INFO: List of broken channels: [124]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:53:04:ST3_smx:INFO: chip: 21-2 34.556970 C 1153.732915 mV
07:53:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:53:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:53:04:ST3_smx:INFO: Electrons
07:53:04:ST3_smx:INFO: # loops 0
07:53:06:ST3_smx:INFO: # loops 1
07:53:08:ST3_smx:INFO: # loops 2
07:53:09:ST3_smx:INFO: Total # of broken channels: 0
07:53:09:ST3_smx:INFO: List of broken channels: []
07:53:09:ST3_smx:INFO: Total # of broken channels: 0
07:53:09:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:53:11:ST3_smx:INFO: chip: 28-3 31.389742 C 1165.571835 mV
07:53:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:53:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:53:11:ST3_smx:INFO: Electrons
07:53:11:ST3_smx:INFO: # loops 0
07:53:13:ST3_smx:INFO: # loops 1
07:53:14:ST3_smx:INFO: # loops 2
07:53:16:ST3_smx:INFO: Total # of broken channels: 0
07:53:16:ST3_smx:INFO: List of broken channels: []
07:53:16:ST3_smx:INFO: Total # of broken channels: 0
07:53:16:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:53:17:ST3_smx:INFO: chip: 19-4 34.556970 C 1159.654860 mV
07:53:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:53:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:53:18:ST3_smx:INFO: Electrons
07:53:18:ST3_smx:INFO: # loops 0
07:53:19:ST3_smx:INFO: # loops 1
07:53:21:ST3_smx:INFO: # loops 2
07:53:22:ST3_smx:INFO: Total # of broken channels: 0
07:53:22:ST3_smx:INFO: List of broken channels: []
07:53:22:ST3_smx:INFO: Total # of broken channels: 0
07:53:22:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:53:24:ST3_smx:INFO: chip: 26-5 34.556970 C 1159.654860 mV
07:53:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:53:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:53:24:ST3_smx:INFO: Electrons
07:53:24:ST3_smx:INFO: # loops 0
07:53:26:ST3_smx:INFO: # loops 1
07:53:27:ST3_smx:INFO: # loops 2
07:53:29:ST3_smx:INFO: Total # of broken channels: 0
07:53:29:ST3_smx:INFO: List of broken channels: []
07:53:29:ST3_smx:INFO: Total # of broken channels: 0
07:53:29:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:53:31:ST3_smx:INFO: chip: 17-6 18.745682 C 1218.600960 mV
07:53:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:53:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:53:31:ST3_smx:INFO: Electrons
07:53:31:ST3_smx:INFO: # loops 0
07:53:32:ST3_smx:INFO: # loops 1
07:53:34:ST3_smx:INFO: # loops 2
07:53:35:ST3_smx:INFO: Total # of broken channels: 1
07:53:35:ST3_smx:INFO: List of broken channels: [95]
07:53:35:ST3_smx:INFO: Total # of broken channels: 0
07:53:35:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:53:37:ST3_smx:INFO: chip: 24-7 21.902970 C 1200.969315 mV
07:53:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:53:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:53:37:ST3_smx:INFO: Electrons
07:53:37:ST3_smx:INFO: # loops 0
07:53:39:ST3_smx:INFO: # loops 1
07:53:40:ST3_smx:INFO: # loops 2
07:53:42:ST3_smx:INFO: Total # of broken channels: 0
07:53:42:ST3_smx:INFO: List of broken channels: []
07:53:42:ST3_smx:INFO: Total # of broken channels: 0
07:53:42:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
07:53:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:53:42:febtest:INFO: 23-00 | XA-000-09-004-009-016-006-15 | 37.7 | 1171.5
07:53:43:febtest:INFO: 30-01 | XA-000-09-004-009-014-011-10 | 31.4 | 1189.2
07:53:43:febtest:INFO: 21-02 | XA-000-09-004-009-014-007-10 | 34.6 | 1177.4
07:53:43:febtest:INFO: 28-03 | XA-000-09-004-009-015-012-07 | 31.4 | 1189.2
07:53:43:febtest:INFO: 19-04 | XA-000-09-004-009-015-007-07 | 34.6 | 1177.4
07:53:44:febtest:INFO: 26-05 | XA-000-09-004-009-015-010-07 | 34.6 | 1177.4
07:53:44:febtest:INFO: 17-06 | XA-000-09-004-009-015-009-07 | 21.9 | 1236.2
07:53:44:febtest:INFO: 24-07 | XA-000-09-004-009-015-008-07 | 25.1 | 1224.5
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_12-07_52_20
OPERATOR : Robert V.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2358| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.7770', '1.851', '2.5080']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0400', '1.850', '2.6100']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9770', '1.850', '0.5270']