
FEB_2361 28.03.25 12:49:51
TextEdit.txt
12:49:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:49:51:ST3_Shared:INFO: FEB-Microcable 12:49:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:49:51:febtest:INFO: Testing FEB with SN 2361 ==============================================OOO============================================== 12:49:53:smx_tester:INFO: Scanning setup 12:49:53:elinks:INFO: Disabling clock on downlink 0 12:49:53:elinks:INFO: Disabling clock on downlink 1 12:49:53:elinks:INFO: Disabling clock on downlink 2 12:49:53:elinks:INFO: Disabling clock on downlink 3 12:49:53:elinks:INFO: Disabling clock on downlink 4 12:49:53:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:49:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:53:elinks:INFO: Disabling clock on downlink 0 12:49:53:elinks:INFO: Disabling clock on downlink 1 12:49:53:elinks:INFO: Disabling clock on downlink 2 12:49:53:elinks:INFO: Disabling clock on downlink 3 12:49:53:elinks:INFO: Disabling clock on downlink 4 12:49:53:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:49:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:53:elinks:INFO: Disabling clock on downlink 0 12:49:53:elinks:INFO: Disabling clock on downlink 1 12:49:53:elinks:INFO: Disabling clock on downlink 2 12:49:53:elinks:INFO: Disabling clock on downlink 3 12:49:53:elinks:INFO: Disabling clock on downlink 4 12:49:53:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 12:49:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 12:49:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:53:elinks:INFO: Disabling clock on downlink 0 12:49:53:elinks:INFO: Disabling clock on downlink 1 12:49:53:elinks:INFO: Disabling clock on downlink 2 12:49:53:elinks:INFO: Disabling clock on downlink 3 12:49:53:elinks:INFO: Disabling clock on downlink 4 12:49:53:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 12:49:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:53:elinks:INFO: Disabling clock on downlink 0 12:49:53:elinks:INFO: Disabling clock on downlink 1 12:49:53:elinks:INFO: Disabling clock on downlink 2 12:49:53:elinks:INFO: Disabling clock on downlink 3 12:49:53:elinks:INFO: Disabling clock on downlink 4 12:49:53:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 12:49:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 12:49:53:setup_element:INFO: Scanning clock phase 12:49:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:49:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:49:54:setup_element:INFO: Clock phase scan results for group 0, downlink 2 12:49:54:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 12:49:54:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 12:49:54:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 12:49:54:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 12:49:54:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 12:49:54:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 12:49:54:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXXX__ Clock Delay: 32 12:49:54:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXXX__ Clock Delay: 32 12:49:54:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 12:49:54:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 12:49:54:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:49:54:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:49:54:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 12:49:54:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 12:49:54:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 12:49:54:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 12:49:54:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2 ==============================================OOO============================================== 12:49:54:setup_element:INFO: Scanning data phases 12:49:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:49:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:49:59:setup_element:INFO: Data phase scan results for group 0, downlink 2 12:49:59:setup_element:INFO: Eye window for uplink 16: ____XXXX________________________________ Data delay found: 25 12:49:59:setup_element:INFO: Eye window for uplink 17: __XXXX__________________________________ Data delay found: 23 12:49:59:setup_element:INFO: Eye window for uplink 18: __XXXXXX________________________________ Data delay found: 24 12:49:59:setup_element:INFO: Eye window for uplink 19: ___XXXXX________________________________ Data delay found: 25 12:49:59:setup_element:INFO: Eye window for uplink 20: XXXXX___________________________________ Data delay found: 22 12:49:59:setup_element:INFO: Eye window for uplink 21: _XXXXX__________________________________ Data delay found: 23 12:49:59:setup_element:INFO: Eye window for uplink 22: __XXXXX_________________________________ Data delay found: 24 12:49:59:setup_element:INFO: Eye window for uplink 23: _XXXX___________________________________ Data delay found: 22 12:49:59:setup_element:INFO: Eye window for uplink 24: _____________XXXXXX_____________________ Data delay found: 35 12:49:59:setup_element:INFO: Eye window for uplink 25: _______________XXXXXX___________________ Data delay found: 37 12:49:59:setup_element:INFO: Eye window for uplink 26: ________________XXXXXX__________________ Data delay found: 38 12:49:59:setup_element:INFO: Eye window for uplink 27: __________________XXXXXX________________ Data delay found: 0 12:49:59:setup_element:INFO: Eye window for uplink 28: __________________XXXXX_________________ Data delay found: 0 12:49:59:setup_element:INFO: Eye window for uplink 29: __________________XXXXX_________________ Data delay found: 0 12:49:59:setup_element:INFO: Eye window for uplink 30: ____________________XXXXXX______________ Data delay found: 2 12:49:59:setup_element:INFO: Eye window for uplink 31: __________________XXXXXX________________ Data delay found: 0 12:49:59:setup_element:INFO: Setting the data phase to 25 for uplink 16 12:49:59:setup_element:INFO: Setting the data phase to 23 for uplink 17 12:49:59:setup_element:INFO: Setting the data phase to 24 for uplink 18 12:49:59:setup_element:INFO: Setting the data phase to 25 for uplink 19 12:49:59:setup_element:INFO: Setting the data phase to 22 for uplink 20 12:49:59:setup_element:INFO: Setting the data phase to 23 for uplink 21 12:49:59:setup_element:INFO: Setting the data phase to 24 for uplink 22 12:49:59:setup_element:INFO: Setting the data phase to 22 for uplink 23 12:49:59:setup_element:INFO: Setting the data phase to 35 for uplink 24 12:49:59:setup_element:INFO: Setting the data phase to 37 for uplink 25 12:49:59:setup_element:INFO: Setting the data phase to 38 for uplink 26 12:49:59:setup_element:INFO: Setting the data phase to 0 for uplink 27 12:49:59:setup_element:INFO: Setting the data phase to 0 for uplink 28 12:49:59:setup_element:INFO: Setting the data phase to 0 for uplink 29 12:49:59:setup_element:INFO: Setting the data phase to 2 for uplink 30 12:49:59:setup_element:INFO: Setting the data phase to 0 for uplink 31 ==============================================OOO============================================== 12:49:59:setup_element:INFO: Beginning SMX ASICs map scan 12:49:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:50:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:50:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:50:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 12:50:00:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 12:50:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 12:50:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 12:50:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 12:50:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 12:50:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 12:50:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 12:50:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 12:50:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 12:50:00:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 12:50:00:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 12:50:00:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 12:50:00:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 12:50:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 12:50:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 12:50:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 12:50:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 12:50:02:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 32 Window Length: 70 Eye Windows: Uplink 16: _____________________________________________________________________XXXXXXXXX__ Uplink 17: _____________________________________________________________________XXXXXXXXX__ Uplink 18: _____________________________________________________________________XXXXXXXXX__ Uplink 19: _____________________________________________________________________XXXXXXXXX__ Uplink 20: ____________________________________________________________________XXXXXXXX____ Uplink 21: ____________________________________________________________________XXXXXXXX____ Uplink 22: ____________________________________________________________________XXXXXXXXXX__ Uplink 23: ____________________________________________________________________XXXXXXXXXX__ Uplink 24: _____________________________________________________________________XXXXXXXXX__ Uplink 25: _____________________________________________________________________XXXXXXXXX__ Uplink 26: _____________________________________________________________________XXXXXXXX___ Uplink 27: _____________________________________________________________________XXXXXXXX___ Uplink 28: ____________________________________________________________________XXXXXXXXX___ Uplink 29: ____________________________________________________________________XXXXXXXXX___ Uplink 30: ______________________________________________________________________XXXXXXX___ Uplink 31: ______________________________________________________________________XXXXXXX___ Data phase characteristics: Uplink 16: Optimal Phase: 25 Window Length: 36 Eye Window: ____XXXX________________________________ Uplink 17: Optimal Phase: 23 Window Length: 36 Eye Window: __XXXX__________________________________ Uplink 18: Optimal Phase: 24 Window Length: 34 Eye Window: __XXXXXX________________________________ Uplink 19: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 20: Optimal Phase: 22 Window Length: 35 Eye Window: XXXXX___________________________________ Uplink 21: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ Uplink 22: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 23: Optimal Phase: 22 Window Length: 36 Eye Window: _XXXX___________________________________ Uplink 24: Optimal Phase: 35 Window Length: 34 Eye Window: _____________XXXXXX_____________________ Uplink 25: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 26: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 27: Optimal Phase: 0 Window Length: 34 Eye Window: __________________XXXXXX________________ Uplink 28: Optimal Phase: 0 Window Length: 35 Eye Window: __________________XXXXX_________________ Uplink 29: Optimal Phase: 0 Window Length: 35 Eye Window: __________________XXXXX_________________ Uplink 30: Optimal Phase: 2 Window Length: 34 Eye Window: ____________________XXXXXX______________ Uplink 31: Optimal Phase: 0 Window Length: 34 Eye Window: __________________XXXXXX________________ ==============================================OOO============================================== 12:50:02:setup_element:INFO: Performing Elink synchronization 12:50:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:50:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:50:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:50:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 12:50:02:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 12:50:02:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 12:50:03:febtest:INFO: Init all SMX (CSA): 30 12:50:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:50:18:febtest:INFO: 23-00 | XA-000-09-004-013-010-010-07 | 44.1 | 1130.0 12:50:18:febtest:INFO: 30-01 | XA-000-09-004-013-009-012-09 | 44.1 | 1130.0 12:50:18:febtest:INFO: 21-02 | XA-000-09-004-013-010-012-07 | 40.9 | 1135.9 12:50:19:febtest:INFO: 28-03 | XA-000-09-004-013-011-012-10 | 40.9 | 1147.8 12:50:19:febtest:INFO: 19-04 | XA-000-09-004-013-012-017-05 | 47.3 | 1118.1 12:50:19:febtest:INFO: 26-05 | XA-000-09-004-013-009-013-09 | 40.9 | 1147.8 12:50:19:febtest:INFO: 17-06 | XA-000-09-004-013-010-014-07 | 44.1 | 1147.8 12:50:19:febtest:INFO: 24-07 | XA-000-09-004-013-012-011-02 | 40.9 | 1147.8 12:50:20:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 12:50:23:ST3_smx:INFO: chip: 23-0 44.073563 C 1147.806000 mV 12:50:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:23:ST3_smx:INFO: Electrons 12:50:23:ST3_smx:INFO: # loops 0 12:50:24:ST3_smx:INFO: # loops 1 12:50:26:ST3_smx:INFO: # loops 2 12:50:28:ST3_smx:INFO: Total # of broken channels: 0 12:50:28:ST3_smx:INFO: List of broken channels: [] 12:50:28:ST3_smx:INFO: Total # of broken channels: 0 12:50:28:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:50:30:ST3_smx:INFO: chip: 30-1 44.073563 C 1141.874115 mV 12:50:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:30:ST3_smx:INFO: Electrons 12:50:30:ST3_smx:INFO: # loops 0 12:50:31:ST3_smx:INFO: # loops 1 12:50:33:ST3_smx:INFO: # loops 2 12:50:35:ST3_smx:INFO: Total # of broken channels: 0 12:50:35:ST3_smx:INFO: List of broken channels: [] 12:50:35:ST3_smx:INFO: Total # of broken channels: 0 12:50:35:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:50:37:ST3_smx:INFO: chip: 21-2 40.898880 C 1147.806000 mV 12:50:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:37:ST3_smx:INFO: Electrons 12:50:37:ST3_smx:INFO: # loops 0 12:50:38:ST3_smx:INFO: # loops 1 12:50:40:ST3_smx:INFO: # loops 2 12:50:42:ST3_smx:INFO: Total # of broken channels: 0 12:50:42:ST3_smx:INFO: List of broken channels: [] 12:50:42:ST3_smx:INFO: Total # of broken channels: 0 12:50:42:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:50:44:ST3_smx:INFO: chip: 28-3 40.898880 C 1159.654860 mV 12:50:44:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:44:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:44:ST3_smx:INFO: Electrons 12:50:44:ST3_smx:INFO: # loops 0 12:50:45:ST3_smx:INFO: # loops 1 12:50:47:ST3_smx:INFO: # loops 2 12:50:49:ST3_smx:INFO: Total # of broken channels: 0 12:50:49:ST3_smx:INFO: List of broken channels: [] 12:50:49:ST3_smx:INFO: Total # of broken channels: 0 12:50:49:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:50:51:ST3_smx:INFO: chip: 19-4 50.430383 C 1124.048640 mV 12:50:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:51:ST3_smx:INFO: Electrons 12:50:51:ST3_smx:INFO: # loops 0 12:50:52:ST3_smx:INFO: # loops 1 12:50:54:ST3_smx:INFO: # loops 2 12:50:56:ST3_smx:INFO: Total # of broken channels: 0 12:50:56:ST3_smx:INFO: List of broken channels: [] 12:50:56:ST3_smx:INFO: Total # of broken channels: 0 12:50:56:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:50:58:ST3_smx:INFO: chip: 26-5 40.898880 C 1153.732915 mV 12:50:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:58:ST3_smx:INFO: Electrons 12:50:58:ST3_smx:INFO: # loops 0 12:50:59:ST3_smx:INFO: # loops 1 12:51:01:ST3_smx:INFO: # loops 2 12:51:03:ST3_smx:INFO: Total # of broken channels: 0 12:51:03:ST3_smx:INFO: List of broken channels: [] 12:51:03:ST3_smx:INFO: Total # of broken channels: 1 12:51:03:ST3_smx:INFO: List of broken channels: [66] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:51:04:ST3_smx:INFO: chip: 17-6 44.073563 C 1147.806000 mV 12:51:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:51:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:51:04:ST3_smx:INFO: Electrons 12:51:04:ST3_smx:INFO: # loops 0 12:51:06:ST3_smx:INFO: # loops 1 12:51:08:ST3_smx:INFO: # loops 2 12:51:10:ST3_smx:INFO: Total # of broken channels: 0 12:51:10:ST3_smx:INFO: List of broken channels: [] 12:51:10:ST3_smx:INFO: Total # of broken channels: 0 12:51:10:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:51:11:ST3_smx:INFO: chip: 24-7 44.073563 C 1153.732915 mV 12:51:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:51:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:51:11:ST3_smx:INFO: Electrons 12:51:11:ST3_smx:INFO: # loops 0 12:51:13:ST3_smx:INFO: # loops 1 12:51:15:ST3_smx:INFO: # loops 2 12:51:17:ST3_smx:INFO: Total # of broken channels: 0 12:51:17:ST3_smx:INFO: List of broken channels: [] 12:51:17:ST3_smx:INFO: Total # of broken channels: 0 12:51:17:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 12:51:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:51:17:febtest:INFO: 23-00 | XA-000-09-004-013-010-010-07 | 47.3 | 1159.7 12:51:17:febtest:INFO: 30-01 | XA-000-09-004-013-009-012-09 | 47.3 | 1159.7 12:51:18:febtest:INFO: 21-02 | XA-000-09-004-013-010-012-07 | 44.1 | 1165.6 12:51:18:febtest:INFO: 28-03 | XA-000-09-004-013-011-012-10 | 40.9 | 1177.4 12:51:18:febtest:INFO: 19-04 | XA-000-09-004-013-012-017-05 | 50.4 | 1147.8 12:51:18:febtest:INFO: 26-05 | XA-000-09-004-013-009-013-09 | 40.9 | 1177.4 12:51:18:febtest:INFO: 17-06 | XA-000-09-004-013-010-014-07 | 47.3 | 1171.5 12:51:19:febtest:INFO: 24-07 | XA-000-09-004-013-012-011-02 | 44.1 | 1177.4 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_03_28-12_49_51 OPERATOR : Robert V.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2361| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5860', '1.847', '2.6270'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0310', '1.850', '2.5500'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0150', '1.850', '0.5342']