DTL-STS tests database

FEB_2366 18.03.25 08:33:04

link:
...SMX_0.root
link:
...SMX_2.root
link:
...SMX_4.root
link:
...SMX_6.root
link: XA-000-09-004-018-005-022-14
...SMX_1.root
link: XA-000-09-004-018-006-023-00
...SMX_3.root
link: XA-000-09-004-018-005-023-14
...SMX_5.root
link: XA-000-09-004-010-009-019-04
...SMX_7.root
link: XA-000-09-004-010-009-019-04
...VddmCSAstatus.root
Info
            08:33:04:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:33:04:ST3_Shared:INFO:	                       FEB-Microcable                       
08:33:04:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:33:04:febtest:INFO:	Testing FEB with SN 2366
==============================================OOO==============================================
08:33:06:smx_tester:INFO:	Scanning setup
08:33:06:elinks:INFO:	Disabling clock on downlink 0
08:33:06:elinks:INFO:	Disabling clock on downlink 1
08:33:06:elinks:INFO:	Disabling clock on downlink 2
08:33:06:elinks:INFO:	Disabling clock on downlink 3
08:33:06:elinks:INFO:	Disabling clock on downlink 4
08:33:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:33:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:33:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:33:06:elinks:INFO:	Disabling clock on downlink 0
08:33:06:elinks:INFO:	Disabling clock on downlink 1
08:33:06:elinks:INFO:	Disabling clock on downlink 2
08:33:06:elinks:INFO:	Disabling clock on downlink 3
08:33:06:elinks:INFO:	Disabling clock on downlink 4
08:33:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:33:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:33:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:33:06:elinks:INFO:	Disabling clock on downlink 0
08:33:06:elinks:INFO:	Disabling clock on downlink 1
08:33:06:elinks:INFO:	Disabling clock on downlink 2
08:33:06:elinks:INFO:	Disabling clock on downlink 3
08:33:06:elinks:INFO:	Disabling clock on downlink 4
08:33:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:33:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:33:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
08:33:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
08:33:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
08:33:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
08:33:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
08:33:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
08:33:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
08:33:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
08:33:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:33:06:elinks:INFO:	Disabling clock on downlink 0
08:33:06:elinks:INFO:	Disabling clock on downlink 1
08:33:06:elinks:INFO:	Disabling clock on downlink 2
08:33:06:elinks:INFO:	Disabling clock on downlink 3
08:33:06:elinks:INFO:	Disabling clock on downlink 4
08:33:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:33:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:33:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:33:06:elinks:INFO:	Disabling clock on downlink 0
08:33:06:elinks:INFO:	Disabling clock on downlink 1
08:33:06:elinks:INFO:	Disabling clock on downlink 2
08:33:06:elinks:INFO:	Disabling clock on downlink 3
08:33:06:elinks:INFO:	Disabling clock on downlink 4
08:33:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:33:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:33:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:33:06:setup_element:INFO:	Scanning clock phase
08:33:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:33:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:33:07:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
08:33:07:setup_element:INFO:	Eye window for uplink 24: _________________________________________________________________________XXXXXXX
Clock Delay: 36
08:33:07:setup_element:INFO:	Eye window for uplink 25: _________________________________________________________________________XXXXXXX
Clock Delay: 36
08:33:07:setup_element:INFO:	Eye window for uplink 26: _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:33:07:setup_element:INFO:	Eye window for uplink 27: _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:33:07:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
08:33:07:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
08:33:07:setup_element:INFO:	Eye window for uplink 30: __________________________________________________________________________XXXXXX
Clock Delay: 36
08:33:07:setup_element:INFO:	Eye window for uplink 31: __________________________________________________________________________XXXXXX
Clock Delay: 36
08:33:07:setup_element:INFO:	Setting the clock phase to 36 for group 0, downlink 2
==============================================OOO==============================================
08:33:07:setup_element:INFO:	Scanning data phases
08:33:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:33:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:33:12:setup_element:INFO:	Data phase scan results for group 0, downlink 2
08:33:12:setup_element:INFO:	Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
08:33:12:setup_element:INFO:	Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
08:33:12:setup_element:INFO:	Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
08:33:12:setup_element:INFO:	Eye window for uplink 27: ____________XXXX________________________
Data delay found: 33
08:33:12:setup_element:INFO:	Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
08:33:12:setup_element:INFO:	Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
08:33:12:setup_element:INFO:	Eye window for uplink 30: ______________XXXXXXX___________________
Data delay found: 37
08:33:12:setup_element:INFO:	Eye window for uplink 31: ____________XXXXXX______________________
Data delay found: 34
08:33:12:setup_element:INFO:	Setting the data phase to 27 for uplink 24
08:33:12:setup_element:INFO:	Setting the data phase to 30 for uplink 25
08:33:12:setup_element:INFO:	Setting the data phase to 30 for uplink 26
08:33:12:setup_element:INFO:	Setting the data phase to 33 for uplink 27
08:33:12:setup_element:INFO:	Setting the data phase to 34 for uplink 28
08:33:12:setup_element:INFO:	Setting the data phase to 36 for uplink 29
08:33:12:setup_element:INFO:	Setting the data phase to 37 for uplink 30
08:33:12:setup_element:INFO:	Setting the data phase to 34 for uplink 31
==============================================OOO==============================================
08:33:12:setup_element:INFO:	Beginning SMX ASICs map scan
08:33:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:33:12:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:33:12:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
08:33:12:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
08:33:12:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
08:33:12:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:33:12:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:33:13:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:33:13:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:33:13:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:33:13:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:33:13:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:33:13:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:33:15:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 36
    Window Length: 73
    Eye Windows:
      Uplink 24: _________________________________________________________________________XXXXXXX
      Uplink 25: _________________________________________________________________________XXXXXXX
      Uplink 26: _________________________________________________________________________XXXXXX_
      Uplink 27: _________________________________________________________________________XXXXXX_
      Uplink 28: ________________________________________________________________________________
      Uplink 29: ________________________________________________________________________________
      Uplink 30: __________________________________________________________________________XXXXXX
      Uplink 31: __________________________________________________________________________XXXXXX
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 25:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 26:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 36
      Eye Window: ____________XXXX________________________
    Uplink 28:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 29:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 30:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXXXX___________________
    Uplink 31:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________

==============================================OOO==============================================
08:33:15:setup_element:INFO:	Performing Elink synchronization
08:33:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:33:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:33:15:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
08:33:15:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
08:33:15:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
08:33:15:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:33:15:febtest:INFO:	Init all SMX (CSA): 30
08:33:22:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:33:22:febtest:INFO:	30-01 | XA-000-09-004-018-005-022-14 |  37.7 | 1153.7
08:33:23:febtest:INFO:	28-03 | XA-000-09-004-018-006-023-00 |  37.7 | 1141.9
08:33:23:febtest:INFO:	26-05 | XA-000-09-004-018-005-023-14 |  37.7 | 1147.8
08:33:23:febtest:INFO:	24-07 | XA-000-09-004-010-009-019-04 |  40.9 | 1130.0
08:33:24:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:33:26:ST3_smx:INFO:	chip: 30-1 	 37.726682 C 	 1159.654860 mV
08:33:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:33:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:33:26:ST3_smx:INFO:		Electrons
08:33:26:ST3_smx:INFO:	# loops 0
08:33:28:ST3_smx:INFO:	# loops 1
08:33:29:ST3_smx:INFO:	# loops 2
08:33:30:ST3_smx:INFO:	Total # of broken channels: 0
08:33:30:ST3_smx:INFO:	List of broken channels: []
08:33:30:ST3_smx:INFO:	Total # of broken channels: 0
08:33:30:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:33:32:ST3_smx:INFO:	chip: 28-3 	 37.726682 C 	 1147.806000 mV
08:33:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:33:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:33:32:ST3_smx:INFO:		Electrons
08:33:32:ST3_smx:INFO:	# loops 0
08:33:34:ST3_smx:INFO:	# loops 1
08:33:35:ST3_smx:INFO:	# loops 2
08:33:37:ST3_smx:INFO:	Total # of broken channels: 0
08:33:37:ST3_smx:INFO:	List of broken channels: []
08:33:37:ST3_smx:INFO:	Total # of broken channels: 0
08:33:37:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:33:39:ST3_smx:INFO:	chip: 26-5 	 37.726682 C 	 1153.732915 mV
08:33:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:33:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:33:39:ST3_smx:INFO:		Electrons
08:33:39:ST3_smx:INFO:	# loops 0
08:33:40:ST3_smx:INFO:	# loops 1
08:33:42:ST3_smx:INFO:	# loops 2
08:33:43:ST3_smx:INFO:	Total # of broken channels: 0
08:33:43:ST3_smx:INFO:	List of broken channels: []
08:33:43:ST3_smx:INFO:	Total # of broken channels: 0
08:33:43:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:33:45:ST3_smx:INFO:	chip: 24-7 	 44.073563 C 	 1135.937260 mV
08:33:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:33:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:33:45:ST3_smx:INFO:		Electrons
08:33:45:ST3_smx:INFO:	# loops 0
08:33:47:ST3_smx:INFO:	# loops 1
08:33:48:ST3_smx:INFO:	# loops 2
08:33:49:ST3_smx:INFO:	Total # of broken channels: 1
08:33:49:ST3_smx:INFO:	List of broken channels: [58]
08:33:49:ST3_smx:INFO:	Total # of broken channels: 0
08:33:49:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
08:33:50:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:33:50:febtest:INFO:	30-01 | XA-000-09-004-018-005-022-14 |  37.7 | 1183.3
08:33:50:febtest:INFO:	28-03 | XA-000-09-004-018-006-023-00 |  40.9 | 1171.5
08:33:51:febtest:INFO:	26-05 | XA-000-09-004-018-005-023-14 |  40.9 | 1171.5
08:33:51:febtest:INFO:	24-07 | XA-000-09-004-010-009-019-04 |  44.1 | 1153.7
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_18-08_33_04
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_2
------------------------------------------------------------
| FEB_SN : 2366| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7884', '1.849', '0.9302']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0290', '1.850', '1.2550']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9974', '1.850', '0.2646']
Comment