DTL-STS tests database

FEB_2369 10.03.25 12:53:05

link:
...SMX_0.root
link:
...SMX_2.root
link:
...SMX_4.root
link:
...SMX_6.root
link: XA-000-09-004-013-013-015-15
...SMX_1.root
link: XA-000-09-004-013-014-016-06
...SMX_3.root
link: XA-000-09-004-013-015-015-12
...SMX_5.root
link: XA-000-09-004-013-013-014-15
...SMX_7.root
link: XA-000-09-004-013-013-014-15
...VddmCSAstatus.root
Info
            12:53:05:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:53:05:ST3_Shared:INFO:	                       FEB-Microcable                       
12:53:05:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:53:05:febtest:INFO:	Testing FEB with SN 2369
==============================================OOO==============================================
12:53:06:smx_tester:INFO:	Scanning setup
12:53:06:elinks:INFO:	Disabling clock on downlink 0
12:53:06:elinks:INFO:	Disabling clock on downlink 1
12:53:06:elinks:INFO:	Disabling clock on downlink 2
12:53:06:elinks:INFO:	Disabling clock on downlink 3
12:53:06:elinks:INFO:	Disabling clock on downlink 4
12:53:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:53:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:53:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:53:06:elinks:INFO:	Disabling clock on downlink 0
12:53:06:elinks:INFO:	Disabling clock on downlink 1
12:53:06:elinks:INFO:	Disabling clock on downlink 2
12:53:06:elinks:INFO:	Disabling clock on downlink 3
12:53:06:elinks:INFO:	Disabling clock on downlink 4
12:53:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:53:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:53:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:53:07:elinks:INFO:	Disabling clock on downlink 0
12:53:07:elinks:INFO:	Disabling clock on downlink 1
12:53:07:elinks:INFO:	Disabling clock on downlink 2
12:53:07:elinks:INFO:	Disabling clock on downlink 3
12:53:07:elinks:INFO:	Disabling clock on downlink 4
12:53:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:53:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:53:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
12:53:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
12:53:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
12:53:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
12:53:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
12:53:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
12:53:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
12:53:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
12:53:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:53:07:elinks:INFO:	Disabling clock on downlink 0
12:53:07:elinks:INFO:	Disabling clock on downlink 1
12:53:07:elinks:INFO:	Disabling clock on downlink 2
12:53:07:elinks:INFO:	Disabling clock on downlink 3
12:53:07:elinks:INFO:	Disabling clock on downlink 4
12:53:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:53:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:53:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:53:07:elinks:INFO:	Disabling clock on downlink 0
12:53:07:elinks:INFO:	Disabling clock on downlink 1
12:53:07:elinks:INFO:	Disabling clock on downlink 2
12:53:07:elinks:INFO:	Disabling clock on downlink 3
12:53:07:elinks:INFO:	Disabling clock on downlink 4
12:53:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:53:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:53:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
12:53:07:setup_element:INFO:	Scanning clock phase
12:53:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:53:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:53:07:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
12:53:07:setup_element:INFO:	Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
12:53:07:setup_element:INFO:	Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
12:53:07:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
12:53:07:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
12:53:07:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
12:53:07:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
12:53:07:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
12:53:07:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
12:53:07:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 2
==============================================OOO==============================================
12:53:07:setup_element:INFO:	Scanning data phases
12:53:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:53:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:53:12:setup_element:INFO:	Data phase scan results for group 0, downlink 2
12:53:12:setup_element:INFO:	Eye window for uplink 24: _______________XXXXX____________________
Data delay found: 37
12:53:13:setup_element:INFO:	Eye window for uplink 25: ________________XXXXX___________________
Data delay found: 38
12:53:13:setup_element:INFO:	Eye window for uplink 26: _______________XXXXXX___________________
Data delay found: 37
12:53:13:setup_element:INFO:	Eye window for uplink 27: ________________XXXXXXX_________________
Data delay found: 39
12:53:13:setup_element:INFO:	Eye window for uplink 28: ____________________XXXXXX______________
Data delay found: 2
12:53:13:setup_element:INFO:	Eye window for uplink 29: ____________________XXXXXX______________
Data delay found: 2
12:53:13:setup_element:INFO:	Eye window for uplink 30: ___________________XXXXX________________
Data delay found: 1
12:53:13:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXXX_________________
Data delay found: 39
12:53:13:setup_element:INFO:	Setting the data phase to 37 for uplink 24
12:53:13:setup_element:INFO:	Setting the data phase to 38 for uplink 25
12:53:13:setup_element:INFO:	Setting the data phase to 37 for uplink 26
12:53:13:setup_element:INFO:	Setting the data phase to 39 for uplink 27
12:53:13:setup_element:INFO:	Setting the data phase to 2 for uplink 28
12:53:13:setup_element:INFO:	Setting the data phase to 2 for uplink 29
12:53:13:setup_element:INFO:	Setting the data phase to 1 for uplink 30
12:53:13:setup_element:INFO:	Setting the data phase to 39 for uplink 31
==============================================OOO==============================================
12:53:13:setup_element:INFO:	Beginning SMX ASICs map scan
12:53:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:53:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:53:13:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:53:13:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:53:13:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
12:53:13:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:53:13:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:53:13:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:53:13:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:53:13:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:53:14:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:53:14:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:53:14:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:53:15:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 70
    Eye Windows:
      Uplink 24: ____________________________________________________________________XXXXXXXXX___
      Uplink 25: ____________________________________________________________________XXXXXXXXX___
      Uplink 26: ___________________________________________________________________XXXXXXXXX____
      Uplink 27: ___________________________________________________________________XXXXXXXXX____
      Uplink 28: _____________________________________________________________________XXXXXXXX___
      Uplink 29: _____________________________________________________________________XXXXXXXX___
      Uplink 30: ___________________________________________________________________XXXXXXXX_____
      Uplink 31: ___________________________________________________________________XXXXXXXX_____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 37
      Window Length: 35
      Eye Window: _______________XXXXX____________________
    Uplink 25:
      Optimal Phase: 38
      Window Length: 35
      Eye Window: ________________XXXXX___________________
    Uplink 26:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 27:
      Optimal Phase: 39
      Window Length: 33
      Eye Window: ________________XXXXXXX_________________
    Uplink 28:
      Optimal Phase: 2
      Window Length: 34
      Eye Window: ____________________XXXXXX______________
    Uplink 29:
      Optimal Phase: 2
      Window Length: 34
      Eye Window: ____________________XXXXXX______________
    Uplink 30:
      Optimal Phase: 1
      Window Length: 35
      Eye Window: ___________________XXXXX________________
    Uplink 31:
      Optimal Phase: 39
      Window Length: 33
      Eye Window: ________________XXXXXXX_________________

==============================================OOO==============================================
12:53:15:setup_element:INFO:	Performing Elink synchronization
12:53:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:53:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:53:15:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:53:15:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
12:53:15:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
12:53:15:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
12:53:16:febtest:INFO:	Init all SMX (CSA): 30
12:53:23:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:53:24:febtest:INFO:	30-01 | XA-000-09-004-013-013-015-15 |  21.9 | 1171.5
12:53:24:febtest:INFO:	28-03 | XA-000-09-004-013-014-016-06 |  40.9 | 1106.2
12:53:24:febtest:INFO:	26-05 | XA-000-09-004-013-015-015-12 |  25.1 | 1153.7
12:53:24:febtest:INFO:	24-07 | XA-000-09-004-013-013-014-15 |  15.6 | 1189.2
12:53:25:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
12:53:27:ST3_smx:INFO:	chip: 30-1 	 21.902970 C 	 1183.292940 mV
12:53:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:27:ST3_smx:INFO:		Electrons
12:53:27:ST3_smx:INFO:	# loops 0
12:53:29:ST3_smx:INFO:	# loops 1
12:53:31:ST3_smx:INFO:	# loops 2
12:53:32:ST3_smx:INFO:	Total # of broken channels: 0
12:53:32:ST3_smx:INFO:	List of broken channels: []
12:53:33:ST3_smx:INFO:	Total # of broken channels: 0
12:53:33:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:53:34:ST3_smx:INFO:	chip: 28-3 	 37.726682 C 	 1112.140140 mV
12:53:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:34:ST3_smx:INFO:		Electrons
12:53:34:ST3_smx:INFO:	# loops 0
12:53:36:ST3_smx:INFO:	# loops 1
12:53:38:ST3_smx:INFO:	# loops 2
12:53:39:ST3_smx:INFO:	Total # of broken channels: 0
12:53:39:ST3_smx:INFO:	List of broken channels: []
12:53:39:ST3_smx:INFO:	Total # of broken channels: 0
12:53:39:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:53:41:ST3_smx:INFO:	chip: 26-5 	 25.062742 C 	 1159.654860 mV
12:53:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:41:ST3_smx:INFO:		Electrons
12:53:41:ST3_smx:INFO:	# loops 0
12:53:43:ST3_smx:INFO:	# loops 1
12:53:45:ST3_smx:INFO:	# loops 2
12:53:46:ST3_smx:INFO:	Total # of broken channels: 0
12:53:46:ST3_smx:INFO:	List of broken channels: []
12:53:46:ST3_smx:INFO:	Total # of broken channels: 0
12:53:46:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:53:48:ST3_smx:INFO:	chip: 24-7 	 18.745682 C 	 1195.082160 mV
12:53:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:53:48:ST3_smx:INFO:		Electrons
12:53:48:ST3_smx:INFO:	# loops 0
12:53:50:ST3_smx:INFO:	# loops 1
12:53:52:ST3_smx:INFO:	# loops 2
12:53:53:ST3_smx:INFO:	Total # of broken channels: 0
12:53:53:ST3_smx:INFO:	List of broken channels: []
12:53:53:ST3_smx:INFO:	Total # of broken channels: 0
12:53:53:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
12:53:54:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:53:54:febtest:INFO:	30-01 | XA-000-09-004-013-013-015-15 |  21.9 | 1206.9
12:53:54:febtest:INFO:	28-03 | XA-000-09-004-013-014-016-06 |  40.9 | 1135.9
12:53:54:febtest:INFO:	26-05 | XA-000-09-004-013-015-015-12 |  28.2 | 1183.3
12:53:55:febtest:INFO:	24-07 | XA-000-09-004-013-013-014-15 |  18.7 | 1212.7
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_10-12_53_05
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2369| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9573', '1.848', '0.9701']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0080', '1.850', '1.2410']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9892', '1.850', '0.2643']
Comment