DTL-STS tests database

FEB_2375 03.03.25 13:43:54

link:
...SMX_0.root
link:
...SMX_2.root
link:
...SMX_4.root
link:
...SMX_6.root
link: XA-000-09-004-009-012-009-09
...SMX_1.root
link: XA-000-09-004-009-012-004-09
...SMX_3.root
link: XA-000-09-004-013-017-015-09
...SMX_5.root
link: XA-000-09-004-013-016-015-04
...SMX_7.root
link: XA-000-09-004-013-016-015-04
...VddmCSAstatus.root
Info
            13:43:54:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:43:54:ST3_Shared:INFO:	                       FEB-Microcable                       
13:43:54:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:43:54:febtest:INFO:	Testing FEB with SN 2375
==============================================OOO==============================================
13:43:56:smx_tester:INFO:	Scanning setup
13:43:56:elinks:INFO:	Disabling clock on downlink 0
13:43:56:elinks:INFO:	Disabling clock on downlink 1
13:43:56:elinks:INFO:	Disabling clock on downlink 2
13:43:56:elinks:INFO:	Disabling clock on downlink 3
13:43:56:elinks:INFO:	Disabling clock on downlink 4
13:43:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:43:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:43:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:43:56:elinks:INFO:	Disabling clock on downlink 0
13:43:56:elinks:INFO:	Disabling clock on downlink 1
13:43:56:elinks:INFO:	Disabling clock on downlink 2
13:43:56:elinks:INFO:	Disabling clock on downlink 3
13:43:56:elinks:INFO:	Disabling clock on downlink 4
13:43:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:43:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:43:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:43:56:elinks:INFO:	Disabling clock on downlink 0
13:43:56:elinks:INFO:	Disabling clock on downlink 1
13:43:56:elinks:INFO:	Disabling clock on downlink 2
13:43:56:elinks:INFO:	Disabling clock on downlink 3
13:43:56:elinks:INFO:	Disabling clock on downlink 4
13:43:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:43:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:43:56:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:43:56:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:43:56:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:43:56:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:43:56:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:43:56:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:43:56:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:43:56:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:43:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:43:56:elinks:INFO:	Disabling clock on downlink 0
13:43:56:elinks:INFO:	Disabling clock on downlink 1
13:43:56:elinks:INFO:	Disabling clock on downlink 2
13:43:56:elinks:INFO:	Disabling clock on downlink 3
13:43:56:elinks:INFO:	Disabling clock on downlink 4
13:43:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:43:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:43:57:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:43:57:elinks:INFO:	Disabling clock on downlink 0
13:43:57:elinks:INFO:	Disabling clock on downlink 1
13:43:57:elinks:INFO:	Disabling clock on downlink 2
13:43:57:elinks:INFO:	Disabling clock on downlink 3
13:43:57:elinks:INFO:	Disabling clock on downlink 4
13:43:57:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:43:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:43:57:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:43:57:setup_element:INFO:	Scanning clock phase
13:43:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:43:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:43:57:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:43:57:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:43:57:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:43:57:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:43:57:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:43:57:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:43:57:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:43:57:setup_element:INFO:	Eye window for uplink 30: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
13:43:57:setup_element:INFO:	Eye window for uplink 31: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
13:43:57:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 2
==============================================OOO==============================================
13:43:57:setup_element:INFO:	Scanning data phases
13:43:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:43:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:44:02:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:44:02:setup_element:INFO:	Eye window for uplink 24: _____________XXXXX______________________
Data delay found: 35
13:44:02:setup_element:INFO:	Eye window for uplink 25: _______________XXXX_____________________
Data delay found: 36
13:44:02:setup_element:INFO:	Eye window for uplink 26: ________________XXXXXX__________________
Data delay found: 38
13:44:02:setup_element:INFO:	Eye window for uplink 27: __________________XXXXX_________________
Data delay found: 0
13:44:02:setup_element:INFO:	Eye window for uplink 28: ____________________XXXXXX______________
Data delay found: 2
13:44:02:setup_element:INFO:	Eye window for uplink 29: ____________________XXXXXX______________
Data delay found: 2
13:44:02:setup_element:INFO:	Eye window for uplink 30: ___________________XXXXX________________
Data delay found: 1
13:44:02:setup_element:INFO:	Eye window for uplink 31: _________________XXXXXX_________________
Data delay found: 39
13:44:02:setup_element:INFO:	Setting the data phase to 35 for uplink 24
13:44:02:setup_element:INFO:	Setting the data phase to 36 for uplink 25
13:44:02:setup_element:INFO:	Setting the data phase to 38 for uplink 26
13:44:02:setup_element:INFO:	Setting the data phase to 0 for uplink 27
13:44:02:setup_element:INFO:	Setting the data phase to 2 for uplink 28
13:44:02:setup_element:INFO:	Setting the data phase to 2 for uplink 29
13:44:02:setup_element:INFO:	Setting the data phase to 1 for uplink 30
13:44:02:setup_element:INFO:	Setting the data phase to 39 for uplink 31
==============================================OOO==============================================
13:44:02:setup_element:INFO:	Beginning SMX ASICs map scan
13:44:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:44:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:44:02:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:44:02:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:44:02:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:44:02:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:44:02:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:44:03:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:44:03:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:44:03:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:44:03:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:44:03:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:44:03:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:44:05:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 69
    Eye Windows:
      Uplink 24: ___________________________________________________________________XXXXXXXX_____
      Uplink 25: ___________________________________________________________________XXXXXXXX_____
      Uplink 26: ____________________________________________________________________XXXXXXXXX___
      Uplink 27: ____________________________________________________________________XXXXXXXXX___
      Uplink 28: ____________________________________________________________________XXXXXXXXX___
      Uplink 29: ____________________________________________________________________XXXXXXXXX___
      Uplink 30: __________________________________________________________________XXXXXXXXX_____
      Uplink 31: __________________________________________________________________XXXXXXXXX_____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 25:
      Optimal Phase: 36
      Window Length: 36
      Eye Window: _______________XXXX_____________________
    Uplink 26:
      Optimal Phase: 38
      Window Length: 34
      Eye Window: ________________XXXXXX__________________
    Uplink 27:
      Optimal Phase: 0
      Window Length: 35
      Eye Window: __________________XXXXX_________________
    Uplink 28:
      Optimal Phase: 2
      Window Length: 34
      Eye Window: ____________________XXXXXX______________
    Uplink 29:
      Optimal Phase: 2
      Window Length: 34
      Eye Window: ____________________XXXXXX______________
    Uplink 30:
      Optimal Phase: 1
      Window Length: 35
      Eye Window: ___________________XXXXX________________
    Uplink 31:
      Optimal Phase: 39
      Window Length: 34
      Eye Window: _________________XXXXXX_________________

==============================================OOO==============================================
13:44:05:setup_element:INFO:	Performing Elink synchronization
13:44:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:44:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:44:05:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:44:05:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
13:44:05:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:44:05:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:44:05:febtest:INFO:	Init all SMX (CSA): 30
13:44:12:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:44:12:febtest:INFO:	30-01 | XA-000-09-004-009-012-009-09 |  28.2 | 1159.7
13:44:13:febtest:INFO:	28-03 | XA-000-09-004-009-012-004-09 |  37.7 | 1112.1
13:44:13:febtest:INFO:	26-05 | XA-000-09-004-013-017-015-09 |  28.2 | 1153.7
13:44:13:febtest:INFO:	24-07 | XA-000-09-004-013-016-015-04 |  -0.1 | 1247.9
13:44:14:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:44:16:ST3_smx:INFO:	chip: 30-1 	 28.225000 C 	 1171.483840 mV
13:44:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:16:ST3_smx:INFO:		Electrons
13:44:16:ST3_smx:INFO:	# loops 0
13:44:18:ST3_smx:INFO:	# loops 1
13:44:19:ST3_smx:INFO:	# loops 2
13:44:21:ST3_smx:INFO:	Total # of broken channels: 0
13:44:21:ST3_smx:INFO:	List of broken channels: []
13:44:21:ST3_smx:INFO:	Total # of broken channels: 0
13:44:21:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:44:23:ST3_smx:INFO:	chip: 28-3 	 37.726682 C 	 1124.048640 mV
13:44:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:23:ST3_smx:INFO:		Electrons
13:44:23:ST3_smx:INFO:	# loops 0
13:44:24:ST3_smx:INFO:	# loops 1
13:44:26:ST3_smx:INFO:	# loops 2
13:44:28:ST3_smx:INFO:	Total # of broken channels: 0
13:44:28:ST3_smx:INFO:	List of broken channels: []
13:44:28:ST3_smx:INFO:	Total # of broken channels: 0
13:44:28:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:44:29:ST3_smx:INFO:	chip: 26-5 	 28.225000 C 	 1165.571835 mV
13:44:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:29:ST3_smx:INFO:		Electrons
13:44:29:ST3_smx:INFO:	# loops 0
13:44:31:ST3_smx:INFO:	# loops 1
13:44:33:ST3_smx:INFO:	# loops 2
13:44:34:ST3_smx:INFO:	Total # of broken channels: 0
13:44:34:ST3_smx:INFO:	List of broken channels: []
13:44:34:ST3_smx:INFO:	Total # of broken channels: 0
13:44:34:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:44:36:ST3_smx:INFO:	chip: 24-7 	 2.996520 C 	 1259.567515 mV
13:44:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:36:ST3_smx:INFO:		Electrons
13:44:36:ST3_smx:INFO:	# loops 0
13:44:38:ST3_smx:INFO:	# loops 1
13:44:39:ST3_smx:INFO:	# loops 2
13:44:41:ST3_smx:INFO:	Total # of broken channels: 0
13:44:41:ST3_smx:INFO:	List of broken channels: []
13:44:41:ST3_smx:INFO:	Total # of broken channels: 0
13:44:41:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:44:41:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:44:41:febtest:INFO:	30-01 | XA-000-09-004-009-012-009-09 |  28.2 | 1195.1
13:44:42:febtest:INFO:	28-03 | XA-000-09-004-009-012-004-09 |  37.7 | 1147.8
13:44:42:febtest:INFO:	26-05 | XA-000-09-004-013-017-015-09 |  28.2 | 1183.3
13:44:42:febtest:INFO:	24-07 | XA-000-09-004-013-016-015-04 |   3.0 | 1277.1
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_03-13_43_54
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2375| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7049', '1.848', '1.4180']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0060', '1.850', '1.2830']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9877', '1.850', '0.2680']
Comment