
FEB_2379 07.05.25 10:48:09
TextEdit.txt
10:48:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:48:09:ST3_Shared:INFO: FEB-Microcable 10:48:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:48:09:febtest:INFO: Testing FEB with SN 2379 ==============================================OOO============================================== 10:48:10:smx_tester:INFO: Scanning setup 10:48:10:elinks:INFO: Disabling clock on downlink 0 10:48:10:elinks:INFO: Disabling clock on downlink 1 10:48:10:elinks:INFO: Disabling clock on downlink 2 10:48:10:elinks:INFO: Disabling clock on downlink 3 10:48:10:elinks:INFO: Disabling clock on downlink 4 10:48:10:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:48:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:48:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:48:10:elinks:INFO: Disabling clock on downlink 0 10:48:10:elinks:INFO: Disabling clock on downlink 1 10:48:10:elinks:INFO: Disabling clock on downlink 2 10:48:10:elinks:INFO: Disabling clock on downlink 3 10:48:10:elinks:INFO: Disabling clock on downlink 4 10:48:10:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:48:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:48:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:48:10:elinks:INFO: Disabling clock on downlink 0 10:48:11:elinks:INFO: Disabling clock on downlink 1 10:48:11:elinks:INFO: Disabling clock on downlink 2 10:48:11:elinks:INFO: Disabling clock on downlink 3 10:48:11:elinks:INFO: Disabling clock on downlink 4 10:48:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:48:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 10:48:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 10:48:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:48:11:elinks:INFO: Disabling clock on downlink 0 10:48:11:elinks:INFO: Disabling clock on downlink 1 10:48:11:elinks:INFO: Disabling clock on downlink 2 10:48:11:elinks:INFO: Disabling clock on downlink 3 10:48:11:elinks:INFO: Disabling clock on downlink 4 10:48:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:48:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:48:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:48:11:elinks:INFO: Disabling clock on downlink 0 10:48:11:elinks:INFO: Disabling clock on downlink 1 10:48:11:elinks:INFO: Disabling clock on downlink 2 10:48:11:elinks:INFO: Disabling clock on downlink 3 10:48:11:elinks:INFO: Disabling clock on downlink 4 10:48:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:48:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:48:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 10:48:11:setup_element:INFO: Scanning clock phase 10:48:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:48:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:48:11:setup_element:INFO: Clock phase scan results for group 0, downlink 2 10:48:11:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:48:11:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:48:11:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 10:48:11:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 10:48:11:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:48:11:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:48:11:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXXXX Clock Delay: 35 10:48:11:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXXXX Clock Delay: 35 10:48:11:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________ Clock Delay: 40 10:48:11:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________ Clock Delay: 40 10:48:11:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:48:11:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 10:48:11:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 10:48:11:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 10:48:11:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:48:11:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 10:48:11:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2 ==============================================OOO============================================== 10:48:11:setup_element:INFO: Scanning data phases 10:48:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:48:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:48:17:setup_element:INFO: Data phase scan results for group 0, downlink 2 10:48:17:setup_element:INFO: Eye window for uplink 16: ____XXXXX_______________________________ Data delay found: 26 10:48:17:setup_element:INFO: Eye window for uplink 17: __XXXXX_________________________________ Data delay found: 24 10:48:17:setup_element:INFO: Eye window for uplink 18: XXXXX_________________________________XX Data delay found: 21 10:48:17:setup_element:INFO: Eye window for uplink 19: XXXXX_________________________________XX Data delay found: 21 10:48:17:setup_element:INFO: Eye window for uplink 20: ___XXXXXX_______________________________ Data delay found: 25 10:48:17:setup_element:INFO: Eye window for uplink 21: ____XXXXXX______________________________ Data delay found: 26 10:48:17:setup_element:INFO: Eye window for uplink 22: ___XXXXX________________________________ Data delay found: 25 10:48:17:setup_element:INFO: Eye window for uplink 23: __XXXXX_________________________________ Data delay found: 24 10:48:17:setup_element:INFO: Eye window for uplink 24: ___________XXXXXX_______________________ Data delay found: 33 10:48:17:setup_element:INFO: Eye window for uplink 25: _____________XXXXX______________________ Data delay found: 35 10:48:17:setup_element:INFO: Eye window for uplink 26: ______________XXXXX_____________________ Data delay found: 36 10:48:17:setup_element:INFO: Eye window for uplink 27: ________________XXXXX___________________ Data delay found: 38 10:48:17:setup_element:INFO: Eye window for uplink 28: ___________________XXXXX________________ Data delay found: 1 10:48:17:setup_element:INFO: Eye window for uplink 29: __________________XXXXXX________________ Data delay found: 0 10:48:17:setup_element:INFO: Eye window for uplink 30: ______________________XXXXX_____________ Data delay found: 4 10:48:17:setup_element:INFO: Eye window for uplink 31: ___________________XXXXXX_______________ Data delay found: 1 10:48:17:setup_element:INFO: Setting the data phase to 26 for uplink 16 10:48:17:setup_element:INFO: Setting the data phase to 24 for uplink 17 10:48:17:setup_element:INFO: Setting the data phase to 21 for uplink 18 10:48:17:setup_element:INFO: Setting the data phase to 21 for uplink 19 10:48:17:setup_element:INFO: Setting the data phase to 25 for uplink 20 10:48:17:setup_element:INFO: Setting the data phase to 26 for uplink 21 10:48:17:setup_element:INFO: Setting the data phase to 25 for uplink 22 10:48:17:setup_element:INFO: Setting the data phase to 24 for uplink 23 10:48:17:setup_element:INFO: Setting the data phase to 33 for uplink 24 10:48:17:setup_element:INFO: Setting the data phase to 35 for uplink 25 10:48:17:setup_element:INFO: Setting the data phase to 36 for uplink 26 10:48:17:setup_element:INFO: Setting the data phase to 38 for uplink 27 10:48:17:setup_element:INFO: Setting the data phase to 1 for uplink 28 10:48:17:setup_element:INFO: Setting the data phase to 0 for uplink 29 10:48:17:setup_element:INFO: Setting the data phase to 4 for uplink 30 10:48:17:setup_element:INFO: Setting the data phase to 1 for uplink 31 ==============================================OOO============================================== 10:48:17:setup_element:INFO: Beginning SMX ASICs map scan 10:48:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:48:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:48:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:48:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:48:17:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:48:17:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 10:48:17:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 10:48:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 10:48:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 10:48:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 10:48:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 10:48:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 10:48:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 10:48:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 10:48:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 10:48:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 10:48:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 10:48:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 10:48:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 10:48:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 10:48:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 10:48:20:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 69 Eye Windows: Uplink 16: _______________________________________________________________________XXXXXXXX_ Uplink 17: _______________________________________________________________________XXXXXXXX_ Uplink 18: _____________________________________________________________________XXXXXXXXX__ Uplink 19: _____________________________________________________________________XXXXXXXXX__ Uplink 20: ______________________________________________________________________XXXXXXXXX_ Uplink 21: ______________________________________________________________________XXXXXXXXX_ Uplink 22: _______________________________________________________________________XXXXXXXXX Uplink 23: _______________________________________________________________________XXXXXXXXX Uplink 24: ________________________________________________________________________________ Uplink 25: ________________________________________________________________________________ Uplink 26: _____________________________________________________________________XXXXXXXX___ Uplink 27: _____________________________________________________________________XXXXXXXX___ Uplink 28: ______________________________________________________________________XXXXXXX___ Uplink 29: ______________________________________________________________________XXXXXXX___ Uplink 30: ______________________________________________________________________XXXXXXXXX_ Uplink 31: ______________________________________________________________________XXXXXXXXX_ Data phase characteristics: Uplink 16: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 17: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 18: Optimal Phase: 21 Window Length: 33 Eye Window: XXXXX_________________________________XX Uplink 19: Optimal Phase: 21 Window Length: 33 Eye Window: XXXXX_________________________________XX Uplink 20: Optimal Phase: 25 Window Length: 34 Eye Window: ___XXXXXX_______________________________ Uplink 21: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 22: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 23: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 24: Optimal Phase: 33 Window Length: 34 Eye Window: ___________XXXXXX_______________________ Uplink 25: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 26: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 27: Optimal Phase: 38 Window Length: 35 Eye Window: ________________XXXXX___________________ Uplink 28: Optimal Phase: 1 Window Length: 35 Eye Window: ___________________XXXXX________________ Uplink 29: Optimal Phase: 0 Window Length: 34 Eye Window: __________________XXXXXX________________ Uplink 30: Optimal Phase: 4 Window Length: 35 Eye Window: ______________________XXXXX_____________ Uplink 31: Optimal Phase: 1 Window Length: 34 Eye Window: ___________________XXXXXX_______________ ==============================================OOO============================================== 10:48:20:setup_element:INFO: Performing Elink synchronization 10:48:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:48:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:48:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:48:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 10:48:20:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 10:48:20:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 10:48:20:febtest:INFO: Init all SMX (CSA): 30 10:48:35:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:48:35:febtest:INFO: 23-00 | XA-000-09-004-011-014-026-04 | 25.1 | 1177.4 10:48:36:febtest:INFO: 30-01 | XA-000-09-004-011-005-011-01 | 28.2 | 1171.5 10:48:36:febtest:INFO: 21-02 | XA-000-09-004-011-011-026-15 | 37.7 | 1135.9 10:48:36:febtest:INFO: 28-03 | XA-000-09-004-011-014-010-03 | 28.2 | 1165.6 10:48:36:febtest:INFO: 19-04 | XA-000-09-004-011-012-003-00 | 37.7 | 1141.9 10:48:36:febtest:INFO: 26-05 | XA-000-09-004-011-011-011-08 | 37.7 | 1141.9 10:48:37:febtest:INFO: 17-06 | XA-000-09-004-011-017-010-11 | 34.6 | 1159.7 10:48:37:febtest:INFO: 24-07 | XA-000-09-004-011-008-011-06 | 40.9 | 1130.0 10:48:38:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 10:48:40:ST3_smx:INFO: chip: 23-0 25.062742 C 1189.190035 mV 10:48:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:48:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:48:40:ST3_smx:INFO: Electrons 10:48:40:ST3_smx:INFO: # loops 0 10:48:42:ST3_smx:INFO: # loops 1 10:48:43:ST3_smx:INFO: # loops 2 10:48:45:ST3_smx:INFO: Total # of broken channels: 0 10:48:45:ST3_smx:INFO: List of broken channels: [] 10:48:45:ST3_smx:INFO: Total # of broken channels: 0 10:48:45:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:48:47:ST3_smx:INFO: chip: 30-1 28.225000 C 1183.292940 mV 10:48:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:48:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:48:47:ST3_smx:INFO: Electrons 10:48:47:ST3_smx:INFO: # loops 0 10:48:49:ST3_smx:INFO: # loops 1 10:48:50:ST3_smx:INFO: # loops 2 10:48:52:ST3_smx:INFO: Total # of broken channels: 0 10:48:52:ST3_smx:INFO: List of broken channels: [] 10:48:52:ST3_smx:INFO: Total # of broken channels: 0 10:48:52:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:48:54:ST3_smx:INFO: chip: 21-2 37.726682 C 1147.806000 mV 10:48:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:48:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:48:54:ST3_smx:INFO: Electrons 10:48:54:ST3_smx:INFO: # loops 0 10:48:56:ST3_smx:INFO: # loops 1 10:48:57:ST3_smx:INFO: # loops 2 10:48:59:ST3_smx:INFO: Total # of broken channels: 1 10:48:59:ST3_smx:INFO: List of broken channels: [1] 10:48:59:ST3_smx:INFO: Total # of broken channels: 3 10:48:59:ST3_smx:INFO: List of broken channels: [1, 6, 8] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:49:01:ST3_smx:INFO: chip: 28-3 28.225000 C 1183.292940 mV 10:49:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:49:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:49:01:ST3_smx:INFO: Electrons 10:49:01:ST3_smx:INFO: # loops 0 10:49:03:ST3_smx:INFO: # loops 1 10:49:04:ST3_smx:INFO: # loops 2 10:49:06:ST3_smx:INFO: Total # of broken channels: 0 10:49:06:ST3_smx:INFO: List of broken channels: [] 10:49:06:ST3_smx:INFO: Total # of broken channels: 1 10:49:06:ST3_smx:INFO: List of broken channels: [121] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:49:08:ST3_smx:INFO: chip: 19-4 37.726682 C 1153.732915 mV 10:49:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:49:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:49:08:ST3_smx:INFO: Electrons 10:49:08:ST3_smx:INFO: # loops 0 10:49:10:ST3_smx:INFO: # loops 1 10:49:11:ST3_smx:INFO: # loops 2 10:49:13:ST3_smx:INFO: Total # of broken channels: 0 10:49:13:ST3_smx:INFO: List of broken channels: [] 10:49:13:ST3_smx:INFO: Total # of broken channels: 2 10:49:13:ST3_smx:INFO: List of broken channels: [6, 18] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:49:15:ST3_smx:INFO: chip: 26-5 37.726682 C 1159.654860 mV 10:49:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:49:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:49:15:ST3_smx:INFO: Electrons 10:49:15:ST3_smx:INFO: # loops 0 10:49:17:ST3_smx:INFO: # loops 1 10:49:18:ST3_smx:INFO: # loops 2 10:49:20:ST3_smx:INFO: Total # of broken channels: 2 10:49:20:ST3_smx:INFO: List of broken channels: [78, 83] 10:49:20:ST3_smx:INFO: Total # of broken channels: 2 10:49:20:ST3_smx:INFO: List of broken channels: [18, 78] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:49:22:ST3_smx:INFO: chip: 17-6 34.556970 C 1165.571835 mV 10:49:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:49:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:49:22:ST3_smx:INFO: Electrons 10:49:22:ST3_smx:INFO: # loops 0 10:49:24:ST3_smx:INFO: # loops 1 10:49:25:ST3_smx:INFO: # loops 2 10:49:27:ST3_smx:INFO: Total # of broken channels: 1 10:49:27:ST3_smx:INFO: List of broken channels: [12] 10:49:27:ST3_smx:INFO: Total # of broken channels: 0 10:49:27:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:49:29:ST3_smx:INFO: chip: 24-7 44.073563 C 1141.874115 mV 10:49:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:49:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:49:29:ST3_smx:INFO: Electrons 10:49:29:ST3_smx:INFO: # loops 0 10:49:31:ST3_smx:INFO: # loops 1 10:49:32:ST3_smx:INFO: # loops 2 10:49:34:ST3_smx:INFO: Total # of broken channels: 0 10:49:34:ST3_smx:INFO: List of broken channels: [] 10:49:34:ST3_smx:INFO: Total # of broken channels: 0 10:49:34:ST3_smx:INFO: List of broken channels: [] THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated. 10:49:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:49:35:febtest:INFO: 23-00 | XA-000-09-004-011-014-026-04 | 25.1 | 1212.7 10:49:35:febtest:INFO: 30-01 | XA-000-09-004-011-005-011-01 | 28.2 | 1206.9 10:49:35:febtest:INFO: 21-02 | XA-000-09-004-011-011-026-15 | 37.7 | 1171.5 10:49:35:febtest:INFO: 28-03 | XA-000-09-004-011-014-010-03 | 28.2 | 1206.9 10:49:35:febtest:INFO: 19-04 | XA-000-09-004-011-012-003-00 | 37.7 | 1177.4 10:49:36:febtest:INFO: 26-05 | XA-000-09-004-011-011-011-08 | 37.7 | 1183.3 10:49:36:febtest:INFO: 17-06 | XA-000-09-004-011-017-010-11 | 37.7 | 1189.2 10:49:36:febtest:INFO: 24-07 | XA-000-09-004-011-008-011-06 | 44.1 | 1165.6 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_05_07-10_48_09 OPERATOR : Robert V.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2379| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4620', '1.848', '2.4630'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0230', '1.849', '2.4880'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9890', '1.850', '0.5286']