DTL-STS tests database

FEB_2380 07.04.25 14:30:11

link:
...SMX_0.root
link:
...SMX_2.root
link:
...SMX_4.root
link:
...SMX_6.root
link: XA-000-09-004-015-006-013-04
...SMX_1.root
link: XA-000-09-004-015-018-014-14
...SMX_3.root
link: XA-000-09-004-015-012-013-11
...SMX_5.root
link: XA-000-09-004-015-015-014-05
...SMX_7.root
link: XA-000-09-004-015-015-014-05
...VddmCSAstatus.root
Info
            14:30:11:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:30:11:ST3_Shared:INFO:	                       FEB-Microcable                       
14:30:11:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:30:11:febtest:INFO:	Testing FEB with SN 2380
==============================================OOO==============================================
14:30:12:smx_tester:INFO:	Scanning setup
14:30:12:elinks:INFO:	Disabling clock on downlink 0
14:30:12:elinks:INFO:	Disabling clock on downlink 1
14:30:12:elinks:INFO:	Disabling clock on downlink 2
14:30:12:elinks:INFO:	Disabling clock on downlink 3
14:30:12:elinks:INFO:	Disabling clock on downlink 4
14:30:12:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:30:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:30:12:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:30:12:elinks:INFO:	Disabling clock on downlink 0
14:30:12:elinks:INFO:	Disabling clock on downlink 1
14:30:12:elinks:INFO:	Disabling clock on downlink 2
14:30:12:elinks:INFO:	Disabling clock on downlink 3
14:30:12:elinks:INFO:	Disabling clock on downlink 4
14:30:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:30:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:30:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:30:13:elinks:INFO:	Disabling clock on downlink 0
14:30:13:elinks:INFO:	Disabling clock on downlink 1
14:30:13:elinks:INFO:	Disabling clock on downlink 2
14:30:13:elinks:INFO:	Disabling clock on downlink 3
14:30:13:elinks:INFO:	Disabling clock on downlink 4
14:30:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:30:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:30:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:30:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:30:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
14:30:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
14:30:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
14:30:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
14:30:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
14:30:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
14:30:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:30:13:elinks:INFO:	Disabling clock on downlink 0
14:30:13:elinks:INFO:	Disabling clock on downlink 1
14:30:13:elinks:INFO:	Disabling clock on downlink 2
14:30:13:elinks:INFO:	Disabling clock on downlink 3
14:30:13:elinks:INFO:	Disabling clock on downlink 4
14:30:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:30:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:30:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:30:13:elinks:INFO:	Disabling clock on downlink 0
14:30:13:elinks:INFO:	Disabling clock on downlink 1
14:30:13:elinks:INFO:	Disabling clock on downlink 2
14:30:13:elinks:INFO:	Disabling clock on downlink 3
14:30:13:elinks:INFO:	Disabling clock on downlink 4
14:30:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:30:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:30:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:30:13:setup_element:INFO:	Scanning clock phase
14:30:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:30:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:30:13:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:30:13:setup_element:INFO:	Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:30:13:setup_element:INFO:	Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:30:13:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:30:13:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:30:14:setup_element:INFO:	Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:30:14:setup_element:INFO:	Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:30:14:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:30:14:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:30:14:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
14:30:14:setup_element:INFO:	Scanning data phases
14:30:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:30:14:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:30:19:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:30:19:setup_element:INFO:	Eye window for uplink 24: _____________XXXXXX_____________________
Data delay found: 35
14:30:19:setup_element:INFO:	Eye window for uplink 25: _______________XXXXXX___________________
Data delay found: 37
14:30:19:setup_element:INFO:	Eye window for uplink 26: ______________XXXXXXX___________________
Data delay found: 37
14:30:19:setup_element:INFO:	Eye window for uplink 27: ________________XXXXXX__________________
Data delay found: 38
14:30:19:setup_element:INFO:	Eye window for uplink 28: _______________________XXXXX____________
Data delay found: 5
14:30:19:setup_element:INFO:	Eye window for uplink 29: ______________________XXXXX_____________
Data delay found: 4
14:30:19:setup_element:INFO:	Eye window for uplink 30: _____________________XXXXX______________
Data delay found: 3
14:30:19:setup_element:INFO:	Eye window for uplink 31: ___________________XXXXXX_______________
Data delay found: 1
14:30:19:setup_element:INFO:	Setting the data phase to 35 for uplink 24
14:30:19:setup_element:INFO:	Setting the data phase to 37 for uplink 25
14:30:19:setup_element:INFO:	Setting the data phase to 37 for uplink 26
14:30:19:setup_element:INFO:	Setting the data phase to 38 for uplink 27
14:30:19:setup_element:INFO:	Setting the data phase to 5 for uplink 28
14:30:19:setup_element:INFO:	Setting the data phase to 4 for uplink 29
14:30:19:setup_element:INFO:	Setting the data phase to 3 for uplink 30
14:30:19:setup_element:INFO:	Setting the data phase to 1 for uplink 31
==============================================OOO==============================================
14:30:19:setup_element:INFO:	Beginning SMX ASICs map scan
14:30:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:30:19:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:30:19:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:30:19:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:30:19:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
14:30:19:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:30:19:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:30:19:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:30:19:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:30:20:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:30:20:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:30:20:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:30:20:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:30:21:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 70
    Eye Windows:
      Uplink 24: ____________________________________________________________________XXXXXXXXX___
      Uplink 25: ____________________________________________________________________XXXXXXXXX___
      Uplink 26: ____________________________________________________________________XXXXXXXX____
      Uplink 27: ____________________________________________________________________XXXXXXXX____
      Uplink 28: ______________________________________________________________________XXXXXXXX__
      Uplink 29: ______________________________________________________________________XXXXXXXX__
      Uplink 30: _____________________________________________________________________XXXXXXX____
      Uplink 31: _____________________________________________________________________XXXXXXX____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 25:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 26:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXXXX___________________
    Uplink 27:
      Optimal Phase: 38
      Window Length: 34
      Eye Window: ________________XXXXXX__________________
    Uplink 28:
      Optimal Phase: 5
      Window Length: 35
      Eye Window: _______________________XXXXX____________
    Uplink 29:
      Optimal Phase: 4
      Window Length: 35
      Eye Window: ______________________XXXXX_____________
    Uplink 30:
      Optimal Phase: 3
      Window Length: 35
      Eye Window: _____________________XXXXX______________
    Uplink 31:
      Optimal Phase: 1
      Window Length: 34
      Eye Window: ___________________XXXXXX_______________

==============================================OOO==============================================
14:30:21:setup_element:INFO:	Performing Elink synchronization
14:30:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:30:21:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:30:22:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:30:22:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
14:30:22:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:30:22:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:30:22:febtest:INFO:	Init all SMX (CSA): 30
14:30:30:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:30:30:febtest:INFO:	30-01 | XA-000-09-004-015-006-013-04 |  28.2 | 1177.4
14:30:30:febtest:INFO:	28-03 | XA-000-09-004-015-018-014-14 |  28.2 | 1177.4
14:30:30:febtest:INFO:	26-05 | XA-000-09-004-015-012-013-11 |  34.6 | 1147.8
14:30:31:febtest:INFO:	24-07 | XA-000-09-004-015-015-014-05 |  34.6 | 1153.7
14:30:32:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:30:34:ST3_smx:INFO:	chip: 30-1 	 28.225000 C 	 1189.190035 mV
14:30:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:30:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:30:34:ST3_smx:INFO:		Electrons
14:30:34:ST3_smx:INFO:	# loops 0
14:30:35:ST3_smx:INFO:	# loops 1
14:30:37:ST3_smx:INFO:	# loops 2
14:30:39:ST3_smx:INFO:	Total # of broken channels: 0
14:30:39:ST3_smx:INFO:	List of broken channels: []
14:30:39:ST3_smx:INFO:	Total # of broken channels: 0
14:30:39:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:30:41:ST3_smx:INFO:	chip: 28-3 	 25.062742 C 	 1189.190035 mV
14:30:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:30:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:30:41:ST3_smx:INFO:		Electrons
14:30:41:ST3_smx:INFO:	# loops 0
14:30:42:ST3_smx:INFO:	# loops 1
14:30:44:ST3_smx:INFO:	# loops 2
14:30:46:ST3_smx:INFO:	Total # of broken channels: 0
14:30:46:ST3_smx:INFO:	List of broken channels: []
14:30:46:ST3_smx:INFO:	Total # of broken channels: 0
14:30:46:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:30:48:ST3_smx:INFO:	chip: 26-5 	 34.556970 C 	 1159.654860 mV
14:30:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:30:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:30:48:ST3_smx:INFO:		Electrons
14:30:48:ST3_smx:INFO:	# loops 0
14:30:49:ST3_smx:INFO:	# loops 1
14:30:51:ST3_smx:INFO:	# loops 2
14:30:53:ST3_smx:INFO:	Total # of broken channels: 0
14:30:53:ST3_smx:INFO:	List of broken channels: []
14:30:53:ST3_smx:INFO:	Total # of broken channels: 0
14:30:53:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:30:55:ST3_smx:INFO:	chip: 24-7 	 34.556970 C 	 1165.571835 mV
14:30:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:30:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:30:55:ST3_smx:INFO:		Electrons
14:30:55:ST3_smx:INFO:	# loops 0
14:30:56:ST3_smx:INFO:	# loops 1
14:30:58:ST3_smx:INFO:	# loops 2
14:31:00:ST3_smx:INFO:	Total # of broken channels: 0
14:31:00:ST3_smx:INFO:	List of broken channels: []
14:31:00:ST3_smx:INFO:	Total # of broken channels: 0
14:31:00:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:31:00:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:31:00:febtest:INFO:	30-01 | XA-000-09-004-015-006-013-04 |  28.2 | 1212.7
14:31:01:febtest:INFO:	28-03 | XA-000-09-004-015-018-014-14 |  28.2 | 1206.9
14:31:01:febtest:INFO:	26-05 | XA-000-09-004-015-012-013-11 |  34.6 | 1177.4
14:31:01:febtest:INFO:	24-07 | XA-000-09-004-015-015-014-05 |  34.6 | 1183.3
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_04_07-14_30_11
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2380| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7590', '1.848', '1.3790']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9952', '1.850', '1.2980']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9940', '1.850', '0.2695']
Comment