Go Back
FEB_2380 08.04.25 14:55:53
TextEdit.txt
14:55:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:55:53:ST3_Shared:INFO: FEB-Microcable
14:55:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:55:53:febtest:INFO: Testing FEB with SN 2380
==============================================OOO==============================================
14:55:55:smx_tester:INFO: Scanning setup
14:55:55:elinks:INFO: Disabling clock on downlink 0
14:55:55:elinks:INFO: Disabling clock on downlink 1
14:55:55:elinks:INFO: Disabling clock on downlink 2
14:55:55:elinks:INFO: Disabling clock on downlink 3
14:55:55:elinks:INFO: Disabling clock on downlink 4
14:55:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:55:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:55:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:55:55:elinks:INFO: Disabling clock on downlink 0
14:55:55:elinks:INFO: Disabling clock on downlink 1
14:55:55:elinks:INFO: Disabling clock on downlink 2
14:55:55:elinks:INFO: Disabling clock on downlink 3
14:55:55:elinks:INFO: Disabling clock on downlink 4
14:55:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:55:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:55:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:55:55:elinks:INFO: Disabling clock on downlink 0
14:55:55:elinks:INFO: Disabling clock on downlink 1
14:55:55:elinks:INFO: Disabling clock on downlink 2
14:55:55:elinks:INFO: Disabling clock on downlink 3
14:55:55:elinks:INFO: Disabling clock on downlink 4
14:55:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:55:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:55:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:55:55:elinks:INFO: Disabling clock on downlink 0
14:55:55:elinks:INFO: Disabling clock on downlink 1
14:55:55:elinks:INFO: Disabling clock on downlink 2
14:55:56:elinks:INFO: Disabling clock on downlink 3
14:55:56:elinks:INFO: Disabling clock on downlink 4
14:55:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:55:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:55:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:55:56:elinks:INFO: Disabling clock on downlink 0
14:55:56:elinks:INFO: Disabling clock on downlink 1
14:55:56:elinks:INFO: Disabling clock on downlink 2
14:55:56:elinks:INFO: Disabling clock on downlink 3
14:55:56:elinks:INFO: Disabling clock on downlink 4
14:55:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:55:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:55:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:55:56:setup_element:INFO: Scanning clock phase
14:55:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:55:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:55:56:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:55:56:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:55:56:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:55:56:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:55:56:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:55:56:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:55:56:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:55:56:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:55:56:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:55:56:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:55:56:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:55:56:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:55:56:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:55:56:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:55:56:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:55:56:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:55:56:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:55:56:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
14:55:56:setup_element:INFO: Scanning data phases
14:55:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:55:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:56:02:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:56:02:setup_element:INFO: Eye window for uplink 16: ___XXXX_________________________________
Data delay found: 24
14:56:02:setup_element:INFO: Eye window for uplink 17: _XXXXX__________________________________
Data delay found: 23
14:56:02:setup_element:INFO: Eye window for uplink 18: __XXXXX_________________________________
Data delay found: 24
14:56:02:setup_element:INFO: Eye window for uplink 19: __XXXXX_________________________________
Data delay found: 24
14:56:02:setup_element:INFO: Eye window for uplink 20: __XXXXX_________________________________
Data delay found: 24
14:56:02:setup_element:INFO: Eye window for uplink 21: ___XXXXX________________________________
Data delay found: 25
14:56:02:setup_element:INFO: Eye window for uplink 22: ___XXXXX________________________________
Data delay found: 25
14:56:02:setup_element:INFO: Eye window for uplink 23: _XXXXX__________________________________
Data delay found: 23
14:56:02:setup_element:INFO: Eye window for uplink 24: ____________XXXXXX______________________
Data delay found: 34
14:56:02:setup_element:INFO: Eye window for uplink 25: ______________XXXXX_____________________
Data delay found: 36
14:56:02:setup_element:INFO: Eye window for uplink 26: ______________XXXXX_____________________
Data delay found: 36
14:56:02:setup_element:INFO: Eye window for uplink 27: ________________XXXXXX__________________
Data delay found: 38
14:56:02:setup_element:INFO: Eye window for uplink 28: ______________________XXXXXX____________
Data delay found: 4
14:56:02:setup_element:INFO: Eye window for uplink 29: ______________________XXXXXX____________
Data delay found: 4
14:56:02:setup_element:INFO: Eye window for uplink 30: _____________________XXXXXX_____________
Data delay found: 3
14:56:02:setup_element:INFO: Eye window for uplink 31: ___________________XXXXXX_______________
Data delay found: 1
14:56:02:setup_element:INFO: Setting the data phase to 24 for uplink 16
14:56:02:setup_element:INFO: Setting the data phase to 23 for uplink 17
14:56:02:setup_element:INFO: Setting the data phase to 24 for uplink 18
14:56:02:setup_element:INFO: Setting the data phase to 24 for uplink 19
14:56:02:setup_element:INFO: Setting the data phase to 24 for uplink 20
14:56:02:setup_element:INFO: Setting the data phase to 25 for uplink 21
14:56:02:setup_element:INFO: Setting the data phase to 25 for uplink 22
14:56:02:setup_element:INFO: Setting the data phase to 23 for uplink 23
14:56:02:setup_element:INFO: Setting the data phase to 34 for uplink 24
14:56:02:setup_element:INFO: Setting the data phase to 36 for uplink 25
14:56:02:setup_element:INFO: Setting the data phase to 36 for uplink 26
14:56:02:setup_element:INFO: Setting the data phase to 38 for uplink 27
14:56:02:setup_element:INFO: Setting the data phase to 4 for uplink 28
14:56:02:setup_element:INFO: Setting the data phase to 4 for uplink 29
14:56:02:setup_element:INFO: Setting the data phase to 3 for uplink 30
14:56:02:setup_element:INFO: Setting the data phase to 1 for uplink 31
==============================================OOO==============================================
14:56:02:setup_element:INFO: Beginning SMX ASICs map scan
14:56:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:56:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:56:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:56:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:56:02:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:56:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:56:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:56:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:56:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:56:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:56:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:56:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:56:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:56:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:56:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:56:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:56:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:56:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:56:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:56:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:56:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:56:05:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXXX__
Uplink 17: ______________________________________________________________________XXXXXXXX__
Uplink 18: ______________________________________________________________________XXXXXXXX__
Uplink 19: ______________________________________________________________________XXXXXXXX__
Uplink 20: _____________________________________________________________________XXXXXXXX___
Uplink 21: _____________________________________________________________________XXXXXXXX___
Uplink 22: ______________________________________________________________________XXXXXXX___
Uplink 23: ______________________________________________________________________XXXXXXX___
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: ____________________________________________________________________XXXXXXXXX___
Uplink 27: ____________________________________________________________________XXXXXXXXX___
Uplink 28: _______________________________________________________________________XXXXXXXX_
Uplink 29: _______________________________________________________________________XXXXXXXX_
Uplink 30: _______________________________________________________________________XXXXXXX__
Uplink 31: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 17:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 18:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 19:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 20:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 21:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 22:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 23:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 24:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 25:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 26:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 27:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 28:
Optimal Phase: 4
Window Length: 34
Eye Window: ______________________XXXXXX____________
Uplink 29:
Optimal Phase: 4
Window Length: 34
Eye Window: ______________________XXXXXX____________
Uplink 30:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
Uplink 31:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
==============================================OOO==============================================
14:56:05:setup_element:INFO: Performing Elink synchronization
14:56:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:56:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:56:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:56:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
14:56:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:56:05:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:56:05:febtest:INFO: Init all SMX (CSA): 30
14:56:19:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:56:19:febtest:INFO: 23-00 | XA-000-09-004-015-015-019-02 | 31.4 | 1171.5
14:56:19:febtest:INFO: 30-01 | XA-000-09-004-015-006-013-04 | 34.6 | 1165.6
14:56:19:febtest:INFO: 21-02 | XA-000-09-004-015-009-020-07 | 40.9 | 1147.8
14:56:20:febtest:INFO: 28-03 | XA-000-09-004-015-018-014-14 | 25.1 | 1183.3
14:56:20:febtest:INFO: 19-04 | XA-000-09-004-015-012-020-12 | 47.3 | 1135.9
14:56:20:febtest:INFO: 26-05 | XA-000-09-004-015-012-013-11 | 37.7 | 1141.9
14:56:20:febtest:INFO: 17-06 | XA-000-09-004-015-012-019-12 | 37.7 | 1165.6
14:56:21:febtest:INFO: 24-07 | XA-000-09-004-015-015-014-05 | 37.7 | 1153.7
14:56:22:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:56:24:ST3_smx:INFO: chip: 23-0 31.389742 C 1183.292940 mV
14:56:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:56:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:56:24:ST3_smx:INFO: Electrons
14:56:24:ST3_smx:INFO: # loops 0
14:56:25:ST3_smx:INFO: # loops 1
14:56:27:ST3_smx:INFO: # loops 2
14:56:28:ST3_smx:INFO: Total # of broken channels: 1
14:56:28:ST3_smx:INFO: List of broken channels: [7]
14:56:28:ST3_smx:INFO: Total # of broken channels: 0
14:56:28:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:56:30:ST3_smx:INFO: chip: 30-1 34.556970 C 1177.390875 mV
14:56:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:56:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:56:30:ST3_smx:INFO: Electrons
14:56:30:ST3_smx:INFO: # loops 0
14:56:32:ST3_smx:INFO: # loops 1
14:56:34:ST3_smx:INFO: # loops 2
14:56:35:ST3_smx:INFO: Total # of broken channels: 0
14:56:35:ST3_smx:INFO: List of broken channels: []
14:56:35:ST3_smx:INFO: Total # of broken channels: 0
14:56:35:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:56:37:ST3_smx:INFO: chip: 21-2 37.726682 C 1159.654860 mV
14:56:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:56:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:56:37:ST3_smx:INFO: Electrons
14:56:37:ST3_smx:INFO: # loops 0
14:56:39:ST3_smx:INFO: # loops 1
14:56:40:ST3_smx:INFO: # loops 2
14:56:42:ST3_smx:INFO: Total # of broken channels: 0
14:56:42:ST3_smx:INFO: List of broken channels: []
14:56:42:ST3_smx:INFO: Total # of broken channels: 0
14:56:42:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:56:43:ST3_smx:INFO: chip: 28-3 25.062742 C 1195.082160 mV
14:56:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:56:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:56:43:ST3_smx:INFO: Electrons
14:56:43:ST3_smx:INFO: # loops 0
14:56:45:ST3_smx:INFO: # loops 1
14:56:47:ST3_smx:INFO: # loops 2
14:56:48:ST3_smx:INFO: Total # of broken channels: 0
14:56:48:ST3_smx:INFO: List of broken channels: []
14:56:48:ST3_smx:INFO: Total # of broken channels: 0
14:56:48:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:56:50:ST3_smx:INFO: chip: 19-4 47.250730 C 1147.806000 mV
14:56:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:56:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:56:50:ST3_smx:INFO: Electrons
14:56:50:ST3_smx:INFO: # loops 0
14:56:52:ST3_smx:INFO: # loops 1
14:56:53:ST3_smx:INFO: # loops 2
14:56:55:ST3_smx:INFO: Total # of broken channels: 0
14:56:55:ST3_smx:INFO: List of broken channels: []
14:56:55:ST3_smx:INFO: Total # of broken channels: 0
14:56:55:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:56:57:ST3_smx:INFO: chip: 26-5 37.726682 C 1153.732915 mV
14:56:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:56:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:56:57:ST3_smx:INFO: Electrons
14:56:57:ST3_smx:INFO: # loops 0
14:56:58:ST3_smx:INFO: # loops 1
14:57:00:ST3_smx:INFO: # loops 2
14:57:01:ST3_smx:INFO: Total # of broken channels: 0
14:57:01:ST3_smx:INFO: List of broken channels: []
14:57:01:ST3_smx:INFO: Total # of broken channels: 0
14:57:01:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:57:03:ST3_smx:INFO: chip: 17-6 37.726682 C 1177.390875 mV
14:57:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:57:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:57:03:ST3_smx:INFO: Electrons
14:57:03:ST3_smx:INFO: # loops 0
14:57:05:ST3_smx:INFO: # loops 1
14:57:06:ST3_smx:INFO: # loops 2
14:57:08:ST3_smx:INFO: Total # of broken channels: 0
14:57:08:ST3_smx:INFO: List of broken channels: []
14:57:08:ST3_smx:INFO: Total # of broken channels: 0
14:57:08:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:57:10:ST3_smx:INFO: chip: 24-7 37.726682 C 1165.571835 mV
14:57:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:57:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:57:10:ST3_smx:INFO: Electrons
14:57:10:ST3_smx:INFO: # loops 0
14:57:11:ST3_smx:INFO: # loops 1
14:57:13:ST3_smx:INFO: # loops 2
14:57:14:ST3_smx:INFO: Total # of broken channels: 0
14:57:14:ST3_smx:INFO: List of broken channels: []
14:57:14:ST3_smx:INFO: Total # of broken channels: 0
14:57:14:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:57:15:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:57:15:febtest:INFO: 23-00 | XA-000-09-004-015-015-019-02 | 31.4 | 1206.9
14:57:15:febtest:INFO: 30-01 | XA-000-09-004-015-006-013-04 | 34.6 | 1206.9
14:57:15:febtest:INFO: 21-02 | XA-000-09-004-015-009-020-07 | 40.9 | 1183.3
14:57:16:febtest:INFO: 28-03 | XA-000-09-004-015-018-014-14 | 28.2 | 1212.7
14:57:16:febtest:INFO: 19-04 | XA-000-09-004-015-012-020-12 | 47.3 | 1165.6
14:57:16:febtest:INFO: 26-05 | XA-000-09-004-015-012-013-11 | 37.7 | 1177.4
14:57:16:febtest:INFO: 17-06 | XA-000-09-004-015-012-019-12 | 40.9 | 1195.1
14:57:17:febtest:INFO: 24-07 | XA-000-09-004-015-015-014-05 | 37.7 | 1183.3
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_04_08-14_55_53
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2380| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9830', '1.848', '2.8430']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0020', '1.850', '2.5830']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9880', '1.850', '0.5339']