FEB_2384 07.04.25 14:36:47
Info
14:36:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:36:47:ST3_Shared:INFO: FEB-Microcable
14:36:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:36:47:febtest:INFO: Testing FEB with SN 2384
==============================================OOO==============================================
14:36:49:smx_tester:INFO: Scanning setup
14:36:49:elinks:INFO: Disabling clock on downlink 0
14:36:49:elinks:INFO: Disabling clock on downlink 1
14:36:49:elinks:INFO: Disabling clock on downlink 2
14:36:49:elinks:INFO: Disabling clock on downlink 3
14:36:49:elinks:INFO: Disabling clock on downlink 4
14:36:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:36:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:36:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:36:49:elinks:INFO: Disabling clock on downlink 0
14:36:49:elinks:INFO: Disabling clock on downlink 1
14:36:49:elinks:INFO: Disabling clock on downlink 2
14:36:49:elinks:INFO: Disabling clock on downlink 3
14:36:49:elinks:INFO: Disabling clock on downlink 4
14:36:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:36:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:36:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:36:49:elinks:INFO: Disabling clock on downlink 0
14:36:49:elinks:INFO: Disabling clock on downlink 1
14:36:49:elinks:INFO: Disabling clock on downlink 2
14:36:49:elinks:INFO: Disabling clock on downlink 3
14:36:49:elinks:INFO: Disabling clock on downlink 4
14:36:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:36:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:36:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:36:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:36:49:elinks:INFO: Disabling clock on downlink 0
14:36:49:elinks:INFO: Disabling clock on downlink 1
14:36:49:elinks:INFO: Disabling clock on downlink 2
14:36:49:elinks:INFO: Disabling clock on downlink 3
14:36:49:elinks:INFO: Disabling clock on downlink 4
14:36:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:36:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:36:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:36:49:elinks:INFO: Disabling clock on downlink 0
14:36:49:elinks:INFO: Disabling clock on downlink 1
14:36:49:elinks:INFO: Disabling clock on downlink 2
14:36:49:elinks:INFO: Disabling clock on downlink 3
14:36:49:elinks:INFO: Disabling clock on downlink 4
14:36:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:36:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:36:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:36:49:setup_element:INFO: Scanning clock phase
14:36:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:36:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:36:50:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:36:50:setup_element:INFO: Eye window for uplink 16: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:36:50:setup_element:INFO: Eye window for uplink 17: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:36:50:setup_element:INFO: Eye window for uplink 18: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:36:50:setup_element:INFO: Eye window for uplink 19: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:36:50:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:36:50:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:36:50:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:36:50:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:36:50:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
14:36:50:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
14:36:50:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:36:50:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:36:50:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:36:50:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:36:50:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:36:50:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:36:50:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
14:36:50:setup_element:INFO: Scanning data phases
14:36:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:36:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:36:55:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:36:55:setup_element:INFO: Eye window for uplink 16: XXXX____________________________________
Data delay found: 21
14:36:55:setup_element:INFO: Eye window for uplink 17: XXX___________________________________XX
Data delay found: 20
14:36:55:setup_element:INFO: Eye window for uplink 18: XXXXX_________________________________XX
Data delay found: 21
14:36:55:setup_element:INFO: Eye window for uplink 19: XXXXX_________________________________XX
Data delay found: 21
14:36:55:setup_element:INFO: Eye window for uplink 20: XXXXXX__________________________________
Data delay found: 22
14:36:55:setup_element:INFO: Eye window for uplink 21: _XXXXX__________________________________
Data delay found: 23
14:36:55:setup_element:INFO: Eye window for uplink 22: XXXX__________________________________XX
Data delay found: 20
14:36:55:setup_element:INFO: Eye window for uplink 23: XX___________________________________XXX
Data delay found: 19
14:36:55:setup_element:INFO: Eye window for uplink 24: ___________XXXXX________________________
Data delay found: 33
14:36:55:setup_element:INFO: Eye window for uplink 25: ____________XXXXX_______________________
Data delay found: 34
14:36:55:setup_element:INFO: Eye window for uplink 26: _______________XXXXXXX__________________
Data delay found: 38
14:36:55:setup_element:INFO: Eye window for uplink 27: _________________XXXXXX_________________
Data delay found: 39
14:36:55:setup_element:INFO: Eye window for uplink 28: ___________________XXXXXX_______________
Data delay found: 1
14:36:55:setup_element:INFO: Eye window for uplink 29: ___________________XXXXX________________
Data delay found: 1
14:36:55:setup_element:INFO: Eye window for uplink 30: _______________________XXXXX____________
Data delay found: 5
14:36:55:setup_element:INFO: Eye window for uplink 31: _____________________XXXXX______________
Data delay found: 3
14:36:55:setup_element:INFO: Setting the data phase to 21 for uplink 16
14:36:55:setup_element:INFO: Setting the data phase to 20 for uplink 17
14:36:55:setup_element:INFO: Setting the data phase to 21 for uplink 18
14:36:55:setup_element:INFO: Setting the data phase to 21 for uplink 19
14:36:55:setup_element:INFO: Setting the data phase to 22 for uplink 20
14:36:55:setup_element:INFO: Setting the data phase to 23 for uplink 21
14:36:55:setup_element:INFO: Setting the data phase to 20 for uplink 22
14:36:55:setup_element:INFO: Setting the data phase to 19 for uplink 23
14:36:55:setup_element:INFO: Setting the data phase to 33 for uplink 24
14:36:55:setup_element:INFO: Setting the data phase to 34 for uplink 25
14:36:55:setup_element:INFO: Setting the data phase to 38 for uplink 26
14:36:55:setup_element:INFO: Setting the data phase to 39 for uplink 27
14:36:55:setup_element:INFO: Setting the data phase to 1 for uplink 28
14:36:55:setup_element:INFO: Setting the data phase to 1 for uplink 29
14:36:55:setup_element:INFO: Setting the data phase to 5 for uplink 30
14:36:55:setup_element:INFO: Setting the data phase to 3 for uplink 31
==============================================OOO==============================================
14:36:55:setup_element:INFO: Beginning SMX ASICs map scan
14:36:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:36:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:36:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:36:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:36:55:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:36:55:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:36:55:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:36:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:36:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:36:55:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:36:55:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:36:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:36:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:36:55:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:36:56:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:36:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:36:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:36:56:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:36:56:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:36:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:36:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:36:57:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 69
Eye Windows:
Uplink 16: ____________________________________________________________________XXXXXXXX____
Uplink 17: ____________________________________________________________________XXXXXXXX____
Uplink 18: ____________________________________________________________________XXXXXXXXX___
Uplink 19: ____________________________________________________________________XXXXXXXXX___
Uplink 20: ____________________________________________________________________XXXXXXXX____
Uplink 21: ____________________________________________________________________XXXXXXXX____
Uplink 22: ____________________________________________________________________XXXXXXXX____
Uplink 23: ____________________________________________________________________XXXXXXXX____
Uplink 24: ___________________________________________________________________XXXXXXXX_____
Uplink 25: ___________________________________________________________________XXXXXXXX_____
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 21
Window Length: 36
Eye Window: XXXX____________________________________
Uplink 17:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 18:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 19:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 20:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 21:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 22:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 23:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 24:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 25:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 26:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
Uplink 27:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 28:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 29:
Optimal Phase: 1
Window Length: 35
Eye Window: ___________________XXXXX________________
Uplink 30:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 31:
Optimal Phase: 3
Window Length: 35
Eye Window: _____________________XXXXX______________
==============================================OOO==============================================
14:36:57:setup_element:INFO: Performing Elink synchronization
14:36:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:36:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:36:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:36:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
14:36:57:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:36:57:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:36:58:febtest:INFO: Init all SMX (CSA): 30
14:37:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:37:12:febtest:INFO: 23-00 | XA-000-09-004-018-008-012-14 | 28.2 | 1189.2
14:37:12:febtest:INFO: 30-01 | XA-000-09-004-018-011-016-07 | 31.4 | 1171.5
14:37:12:febtest:INFO: 21-02 | XA-000-09-004-018-012-018-15 | 44.1 | 1130.0
14:37:12:febtest:INFO: 28-03 | XA-000-09-004-018-010-016-10 | 50.4 | 1112.1
14:37:13:febtest:INFO: 19-04 | XA-000-09-004-018-007-015-10 | 44.1 | 1135.9
14:37:13:febtest:INFO: 26-05 | XA-000-09-004-018-007-016-13 | 47.3 | 1118.1
14:37:13:febtest:INFO: 17-06 | XA-000-09-004-018-010-015-13 | 40.9 | 1159.7
14:37:13:febtest:INFO: 24-07 | XA-000-09-004-018-007-012-10 | 34.6 | 1165.6
14:37:14:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:37:17:ST3_smx:INFO: chip: 23-0 28.225000 C 1206.851500 mV
14:37:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:17:ST3_smx:INFO: Electrons
14:37:17:ST3_smx:INFO: # loops 0
14:37:18:ST3_smx:INFO: # loops 1
14:37:20:ST3_smx:INFO: # loops 2
14:37:21:ST3_smx:INFO: Total # of broken channels: 0
14:37:21:ST3_smx:INFO: List of broken channels: []
14:37:21:ST3_smx:INFO: Total # of broken channels: 0
14:37:21:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:37:23:ST3_smx:INFO: chip: 30-1 31.389742 C 1183.292940 mV
14:37:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:23:ST3_smx:INFO: Electrons
14:37:23:ST3_smx:INFO: # loops 0
14:37:25:ST3_smx:INFO: # loops 1
14:37:26:ST3_smx:INFO: # loops 2
14:37:28:ST3_smx:INFO: Total # of broken channels: 0
14:37:28:ST3_smx:INFO: List of broken channels: []
14:37:28:ST3_smx:INFO: Total # of broken channels: 0
14:37:28:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:37:29:ST3_smx:INFO: chip: 21-2 44.073563 C 1141.874115 mV
14:37:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:29:ST3_smx:INFO: Electrons
14:37:29:ST3_smx:INFO: # loops 0
14:37:31:ST3_smx:INFO: # loops 1
14:37:33:ST3_smx:INFO: # loops 2
14:37:34:ST3_smx:INFO: Total # of broken channels: 0
14:37:34:ST3_smx:INFO: List of broken channels: []
14:37:34:ST3_smx:INFO: Total # of broken channels: 0
14:37:34:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:37:36:ST3_smx:INFO: chip: 28-3 47.250730 C 1124.048640 mV
14:37:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:36:ST3_smx:INFO: Electrons
14:37:36:ST3_smx:INFO: # loops 0
14:37:38:ST3_smx:INFO: # loops 1
14:37:39:ST3_smx:INFO: # loops 2
14:37:41:ST3_smx:INFO: Total # of broken channels: 0
14:37:41:ST3_smx:INFO: List of broken channels: []
14:37:41:ST3_smx:INFO: Total # of broken channels: 0
14:37:41:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:37:43:ST3_smx:INFO: chip: 19-4 44.073563 C 1147.806000 mV
14:37:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:43:ST3_smx:INFO: Electrons
14:37:43:ST3_smx:INFO: # loops 0
14:37:44:ST3_smx:INFO: # loops 1
14:37:46:ST3_smx:INFO: # loops 2
14:37:47:ST3_smx:INFO: Total # of broken channels: 0
14:37:47:ST3_smx:INFO: List of broken channels: []
14:37:47:ST3_smx:INFO: Total # of broken channels: 0
14:37:47:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:37:49:ST3_smx:INFO: chip: 26-5 47.250730 C 1129.995435 mV
14:37:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:49:ST3_smx:INFO: Electrons
14:37:49:ST3_smx:INFO: # loops 0
14:37:51:ST3_smx:INFO: # loops 1
14:37:52:ST3_smx:INFO: # loops 2
14:37:54:ST3_smx:INFO: Total # of broken channels: 0
14:37:54:ST3_smx:INFO: List of broken channels: []
14:37:54:ST3_smx:INFO: Total # of broken channels: 0
14:37:54:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:37:56:ST3_smx:INFO: chip: 17-6 40.898880 C 1165.571835 mV
14:37:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:56:ST3_smx:INFO: Electrons
14:37:56:ST3_smx:INFO: # loops 0
14:37:57:ST3_smx:INFO: # loops 1
14:37:59:ST3_smx:INFO: # loops 2
14:38:00:ST3_smx:INFO: Total # of broken channels: 0
14:38:00:ST3_smx:INFO: List of broken channels: []
14:38:00:ST3_smx:INFO: Total # of broken channels: 0
14:38:00:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:38:02:ST3_smx:INFO: chip: 24-7 34.556970 C 1177.390875 mV
14:38:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:38:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:38:02:ST3_smx:INFO: Electrons
14:38:02:ST3_smx:INFO: # loops 0
14:38:04:ST3_smx:INFO: # loops 1
14:38:05:ST3_smx:INFO: # loops 2
14:38:07:ST3_smx:INFO: Total # of broken channels: 0
14:38:07:ST3_smx:INFO: List of broken channels: []
14:38:07:ST3_smx:INFO: Total # of broken channels: 0
14:38:07:ST3_smx:INFO: List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
14:38:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:38:07:febtest:INFO: 23-00 | XA-000-09-004-018-008-012-14 | 28.2 | 1230.3
14:38:07:febtest:INFO: 30-01 | XA-000-09-004-018-011-016-07 | 34.6 | 1201.0
14:38:08:febtest:INFO: 21-02 | XA-000-09-004-018-012-018-15 | 47.3 | 1165.6
14:38:08:febtest:INFO: 28-03 | XA-000-09-004-018-010-016-10 | 50.4 | 1141.9
14:38:08:febtest:INFO: 19-04 | XA-000-09-004-018-007-015-10 | 44.1 | 1165.6
14:38:08:febtest:INFO: 26-05 | XA-000-09-004-018-007-016-13 | 50.4 | 1147.8
14:38:09:febtest:INFO: 17-06 | XA-000-09-004-018-010-015-13 | 40.9 | 1189.2
14:38:09:febtest:INFO: 24-07 | XA-000-09-004-018-007-012-10 | 34.6 | 1201.0
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_04_07-14_36_47
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2384| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0810', '1.848', '2.4290']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0480', '1.850', '2.4470']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0130', '1.850', '0.5312']