FEB_2387    31.03.25 13:55:41

TextEdit.txt
            13:55:41:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:55:41:ST3_Shared:INFO:	                       FEB-Microcable                       
13:55:41:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:55:41:febtest:INFO:	Testing FEB with SN 2387
==============================================OOO==============================================
13:55:43:smx_tester:INFO:	Scanning setup
13:55:43:elinks:INFO:	Disabling clock on downlink 0
13:55:43:elinks:INFO:	Disabling clock on downlink 1
13:55:43:elinks:INFO:	Disabling clock on downlink 2
13:55:43:elinks:INFO:	Disabling clock on downlink 3
13:55:43:elinks:INFO:	Disabling clock on downlink 4
13:55:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:55:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:55:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:55:43:elinks:INFO:	Disabling clock on downlink 0
13:55:43:elinks:INFO:	Disabling clock on downlink 1
13:55:43:elinks:INFO:	Disabling clock on downlink 2
13:55:43:elinks:INFO:	Disabling clock on downlink 3
13:55:43:elinks:INFO:	Disabling clock on downlink 4
13:55:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:55:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:55:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:55:43:elinks:INFO:	Disabling clock on downlink 0
13:55:43:elinks:INFO:	Disabling clock on downlink 1
13:55:43:elinks:INFO:	Disabling clock on downlink 2
13:55:43:elinks:INFO:	Disabling clock on downlink 3
13:55:43:elinks:INFO:	Disabling clock on downlink 4
13:55:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:55:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:55:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:55:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:55:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:55:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:55:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:55:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:55:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:55:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:55:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:55:43:elinks:INFO:	Disabling clock on downlink 0
13:55:43:elinks:INFO:	Disabling clock on downlink 1
13:55:43:elinks:INFO:	Disabling clock on downlink 2
13:55:43:elinks:INFO:	Disabling clock on downlink 3
13:55:43:elinks:INFO:	Disabling clock on downlink 4
13:55:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:55:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:55:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:55:43:elinks:INFO:	Disabling clock on downlink 0
13:55:43:elinks:INFO:	Disabling clock on downlink 1
13:55:43:elinks:INFO:	Disabling clock on downlink 2
13:55:43:elinks:INFO:	Disabling clock on downlink 3
13:55:43:elinks:INFO:	Disabling clock on downlink 4
13:55:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:55:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:55:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:55:43:setup_element:INFO:	Scanning clock phase
13:55:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:55:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:44:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:55:44:setup_element:INFO:	Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:55:44:setup_element:INFO:	Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:55:44:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:55:44:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:55:44:setup_element:INFO:	Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:55:44:setup_element:INFO:	Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:55:44:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:55:44:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:55:44:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
13:55:44:setup_element:INFO:	Scanning data phases
13:55:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:55:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:49:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:55:49:setup_element:INFO:	Eye window for uplink 24: _______________XXXXXXX__________________
Data delay found: 38
13:55:49:setup_element:INFO:	Eye window for uplink 25: _________________XXXXX__________________
Data delay found: 39
13:55:49:setup_element:INFO:	Eye window for uplink 26: ______________XXXXX_____________________
Data delay found: 36
13:55:49:setup_element:INFO:	Eye window for uplink 27: _______________XXXXXX___________________
Data delay found: 37
13:55:49:setup_element:INFO:	Eye window for uplink 28: ______________________XXXXXX____________
Data delay found: 4
13:55:49:setup_element:INFO:	Eye window for uplink 29: ______________________XXXXXX____________
Data delay found: 4
13:55:49:setup_element:INFO:	Eye window for uplink 30: _____________________XXXXX______________
Data delay found: 3
13:55:49:setup_element:INFO:	Eye window for uplink 31: ___________________XXXXXX_______________
Data delay found: 1
13:55:49:setup_element:INFO:	Setting the data phase to 38 for uplink 24
13:55:49:setup_element:INFO:	Setting the data phase to 39 for uplink 25
13:55:49:setup_element:INFO:	Setting the data phase to 36 for uplink 26
13:55:49:setup_element:INFO:	Setting the data phase to 37 for uplink 27
13:55:49:setup_element:INFO:	Setting the data phase to 4 for uplink 28
13:55:49:setup_element:INFO:	Setting the data phase to 4 for uplink 29
13:55:49:setup_element:INFO:	Setting the data phase to 3 for uplink 30
13:55:49:setup_element:INFO:	Setting the data phase to 1 for uplink 31
==============================================OOO==============================================
13:55:49:setup_element:INFO:	Beginning SMX ASICs map scan
13:55:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:55:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:49:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:55:49:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:55:49:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:55:49:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:55:49:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:55:49:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:55:50:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:55:50:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:55:50:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:55:50:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:55:50:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:55:52:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 70
    Eye Windows:
      Uplink 24: _____________________________________________________________________XXXXXXXXX__
      Uplink 25: _____________________________________________________________________XXXXXXXXX__
      Uplink 26: ____________________________________________________________________XXXXXXX_____
      Uplink 27: ____________________________________________________________________XXXXXXX_____
      Uplink 28: ______________________________________________________________________XXXXXXXX__
      Uplink 29: ______________________________________________________________________XXXXXXXX__
      Uplink 30: _____________________________________________________________________XXXXXXX____
      Uplink 31: _____________________________________________________________________XXXXXXX____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 38
      Window Length: 33
      Eye Window: _______________XXXXXXX__________________
    Uplink 25:
      Optimal Phase: 39
      Window Length: 35
      Eye Window: _________________XXXXX__________________
    Uplink 26:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 27:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 28:
      Optimal Phase: 4
      Window Length: 34
      Eye Window: ______________________XXXXXX____________
    Uplink 29:
      Optimal Phase: 4
      Window Length: 34
      Eye Window: ______________________XXXXXX____________
    Uplink 30:
      Optimal Phase: 3
      Window Length: 35
      Eye Window: _____________________XXXXX______________
    Uplink 31:
      Optimal Phase: 1
      Window Length: 34
      Eye Window: ___________________XXXXXX_______________

==============================================OOO==============================================
13:55:52:setup_element:INFO:	Performing Elink synchronization
13:55:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:55:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:52:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:55:52:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
13:55:52:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:55:52:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:55:52:febtest:INFO:	Init all SMX (CSA): 30
13:55:59:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:55:59:febtest:INFO:	30-01 | XA-000-09-004-018-008-014-14 |  28.2 | 1171.5
13:56:00:febtest:INFO:	28-03 | XA-000-09-004-013-009-026-14 |  37.7 | 1141.9
13:56:00:febtest:INFO:	26-05 | XA-000-09-004-018-009-015-03 |  21.9 | 1183.3
13:56:00:febtest:INFO:	24-07 | XA-000-09-004-013-008-025-03 |  31.4 | 1153.7
13:56:01:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:56:03:ST3_smx:INFO:	chip: 30-1 	 28.225000 C 	 1183.292940 mV
13:56:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:03:ST3_smx:INFO:		Electrons
13:56:03:ST3_smx:INFO:	# loops 0
13:56:05:ST3_smx:INFO:	# loops 1
13:56:06:ST3_smx:INFO:	# loops 2
13:56:08:ST3_smx:INFO:	Total # of broken channels: 0
13:56:08:ST3_smx:INFO:	List of broken channels: []
13:56:08:ST3_smx:INFO:	Total # of broken channels: 0
13:56:08:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:56:10:ST3_smx:INFO:	chip: 28-3 	 34.556970 C 	 1147.806000 mV
13:56:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:10:ST3_smx:INFO:		Electrons
13:56:10:ST3_smx:INFO:	# loops 0
13:56:12:ST3_smx:INFO:	# loops 1
13:56:13:ST3_smx:INFO:	# loops 2
13:56:15:ST3_smx:INFO:	Total # of broken channels: 0
13:56:15:ST3_smx:INFO:	List of broken channels: []
13:56:15:ST3_smx:INFO:	Total # of broken channels: 0
13:56:15:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:56:17:ST3_smx:INFO:	chip: 26-5 	 21.902970 C 	 1195.082160 mV
13:56:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:17:ST3_smx:INFO:		Electrons
13:56:17:ST3_smx:INFO:	# loops 0
13:56:18:ST3_smx:INFO:	# loops 1
13:56:20:ST3_smx:INFO:	# loops 2
13:56:21:ST3_smx:INFO:	Total # of broken channels: 0
13:56:21:ST3_smx:INFO:	List of broken channels: []
13:56:21:ST3_smx:INFO:	Total # of broken channels: 0
13:56:21:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:56:23:ST3_smx:INFO:	chip: 24-7 	 34.556970 C 	 1165.571835 mV
13:56:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:23:ST3_smx:INFO:		Electrons
13:56:23:ST3_smx:INFO:	# loops 0
13:56:25:ST3_smx:INFO:	# loops 1
13:56:26:ST3_smx:INFO:	# loops 2
13:56:28:ST3_smx:INFO:	Total # of broken channels: 0
13:56:28:ST3_smx:INFO:	List of broken channels: []
13:56:28:ST3_smx:INFO:	Total # of broken channels: 0
13:56:28:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
13:56:28:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:56:29:febtest:INFO:	30-01 | XA-000-09-004-018-008-014-14 |  31.4 | 1201.0
13:56:29:febtest:INFO:	28-03 | XA-000-09-004-013-009-026-14 |  37.7 | 1171.5
13:56:29:febtest:INFO:	26-05 | XA-000-09-004-018-009-015-03 |  21.9 | 1218.6
13:56:29:febtest:INFO:	24-07 | XA-000-09-004-013-008-025-03 |  34.6 | 1183.3
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_31-13_55_41
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2387| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7535', '1.848', '0.7784']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0160', '1.850', '1.3060']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9942', '1.850', '0.2683']